binutils-gdb/sim/example-synacor
Mike Frysinger 6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
..
aclocal.m4 sim: enable hardware support by default 2021-04-26 22:30:55 -04:00
ChangeLog sim: switch config.h usage to defs.h 2021-05-16 22:38:41 -04:00
config.in sim: riscv: move __int128 check to configure 2021-05-16 00:04:17 -04:00
configure sim: riscv: move __int128 check to configure 2021-05-16 00:04:17 -04:00
configure.ac
interp.c sim: switch config.h usage to defs.h 2021-05-16 22:38:41 -04:00
Makefile.in
README
README.arch-spec
sim-main.c sim: switch config.h usage to defs.h 2021-05-16 22:38:41 -04:00
sim-main.h

= OVERVIEW =

The Synacor Challenge is a fun programming exercise with a number of puzzles
built into it.  You can find more details about it here:
https://challenge.synacor.com/

The first puzzle is writing an interpreter for their custom ISA.  This is a
simulator for that custom CPU.  The CPU is quite basic: it's 16-bit with only
8 registers and a limited set of instructions.  This means the port will never
grow new features.  See README.arch-spec for more details.

Implementing it here ends up being quite useful: it acts as a simple constrained
"real world" example for people who want to implement a new simulator for their
own architecture.  We demonstrate all the basic fundamentals (registers, memory,
branches, and tracing) that all ports should have.