
Spectre variant 2 mitigation for PowerPC and PowerPC64. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Handle speculation barrier. (CRSETEQ, BEQCTRM): Define. (is_nonpic_glink_stub): Don't check bctr. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (ppc_elf_relax_section): Size speculation barrier. (output_bctr): New function. (write_glink_stub): Use output_bctr. (ppc_elf_relocate_section): Use output_bctr for long branch stub. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Use output_bctr. * elf32-ppc.h (struct ppc_elf_params): Add speculate_indirect_jumps. * elf64-ppc.c (CRSETEQ, BEQCTRM, BEQCTRLM): Define. (GLINK_PLTRESOLVE_SIZE): Size speculation barrier. (size_global_entry_stubs): Handle speculation barrier sizing. (plt_stub_size): Likewise. (output_bctr): New function. (build_plt_stub, build_tls_get_addr_stub): Output speculation barrier. (ppc_build_one_stub): Likewise for ppc_stub_plt_branch. (ppc_size_one_stub): Size speculation barrier in ppc_stub_plt_branch. (build_global_entry_stubs): Output speculation barrier. (ppc64_elf_build_stubs): Likewise in __glink_PLTresolve stub. * elf64-ppc.h (struct ppc64_elf_params): Add speculate_indirect_jumps. gold/ * options.h (speculate_indirect_jumps): New option. * powerpc.cc (beqctrm, beqctrlm, crseteq): New insn constants. (output_bctr): New function. (Stub_table::plt_call_size): Add space for speculation barrier. (Stub_table::branch_stub_size): Likewise. (Output_data_glink::pltresolve_size): Likewise. (Stub_table::do_write): Output speculation barriers. ld/ * emultempl/ppc32elf.em (params): Init new field. (OPTION_SPECULATE_INDIRECT_JUMPS): Define. (OPTION_NO_SPECULATE_INDIRECT_JUMPS): Define. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. * emultempl/ppc64elf.em (params): Init new field. (OPTION_SPECULATE_INDIRECT_JUMPS): Define. (OPTION_NO_SPECULATE_INDIRECT_JUMPS): Define. (PARSE_AND_LIST_LONGOPTS): Handle --speculate-indirect-jumps. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Likewise. * ld.texinfo (--no-plt-thread-safe): Correct itemx. (--speculate-indirect-jumps): Document. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/powerpc.exp: Disable plt alignment and speculation barriers on various tests.
60 lines
1.8 KiB
Makefile
60 lines
1.8 KiB
Makefile
#source: relbrlt.s
|
|
#as: -a64
|
|
#ld: -melf64ppc --no-plt-align --speculate-indirect-jumps --no-ld-generated-unwind-info --emit-relocs
|
|
#objdump: -Dr
|
|
|
|
.*
|
|
|
|
Disassembly of section \.text:
|
|
|
|
0*100000c0 <_start>:
|
|
[0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .*
|
|
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c
|
|
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
|
|
[0-9a-f ]*: (49 bf 00 1d|1d 00 bf 49) bl .*
|
|
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf002c
|
|
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
|
|
[0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .*
|
|
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0030
|
|
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
|
|
[0-9a-f ]*: 00 00 00 00 \.long 0x0
|
|
[0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start>
|
|
\.\.\.
|
|
|
|
[0-9a-f ]*<.*long_branch.*>:
|
|
[0-9a-f ]*: (49 bf 00 1c|1c 00 bf 49) b .* <far>
|
|
[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc
|
|
|
|
[0-9a-f ]*<.*plt_branch.*>:
|
|
[0-9a-f ]*: (e9 82 80 f8|f8 80 82 e9) ld r12,-32520\(r2\)
|
|
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f8
|
|
[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
|
|
[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
|
|
|
|
[0-9a-f ]*<.*plt_branch.*>:
|
|
[0-9a-f ]*: (e9 82 81 00|00 81 82 e9) ld r12,-32512\(r2\)
|
|
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f0100
|
|
[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
|
|
[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
|
|
\.\.\.
|
|
|
|
0*137e00fc <far>:
|
|
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
|
|
\.\.\.
|
|
|
|
0*13bf00ec <far2far>:
|
|
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
|
|
\.\.\.
|
|
|
|
0*157e00f0 <huge>:
|
|
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
|
|
|
|
Disassembly of section \.branch_lt:
|
|
|
|
0*157f00f8 .*:
|
|
[0-9a-f ]*: (00 00 00 00|ec 00 bf 13) .*
|
|
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00ec
|
|
[0-9a-f ]*: (13 bf 00 ec|00 00 00 00) .*
|
|
[0-9a-f ]*: (00 00 00 00|f0 00 7e 15) .*
|
|
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00f0
|
|
[0-9a-f ]*: (15 7e 00 f0|00 00 00 00) .*
|