1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
111 lines
3.5 KiB
Text
111 lines
3.5 KiB
Text
# Copyright 2017-2024 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# This file is part of the gdb testsuite.
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# Tests decoding of various sparc64 registers.
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# At the moment, only few registers are tested, but more can be added in future.
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require {istarget "sparc64*-*-linux*"}
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standard_testfile .S
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if { [prepare_for_testing "failed to prepare" ${testfile} ${srcfile}] } {
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return -1
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}
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if {![runto_main]} {
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return 0
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}
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##########################################
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gdb_test "break $srcfile:test_ccr" "Breakpoint \[0-9\] at .*"
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gdb_test "continue" "Continuing.*"
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gdb_test "si" "wr .*" "single step to the first %ccr test"
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proc test_ccr {exp_value exp_text {exp_insn "wr .*"}} {
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gdb_test "info register ccr" \
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"ccr $exp_value .*$exp_text.*" \
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"check %ccr register value equal to $exp_text"
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gdb_test "si" "$exp_insn" "single step to a next %ccr test after $exp_text"
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}
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test_ccr "0x1" "icc.c"
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test_ccr "0x2" "icc.v"
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test_ccr "0x3" "icc.c icc.v"
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test_ccr "0x4" "icc.z"
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test_ccr "0x5" "icc.c icc.z"
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test_ccr "0x6" "icc.v icc.z"
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test_ccr "0x7" "icc.c icc.v icc.z"
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test_ccr "0x8" "icc.n"
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test_ccr "0x9" "icc.c icc.n"
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test_ccr "0xa" "icc.v icc.n"
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test_ccr "0xb" "icc.c icc.v icc.n"
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test_ccr "0xc" "icc.z icc.n"
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test_ccr "0xd" "icc.c icc.z icc.n"
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test_ccr "0xe" "icc.v icc.z icc.n"
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test_ccr "0xf" "icc.c icc.v icc.z icc.n"
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test_ccr "0x10" "xcc.c"
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test_ccr "0x20" "xcc.v"
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test_ccr "0x30" "xcc.c xcc.v"
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test_ccr "0x40" "xcc.z"
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test_ccr "0x50" "xcc.c xcc.z"
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test_ccr "0x60" "xcc.v xcc.z"
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test_ccr "0x70" "xcc.c xcc.v xcc.z"
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test_ccr "0x80" "xcc.n"
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test_ccr "0x90" "xcc.c xcc.n"
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test_ccr "0xa0" "xcc.v xcc.n"
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test_ccr "0xb0" "xcc.c xcc.v xcc.n"
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test_ccr "0xc0" "xcc.z xcc.n"
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test_ccr "0xd0" "xcc.c xcc.z xcc.n"
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test_ccr "0xe0" "xcc.v xcc.z xcc.n" "retl"
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test_ccr "0xf0" "xcc.c xcc.v xcc.z xcc.n" "nop"
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##########################################
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##########################################
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set lno [gdb_get_line_number "sparc64-regs.exp: after first %fsr" $srcfile]
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gdb_test "break $srcfile:$lno" "Breakpoint \[0-9\] at .*" \
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"forward breakpoint to first %fsr test"
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gdb_test "continue" "Continuing.*"
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proc test_fsr {exp_value exp_text} {
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gdb_test "info register fsr" \
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"fsr $exp_value .*$exp_text.*" \
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"check %fsr register value equal to $exp_text"
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gdb_test "si" "stx .*" "single step to a next %fsr test (I.) after $exp_text"
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gdb_test "si" "ldx .*" "single step to a next %fsr test (II.) after $exp_text"
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gdb_test "si" "sllx .*" "single step to a next %fsr test (III.) after $exp_text"
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}
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test_fsr "0x1" "NXC"
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test_fsr "0x2" "DZC"
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test_fsr "0x4" "UFC"
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test_fsr "0x8" "OFC"
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test_fsr "0x10" "NVC"
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test_fsr "0x20" "NXA"
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test_fsr "0x40" "DZA"
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test_fsr "0x80" "UFA"
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test_fsr "0x100" "OFA"
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test_fsr "0x200" "NVA"
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test_fsr "0x800000" "NXM"
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test_fsr "0x1000000" "DZM"
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test_fsr "0x2000000" "UFM"
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test_fsr "0x4000000" "OFM"
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test_fsr "0x8000000" "NVM"
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##########################################
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