1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
325 lines
8.2 KiB
Text
325 lines
8.2 KiB
Text
# Copyright (C) 2018-2024 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# This file is part of the gdb testsuite.
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# Test access to HTM (Hardware Transactional Memory) registers. The
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# tests read the values of various registers before stepping the
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# inferior through a "tbegin." instruction to start a transaction,
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# then the checkpointed versions of the registers are checked against
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# the pre-transactional values. Then, new values are written to some
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# of the checkpointed registers, these values are read back and saved,
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# the inferior continues until the transaction aborts, and the regular
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# registers are then checked against the saved values, because the
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# abort should have reverted the registers to these values.
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require {istarget "powerpc*-*-linux*"}
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standard_testfile .c .gen.c
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# First check if our processor and kernel support access to
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# the registers we need and to the HTM facility.
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proc check_register_access { regname } {
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global gdb_prompt
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set test "$regname register access"
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gdb_test_multiple "info reg $regname" "$test" {
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-re "Invalid register.*\r\n$gdb_prompt $" {
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unsupported "$test"
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return 0
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}
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-re "\r\n$regname.*\r\n$gdb_prompt $" {
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pass "$test"
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return 1
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}
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}
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return 0
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}
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proc check_htm_support {} {
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global gdb_prompt
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set test "htm support"
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gdb_test_multiple "stepi" "$test" {
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-re "Illegal instruction.*\r\n$gdb_prompt $" {
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unsupported $test
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return 0
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}
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-re "nop.*\r\n$gdb_prompt $"
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{
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pass $test
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return 1
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}
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}
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return 0;
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}
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with_test_prefix "check htm support" {
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set gen_src [standard_output_file $srcfile2]
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gdb_produce_source $gen_src {
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int main () {
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asm volatile ("tbegin."); // marker
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asm volatile ("nop");
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return 0;
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}
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}
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if {[build_executable "compile" $binfile $gen_src {debug}] == -1} {
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return
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}
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clean_restart $binfile
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# Displaced-stepping a tbegin. causes problems,
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# so we make the breakpoint temporary.
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gdb_breakpoint [gdb_get_line_number "marker" "$gen_src"] temporary
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gdb_run_cmd
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# Wait for the prompt.
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if {[gdb_test "" "Temporary breakpoint.*"] != 0 } {
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return
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}
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# Make sure that we stopped at the right place (just before tbegin. is
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# executed).
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if { [gdb_test "x/i \$pc" "=> $hex.*:.*tbegin\\..*" "disassemble tbegin"] != 0} {
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return
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}
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if {![check_register_access "vs0"]} {
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return
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}
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if {![check_register_access "texasr"]} {
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return
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}
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if {![check_register_access "dscr"]} {
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return
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}
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if {![check_register_access "ppr"]} {
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return
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}
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if {![check_register_access "tar"]} {
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return
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}
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if {![check_htm_support]} {
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return
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}
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}
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# Now do the actual test.
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if {[build_executable "compile" $binfile $srcfile {debug}] == -1} {
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return
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}
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clean_restart $binfile
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gdb_breakpoint [gdb_get_line_number "first marker"] temporary
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gdb_run_cmd
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# Wait for the prompt.
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gdb_test "" "Temporary breakpoint.*"
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if {[gdb_test "x/i \$pc" "=> $hex.*:.*tbegin\\..*" "disassemble tbegin"] != 0} {
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return
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}
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# Now we write non-zero values to some registers, then read the values
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# of various registers, then stepi to start the transaction. The
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# checkpointed register state should correspond to the values we read.
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# Write to the GPRs
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for {set i 0} {$i < 32} {incr i 1} {
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gdb_test_no_output "set \$r$i = $i"
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}
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gdb_test_no_output "set \$xer = 0xc0000000"
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# FPRs
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gdb_test_no_output "set \$f0 = 0.5"
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for {set i 1} {$i < 32} {incr i 1} {
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gdb_test_no_output "set \$f$i = \$f[expr $i - 1] + 1.0"
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}
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gdb_test_no_output "set \$fpscr = 0x84005000"
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# VRs
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for {set i 0} {$i < 32} {incr i 1} {
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for {set j 0} {$j < 4} {incr j 1} {
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gdb_test_no_output "set \$vr$i.v4_int32\[$j\] = $i"
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}
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}
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gdb_test_no_output "set \$dscr = 0x2"
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gdb_test_no_output "set \$tar = &main" "set tar"
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# Get the pre-transactional value of the registers.
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for {set i 0} {$i < 32} {incr i 1} {
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set "r$i" [get_hexadecimal_valueof "\$r$i" "default0"]
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}
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set cr [get_hexadecimal_valueof "\$cr" "default0"]
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set xer [get_hexadecimal_valueof "\$xer" "default0"]
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set lr [get_hexadecimal_valueof "\$lr" "default0"]
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set ctr [get_hexadecimal_valueof "\$ctr" "default0"]
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for {set i 0} {$i < 32} {incr i 1} {
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set "f$i" [get_valueof "" "\$f$i" "default0"]
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}
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set fpscr [get_hexadecimal_valueof "\$fpscr" "default0"]
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for {set i 0} {$i < 32} {incr i 1} {
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set "vr$i" [get_hexadecimal_valueof "\$vr$i.uint128" "default0"]
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}
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set vscr [get_hexadecimal_valueof "\$vscr" "default0"]
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set vrsave [get_hexadecimal_valueof "\$vrsave" "default0"]
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for {set i 0} {$i < 64} {incr i 1} {
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set "vs$i" [get_hexadecimal_valueof "\$vs$i.uint128" "default0"]
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}
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set dscr [get_hexadecimal_valueof "\$dscr" "default0"]
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set ppr [get_hexadecimal_valueof "\$ppr" "default0"]
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set tar [get_hexadecimal_valueof "\$tar" "default0"]
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gdb_test "stepi" "asm.*bc.*"
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proc test_register_match {reg_name reg_var_name hex} {
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set test "$reg_name matches $reg_var_name"
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# In some infrequent cases CXER doesn't match the
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# pre-transactional XER, possibly due to a linux kernel bug.
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set should_xfail 0
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if [istarget "powerpc*-*-linux*" && reg_name == "cxer"] {
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set should_xfail 1
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}
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upvar $reg_var_name expected_val
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if {$hex} {
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set actual_val [get_hexadecimal_valueof "\$$reg_name" "default1"]
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} else {
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set actual_val [get_valueof "" "\$$reg_name" "default1"]
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}
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if { "$expected_val" == "$actual_val" } {
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pass $test
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} else {
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if {$should_xfail} {
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xfail $test
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} else {
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fail $test
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}
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}
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}
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for {set i 0} {$i < 32} {incr i 1} {
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test_register_match "cr$i" "r$i" 1
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}
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test_register_match "ccr" "cr" 1
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test_register_match "cxer" "xer" 1
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test_register_match "clr" "lr" 1
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test_register_match "cctr" "ctr" 1
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for {set i 0} {$i < 32} {incr i 1} {
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test_register_match "cf$i" "f$i" 0
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}
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test_register_match "cfpscr" "fpscr" 1
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for {set i 0} {$i < 32} {incr i 1} {
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test_register_match "cvr$i.uint128" "vr$i" 1
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}
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test_register_match "cvscr" "vscr" 1
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test_register_match "cvrsave" "vrsave" 1
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for {set i 0} {$i < 64} {incr i 1} {
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test_register_match "cvs$i.uint128" "vs$i" 1
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}
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test_register_match "cdscr" "dscr" 1
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test_register_match "cppr" "ppr" 1
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test_register_match "ctar" "tar" 1
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# Support for writing to the checkpointed registers is not
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# currently available in the gdbserver stub.
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if [target_is_gdbserver] {
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unsupported "write to checkpointed registers"
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return
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}
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# Now write different values to some of the checkpointed registers and
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# check that the transaction abort reverts the register to these
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# values.
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for {set i 0} {$i < 32} {incr i 1} {
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gdb_test_no_output "set \$cr$i = $i + 0xC00"
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}
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gdb_test_no_output "set \$cf0 = 0.25"
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for {set i 1} {$i < 32} {incr i 1} {
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gdb_test_no_output "set \$cf$i = \$cf[expr $i - 1] + 1.0"
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}
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for {set i 0} {$i < 32} {incr i 1} {
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for {set j 0} {$j < 4} {incr j 1} {
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gdb_test_no_output "set \$cvr$i.v4_int32\[$j\] = $i + 0xF00"
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}
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}
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# Read back the values.
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with_test_prefix "after write" {
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for {set i 0} {$i < 32} {incr i 1} {
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set "cr$i" [get_hexadecimal_valueof "\$cr$i" "default0"]
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}
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for {set i 0} {$i < 32} {incr i 1} {
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set "cf$i" [get_valueof "" "\$cf$i" "default0"]
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}
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for {set i 0} {$i < 64} {incr i 1} {
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set "cvs$i" [get_hexadecimal_valueof "\$cvs$i.uint128" "default0"]
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}
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}
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gdb_breakpoint [gdb_get_line_number "second marker"]
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gdb_test "continue"
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with_test_prefix "after transaction failure" {
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for {set i 0} {$i < 32} {incr i 1} {
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test_register_match "r$i" "cr$i" 1
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}
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for {set i 0} {$i < 32} {incr i 1} {
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test_register_match "f$i" "cf$i" 0
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}
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for {set i 0} {$i < 64} {incr i 1} {
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test_register_match "vs$i.uint128" "cvs$i" 1
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}
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}
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