For a fix I intend to submit, I would need a function that counts the
number of set bits in a word. There is __builtin_popcount that is
supported by gcc and clang, but there is also a gnulib module that wraps
that and provides a fallback for other compilers, so I think it would be
good to use it.
I also noticed that there is a bitcount function in arch/arm.c, so I
thought that as a first step I would replace that one with the gnulib
count-one-bits module. This is what this patch does.
The gnulib module provides multiple functions, with various parameter
length (unsigned int, unsigned long int, unsigned long long int), I
chose the one that made sense for each call site based on the argument
type.
gnulib/ChangeLog:
* update-gnulib.sh (IMPORTED_GNULIB_MODULES): Import
count-one-bits module.
* configure: Re-generate.
* aclocal.m4: Re-generate.
* Makefile.in: Re-generate.
* import/count-one-bits.c: New file.
* import/count-one-bits.h: New file.
* import/Makefile.am: Re-generate.
* import/Makefile.in: Re-generate.
* import/m4/gnulib-cache.m4: Re-generate.
* import/m4/gnulib-comp.m4: Re-generate.
* import/m4/count-one-bits.m4: New file.
gdb/ChangeLog:
* arm-tdep.c: Include count-one-bits.h.
(cleanup_block_store_pc): Use count_one_bits.
(cleanup_block_load_pc): Use count_one_bits.
(arm_copy_block_xfer): Use count_one_bits.
(thumb2_copy_block_xfer): Use count_one_bits.
(thumb_copy_pop_pc_16bit): Use count_one_bits.
* arch/arm-get-next-pcs.c: Include count-one-bits.h.
(thumb_get_next_pcs_raw): Use count_one_bits.
(arm_get_next_pcs_raw): Use count_one_bits_l.
* arch/arm.c (bitcount): Remove.
* arch/arm.h (bitcount): Remove.
I am keeping the (int) casts because a future patch will change the type
to bool.
gdb/ChangeLog:
2020-02-12 Christian Biesinger <cbiesinger@google.com>
* arm-tdep.c (arm_dump_tdep): Print more fields of tdep.
The speed optimization from commit 5f6cac4085
made GDB skip reloading all symbols when the same symbol file is reloaded.
As a result, ARM targets only read the mapping symbols the first time we
load a symbol file. When reloaded, the speed optimization above will
cause an early return and gdbarch_record_special_symbol won't be called to
save mapping symbol data, which in turn affects disassembling of thumb
instructions.
First load and correct disassemble output:
Dump of assembler code for function main:
0x0000821c <+0>: bx pc
0x0000821e <+2>: nop
0x00008220 <+4>: mov r0, #0
0x00008224 <+8>: bx lr
Second load and incorrect disassemble output:
Dump of assembler code for function main:
0x0000821c <+0>: bx pc
0x0000821e <+2>: nop
0x00008220 <+4>: movs r0, r0
0x00008222 <+6>: b.n 0x8966
0x00008224 <+8>: vrhadd.u16 d14, d14, d31
This happens because the mapping symbol data is stored in an objfile_key-based
container, and that data isn't preserved across the two symbol loading
operations.
The following patch fixes this by storing the mapping symbol data in a
bfd_key-based container, which doesn't change as long as the bfd is the same.
I've also added a new test to verify the correct disassemble output.
gdb/ChangeLog:
2019-11-01 Luis Machado <luis.machado@linaro.org>
PR gdb/25124
* arm-tdep.c (arm_per_objfile): Rename to ...
(arm_per_bfd): ... this.
(arm_objfile_data_key): Rename to ...
(arm_bfd_data_key): ... this.
(arm_find_mapping_symbol): Adjust access to new bfd_key-based
data.
(arm_record_special_symbol): Likewise.
gdb/testsuite/ChangeLog:
2019-11-01 Luis Machado <luis.machado@linaro.org>
PR gdb/25124
* gdb.arch/pr25124.S: New file.
* gdb.arch/pr25124.exp: New file.
Change-Id: I22c3e6ebe9bfedad66d56fe9656994fa1761c485
Based on feedback from Tromey, update the use of objfile_key in gdb/arm-tdep.c
to use bfd_key instead. That way we don't have to re-create the exception
handling data all over again if it was done before for the same BFD.
gdb/ChangeLog:
2019-10-31 Luis Machado <luis.machado@linaro.org>
* arm-tdep.c (arm_exidx_data_key): Use bfd_key instead of
objfile_key.
(arm_exidx_new_objfile): Adjust to use objfile->obfd instead of
objfile to fetch per-bfd data.
(arm_find_exidx_entry): Likewise.
Change-Id: Ia7b3208ea8d788414600fa6d770ac76db0562859
Instead of having several extern declarations for arm_apcs_32
in a few .c files, declare it in arm-tdep.h. This file is already
included from these .c files.
gdb/ChangeLog:
2019-09-19 Christian Biesinger <cbiesinger@google.com>
* arm-linux-nat.c: Remove extern declaration for arm_apcs_32.
* arm-linux-tdep.c: Likewise.
* arm-nbsd-nat.c: Likewise.
* arm-tdep.h: Declare arm_apcs_32.
GDB is not able to execute "step" command on function calls of Armv8-M cmse secure entry functions.
Everytime GNU linker come across definition of any cmse secure entry function in object file(s),
it creates two new instructions secure gateway (sg) and original branch destination (b.w),
place those two instructions in ".gnu.sgstubs" section of executable.
Any function calls to these cmse secure entry functions is re-directed through secure gateway (sg)
present in ".gnu.sgstubs" section.
Example:
Following is a function call to cmse secure entry function "foo":
...
bl xxxx <foo> --->(a)
...
<foo>
xxxx: push {r7, lr}
GNU linker on finding out "foo" is a cmse secure entry function, created sg and b.w instructions and
place them in ".gnu.sgstubs" section (marked by c).
The "bl" instruction (marked by a) which is a call to cmse secure entry function is modified by GNU linker
(as marked by b) and call flow is re-directly through secure gateway (sg) in ".gnu.sgstubs" section.
...
bl yyyy <foo> ---> (b)
...
section .gnu.sgstubs: ---> (c)
yyyy <foo>
yyyy: sg // secure gateway
b.w xxxx <__acle_se_foo> // original_branch_dest
...
0000xxxx <__acle_se_foo>
xxxx: push {r7, lr} ---> (d)
On invoking GDB, when the control is at "b" and we pass "step" command, the pc returns "yyyy"
(sg address) which is a trampoline and which does not exist in source code. So GDB jumps
to next line without jumping to "__acle_se_foo" (marked by d).
The above details are published on the Arm website [1], please refer to section 5.4 (Entry functions)
and section 3.4.4 (C level development flow of secure code).
[1] https://developer.arm.com/architectures/cpu-architecture/m-profile/docs/ecm0359818/latest/armv8-m-security-extensions-requirements-on-development-tools-engineering-specification
This patch fixes above problem by returning target pc "xxxx" to GDB on executing "step"
command at "b", so that the control jumps to "__acle_se_foo" (marked by d).
gdb/ChangeLog:
* arm-tdep.c (arm_skip_cmse_entry): New function.
(arm_is_sgstubs_section): New function.
(arm_skip_stub): Add call to arm_skip_cmse_entry function.
gdb/testsuite/ChangeLog:
* gdb.arch/arm-cmse-sgstubs.c: New test.
* gdb.arch/arm-cmse-sgstubs.exp: New file.
Remove the xml tests. Now that it has been proven the new descriptions
are identical, there is no need to keep testing that. Also, it would
prevent the old xml files from being removed.
Remove the old xml files from gdbserver and delete them.
gdb/ChangeLog:
* arm-tdep.c (_initialize_arm_tdep): Remove xml tests.
* features/arm/arm-with-iwmmxt.c: Remove.
* features/arm/arm-with-iwmmxt.xml: Remove.
* features/arm/arm-with-m-fpa-layout.c: Remove.
* features/arm/arm-with-m-fpa-layout.xml: Remove.
* features/arm/arm-with-m-vfp-d16.c: Remove.
* features/arm/arm-with-m-vfp-d16.xml: Remove.
* features/arm/arm-with-m.c: Remove.
* features/arm/arm-with-m.xml: Remove.
* features/arm/arm-with-neon.c: Remove.
* features/arm/arm-with-neon.xml: Remove.
* features/arm/arm-with-vfpv2.c: Remove.
* features/arm/arm-with-vfpv2.xml: Remove.
* features/arm/arm-with-vfpv3.c: Remove.
* features/arm/arm-with-vfpv3.xml: Remove.
gdb/gdbserver/ChangeLog:
2019-07-05 Alan Hayward <alan.hayward@arm.com>
* configure.srv: Remove Arm xml files.
Use the record_xml_tdesc tests to prove the new target descriptions
are identical to the previous xml file ones.
This is tested as part of gdb.gdb/unittest.exp.
gdb/ChangeLog:
* arm-tdep.c (_initialize_arm_tdep): Add xml regression tests.
In arm arm_create_target_description and
aarch32_create_target_description create feature based target descriptions
instead of returning the old style descriptions.
Ensure the descriptions are created in exactly the same way as the old xml
files.
Remove the old initialize calls.
gdb/ChangeLog:
* arch/aarch32.c (aarch32_create_target_description): Create
target descriptions using features.
* arch/arm.c (arm_create_target_description)
(arm_create_mprofile_target_description): Likewise.
* arm-tdep.c (_initialize_arm_tdep): Remove tdesc init calls.
Switch the Arm target to get target descriptions via arm_read_description
and aarch32_read_description, in the same style as other feature targets.
Add an enum to specify the different types - this will also be of use to
gdbserver in a later patch.
Under the hood return the same existing pre-feature target descriptions.
gdb/ChangeLog:
* Makefile.in: Add new files.
* aarch32-tdep.c: New file.
* aarch32-tdep.h: New file.
* aarch64-linux-nat.c (aarch64_linux_nat_target::read_description):
Call aarch32_read_description.
* arch/aarch32.c: New file.
* arch/aarch32.h: New file.
* arch/arm.c (arm_create_target_description)
(arm_create_mprofile_target_description): New function.
* arch/arm.h (arm_fp_type, arm_m_profile_type): New enum.
(arm_create_target_description)
(arm_create_mprofile_target_description): New declaration.
* arm-fbsd-tdep.c (arm_fbsd_read_description_auxv): Call
read_description functions.
* arm-linux-nat.c (arm_linux_nat_target::read_description):
Likewise.
* arm-linux-tdep.c (arm_linux_core_read_description): Likewise.
* arm-tdep.c (tdesc_arm_list): New variable.
(arm_register_g_packet_guesses): Call create description functions.
(arm_read_description) (arm_read_mprofile_description): New
function.
* arm-tdep.h (arm_read_description)
(arm_read_mprofile_description): Add declaration.
* configure.tgt: Add new files.
This changes arm-tdep.c to use the type-safe registry, removing a use
of VEC in the process.
2019-07-10 Tom Tromey <tromey@adacore.com>
* arm-tdep.c (arm_exidx_entry_s): Remove typedef. Don't define
VEC.
(struct arm_exidx_entry): New method operator<.
(struct arm_exidx_data) <section_maps>: Change type.
(arm_exidx_data_free): Remove.
(arm_exidx_data_key): Change type. Move lower.
(arm_exidx_new_objfile): Update.
(arm_compare_exidx_entries): Remove.
(arm_find_exidx_entry, _initialize_arm_tdep)
Both targets were using a mixture of defines and hardcoded values.
Add a standard set in arch/arm.h and use throughout, ensuring that
none of the existing sizes change.
No functionality changes.
gdb/ChangeLog:
* aarch32-linux-nat.h (VFP_REGS_SIZE): Remove define.
* aarch64-linux-nat.c (fetch_fpregs_from_thread)
(store_fpregs_to_thread)
(aarch64_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE.
* arch/arm.h (IWMMXT_VEC_REGISTER_SIZE, ARM_CORE_REGS_SIZE)
(ARM_FP_REGS_SIZE, ARM_VFP2_REGS_SIZE, ARM_VFP3_REGS_SIZE)
(IWMMXT_REGS_SIZE): Add define.
* arm-linux-nat.c (IWMMXT_REGS_SIZE): Remove define.
(fetch_vfp_regs, store_vfp_regs)
(arm_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE.
* arm-tdep.c (arm_register_g_packet_guesses): Use new defines.
gdb/gdbserver/ChangeLog:
* linux-aarch32-low.c (arm_read_description, arm_regsets): Use new
defines.
* linux-arm-low.c (arm_read_description, arm_regsets): Likewise.
Add ARM_ to the front of INT_REGISTER_SIZE, FP_REGISTER_SIZE and
ARM_VFP_REGISTER_SIZE to make it obvious they are for the Arm target.
Move the defines to arch/arm.h
No functionality changes.
gdb/ChangeLog:
* arch/arm-get-next-pcs.c (thumb_get_next_pcs_raw): Use ARM_
defines.
* arch/arm-linux.c (arm_linux_sigreturn_next_pc_offset): Likewise.
* arch/arm.h (INT_REGISTER_SIZE) Rename from...
(ARM_INT_REGISTER_SIZE): ...to this.
(ARM_FP_REGISTER_SIZE) (ARM_VFP_REGISTER_SIZE): Add define.
* arm-linux-tdep.c (ARM_LINUX_JB_ELEMENT_SIZE)
(ARM_LINUX_SIZEOF_GREGSET, arm_linux_supply_gregset)
(arm_linux_collect_gregset, supply_nwfpe_register)
(collect_nwfpe_register, arm_linux_collect_nwfpe): Use ARM_
defines.
* arm-linux-tdep.h (ARM_LINUX_SIZEOF_NWFPE, NWFPE_FPSR_OFFSET)
(NWFPE_FPCR_OFFSET, NWFPE_TAGS_OFFSET): Likewise
* arm-nbsd-tdep.c (ARM_NBSD_JB_ELEMENT_SIZE): Likewise.
* arm-tdep.c (arm_push_dummy_call, arm_extract_return_value)
(arm_return_in_memory, arm_store_return_value)
(arm_get_longjmp_target, arm_register_g_packet_guesses)
(arm_record_ld_st_multiple): Likewise.
* arm-tdep.h (FP_REGISTER_SIZE, VFP_REGISTER_SIZE): Remove.
* arm-wince-tdep.c (ARM_WINCE_JB_ELEMENT_SIZE): Use ARM_ defines.
Both targets define DISPLACED_MODIFIED_INSNS, each with different values.
Add ARM_ and AARCH64_ to the start of the name to prevent confusion.
No functionality changes.
gdb/ChangeLog:
* aarch64-linux-tdep.c (aarch64_linux_init_abi): Use
AARCH64_DISPLACED_MODIFIED_INSNS.
* aarch64-tdep.c (struct aarch64_displaced_step_data)
(aarch64_displaced_step_copy_insn): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
(AARCH64_DISPLACED_MODIFIED_INSNS): ...to this.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Use
ARM_DISPLACED_MODIFIED_INSNS.
* arm-tdep.c (arm_gdbarch_init): Likewise.
* arm-tdep.h (DISPLACED_MODIFIED_INSNS): Rename from..
(ARM_DISPLACED_MODIFIED_INSNS): ...to this.
(struct arm_displaced_step_closure): Use
ARM_DISPLACED_MODIFIED_INSNS.
After seeing Simon's patch to change arm_per_objfile to use new and
delete, I realized it is now simple to change arm_objfile_data_key to
use the type-safe registry.
gdb/ChangeLog
2019-06-27 Tom Tromey <tromey@adacore.com>
* arm-tdep.c (arm_objfile_data_key): Move lower. Change type to
objfile_key.
(arm_find_mapping_symbol, arm_record_special_symbol)
(_initialize_arm_tdep): Update.
(arm_objfile_data_free): Remove.
On Arm, the OS may use the full version string for the arch name when
installing the compiler, for example armv7hl-redhat-linux-gnueabi-gcc.
Implement gdbarch_gnu_triplet_regexp for Arm to allow this to be detected.
Ensure that other Arm targets (eg iwmmxt) are not affected.
This fixes the compile/ set of tests on those systems.
gdb/ChangeLog:
2019-06-26 Alan Hayward <alan.hayward@arm.com>
* arm-tdep.c (arm_gnu_triplet_regexp): New function.
(arm_gdbarch_init): Add arm_gnu_triplet_regexp.
Somebody on IRC reported a while ago that loading a big ARM program in
GDB was very slow. Their profiling pointed out that a big amount of
time was spent in
VEC_safe_insert (arm_mapping_symbol_s, *map_p, idx, &new_map_sym);
I was able to verify this as well.
ARM mapping symbols are special ELF symbols named $a, $d and $t
indicating that symbols starting at this address up to the next mapping
symbol (in terms of address) are of type "ARM code", "data" and "Thumb
code", respectively. GDB records these symbols in vectors (one for each
section) in arm-tdep.c. These vectors are sorted by symbol address, to
allow for quick lookup. The current approach is to insert new symbols
at the right position to keep the vectors sorted at all time. This is
done based on the assumption that mapping symbols come already almost
sorted from the binary, as explains this comment in
arm_record_special_symbol:
/* Assume that most mapping symbols appear in order of increasing
value. If they were randomly distributed, it would be faster to
always push here and then sort at first use. */
Well, it turns out this is not the case. The original reporter
mentioned that mapping symbols in their binaries are not nearly sorted,
and this is not my experience either (at least in the binary used in the
benchmark below). So if the values don't come nearly sorted, doing
insertions to keep the vectors sorted ends up being of the order of
number_of_mapping_symbols ^ 2.
This patch changes it just like the comment above says, to just append
to the vector in arm_record_special_symbol and sort the vector on first
use.
Benchmark
=========
I have done some benchmarks using an --enable-targets=all GDB, compiled
with -O2, running on x86-64 and parsing file
dce18d22e5c2ecb6a3a57372f4e6ef614130bc.debug from this package:
16608691/+files/firefox-dbg_66.0.3+build1-0ubuntu1_armhf.deb
This file is the separate debug info for libxul.so (part of firefox) for
ARM.
I have added some traces to measure the execution time of just
elf_symtab_read and ran GDB like this:
./gdb --data-directory=data-directory -nx -batch .../path/to/usr/lib/debug/.build-id/65/dce18d22e5c2ecb6a3a57372f4e6ef614130bc.debug
Since the new code sorts the vectors on first use, it would be difficult
to benchmark it as-is and be fair, since the "before" version does more
work in elf_symtab_read. So I have actually benchmarked a version of
the patch that did sort all the vectors at the end of elf_symtab_read,
so the sorting would be considered in the measured execution time.
Here's the measured execution time of elf_symtab_read, averaged on 3
runs:
insert sorted (before): 28.678s
sort after (after): 1.760s
And here's the total execution time of the command above (just one run).
The time is now mostly spent in reading DWARF.
insert sorted: 71.12s user 2.71s system 99% cpu 1:14.03 total
sort after: 46.42s user 2.60s system 99% cpu 49.147 total
I tried for fun on my Raspberry Pi 3, the run time of
elf_symtab_read goes from ~259s to ~9s, reading the same file.
gdb/ChangeLog:
* arm-tdep.c (struct arm_per_objfile) <section_maps_sorted>: New
field.
(arm_find_mapping_symbol): Sort mapping symbol vectors on first
use.
(arm_record_special_symbol): Don't insert new symbol in sorted
position, push it at the end.
This patch replaces VEC (arm_mapping_symbol) with an std::vector. No
functional changes intended.
gdb/ChangeLog:
* arm-tdep.c (struct arm_mapping_symbol) (operator <): New.
(arm_mapping_symbol_s): Remove.
(DEF_VEC_O(arm_mapping_symbol_s)): Remove.
(arm_mapping_symbol_vec): New typedef.
(struct arm_per_objfile): Add constructor.
<section_maps>: Change type to
std::unique_ptr<arm_mapping_symbol_vec[]>.
(arm_compare_mapping_symbols): Remove.
(arm_find_mapping_symbol): Adjust to section_maps type change.
(arm_objfile_data_free): Call delete on arm_per_objfile.
(arm_record_special_symbol): Adjust to section_maps type change.
Allocate arm_per_objfile with new.
Replaces use of arm_type_align with common type_align function.
Doing this fixes a bug in arm_type_align where static fields are
considered as part of the alignment calculation of a struct, which
results in arguments passed on the stack being misaligned, this bug
was causing a failure in gdb.cp/many-args.exp.
Part of the old arm_type_align is retained and used as the gdbarch
type align callback in order to correctly align vectors.
gdb/ChangeLog:
* arm-tdep.c (arm_type_align): Only handle vector override case.
(arm_push_dummy_call): Use type_align.
(arm_gdbarch_init): Register arm_type_align gdbarch function.
Make use of the default gdbarch methods for gdbarch_dummy_id,
gdbarch_unwind_pc, and gdbarch_unwind_sp where possible.
I have not tested this change but, by inspecting the code, I believe
the default methods are equivalent to the code being deleted.
gdb/ChangeLog:
* gdb/arm-tdep.c (arm_dummy_id): Delete.
(arm_unwind_pc): Delete.
(arm_unwind_sp): Delete.
(arm_gdbarch_init): Don't register deleted functions with gdbarch.
This commit applies all changes made after running the gdb/copyright.py
script.
Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.
gdb/ChangeLog:
Update copyright year range in all GDB files.
GDB tries to dereference the frame pointer in arm_scan_prologue as a
last resort to create frame information.
However, the more recent AAPCS ABI does not make use of a frame pointer.
This patch checks whether the specified arm_abi is AAPCS before
dereferencing the "frame pointer". If so, just return as efforts to use
it for restoring frame information won't work.
gdb/ChangeLog
2018-11-06 Marius Muench <marius.muench@eurecom.fr>
* arm-tdep.c (arm_scan_prologue): Don't dereference FP reg
when on AAPCS.
This fixes all the straightforward -Wshadow=local warnings in gdb. A
few standard approaches are used here:
* Renaming an inner (or outer, but more commonly inner) variable;
* Lowering a declaration to avoid a clash;
* Moving a declaration into a more inner scope to avoid a clash,
including the special case of moving a declaration into a loop header.
I did not consider any of the changes in this patch to be particularly
noteworthy, though of course they should all still be examined.
gdb/ChangeLog
2018-10-04 Tom Tromey <tom@tromey.com>
* ctf.c (SET_ARRAY_FIELD): Rename "u32".
* p-valprint.c (pascal_val_print): Split inner "i" variable.
* xtensa-tdep.c (xtensa_push_dummy_call): Declare "i" in loop
header.
* xstormy16-tdep.c (xstormy16_push_dummy_call): Declare "val" in
more inner scope.
* xcoffread.c (read_xcoff_symtab): Rename inner "symbol".
* varobj.c (varobj_update): Rename inner "newobj",
"type_changed".
* valprint.c (generic_emit_char): Rename inner "buf".
* valops.c (find_overload_match): Rename inner "temp".
(value_struct_elt_for_reference): Declare "v" in more inner
scope.
* v850-tdep.c (v850_push_dummy_call): Rename "len".
* unittests/array-view-selftests.c (run_tests): Rename inner
"vec".
* tui/tui-stack.c (tui_show_frame_info): Declare "i" in loop
header.
* tracepoint.c (merge_uploaded_trace_state_variables): Declare
"tsv" in more inner scope.
(print_one_static_tracepoint_marker): Rename inner
"tuple_emitter".
* tic6x-tdep.c (tic6x_analyze_prologue): Declare "inst" lower.
(tic6x_push_dummy_call): Don't redeclare "addr".
* target-float.c: Declare "dto" lower.
* symtab.c (lookup_local_symbol): Rename inner "sym".
(find_pc_sect_line): Rename inner "pc".
* stack.c (print_frame): Don't redeclare "gdbarch".
(return_command): Rename inner "gdbarch".
* s390-tdep.c (s390_prologue_frame_unwind_cache): Renam inner
"sp".
* rust-lang.c (rust_internal_print_type): Declare "i" in loop
header.
* rs6000-tdep.c (ppc_process_record): Rename inner "addr".
* riscv-tdep.c (riscv_push_dummy_call): Declare "info" in inner
scope.
* remote.c (remote_target::update_thread_list): Don't redeclare
"tp".
(remote_target::process_initial_stop_replies): Rename inner
"thread".
(remote_target::remote_parse_stop_reply): Don't redeclare "p".
(remote_target::wait_as): Don't redeclare "stop_reply".
(remote_target::get_thread_local_address): Rename inner
"result".
(remote_target::get_tib_address): Likewise.
Some variables are not used when !HAVE_ELF, so avoid declaring them in
that case.
gdb/ChangeLog:
* arm-tdep.c (arm_gdbarch_init): Declare attr_arch and
attr_profile in HAVE_ELF.
* rs6000-tdep.c (bfd_uses_spe_extensions): Declare vector_abi in
HAVE_ELF.
Implement MIPS target support for passing options to the disassembler,
complementing commit 65b48a8140 ("GDB: Add support for the new
set/show disassembler-options commands.").
This includes options that expect an argument, so adjust the generic
code and data structures used so as to handle such options. So as to
give backends syntax flexibility no specific delimiter has been defined
to separate options from their respective arguments, so it has to be
included as the last character of the option name. Completion code
however has not been adjusted and consequently option arguments cannot
be completed at this time.
Also the MIPS target has non-empty defaults for the options, so that ABI
names for the general-purpose registers respect our `set mips abi ...'
setting rather than always being determined from the ELF headers of the
binary file selected. Handle these defaults as implicit options, never
shown to the user and always prepended to the user-specified options, so
that the latters can override the defaults.
The resulting output for the MIPS target is as follows:
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
no-aliases Use canonical instruction forms.
msa Recognize MSA instructions.
virt Recognize the virtualization ASE instructions.
xpa Recognize the eXtended Physical Address (XPA) ASE
instructions.
ginv Recognize the Global INValidate (GINV) ASE instructions.
gpr-names=ABI Print GPR names according to specified ABI.
Default: based on binary being disassembled.
fpr-names=ABI Print FPR names according to specified ABI.
Default: numeric.
cp0-names=ARCH Print CP0 register names according to specified architecture.
Default: based on binary being disassembled.
hwr-names=ARCH Print HWR names according to specified architecture.
Default: based on binary being disassembled.
reg-names=ABI Print GPR and FPR names according to specified ABI.
reg-names=ARCH Print CP0 register and HWR names according to specified
architecture.
For the options above, the following values are supported for "ABI":
numeric 32 n32 64
For the options above, the following values are supported for "ARCH":
numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600
r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000
r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64
mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e
loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp
(gdb)
which corresponds to what `objdump --help' used to print for the MIPS
target, with minor formatting changes, most notably option argument
lists being wrapped, but also the amount of white space separating
options from the respective descriptions. The relevant part the new
code is now also used by `objdump --help', which means these formatting
changes apply to both outputs, except for argument list wrapping, which
is GDB-specific.
This also adds a separating new line between the heading and option
lists where descriptions are provided, hence:
(gdb) set architecture s390:31-bit
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
esa Disassemble in ESA architecture mode
zarch Disassemble in z/Architecture mode
insnlength Print unknown instructions according to length from first two bits
(gdb)
but:
(gdb) set architecture powerpc:common
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl,
821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300,
e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5,
power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge,
ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe,
spe2, titan, vle, vsx
(gdb)
Existing affected target backends have been adjusted accordingly.
This has been verified manually with:
(gdb) set architecture arm
(gdb) set architecture powerpc:common
(gdb) set architecture s390:31-bit
to cause no issues with the `show disassembler-options' and `set
disassembler-options' commands. A test case for the MIPS target has
also been provided, covering the default settings with ABI overrides as
well as disassembler option overrides.
2018-07-02 Maciej W. Rozycki <macro@mips.com>
Simon Marchi <simon.marchi@polymtl.ca>
include/
PR tdep/8282
* dis-asm.h (disasm_option_arg_t): New typedef.
(disasm_options_and_args_t): Likewise.
(disasm_options_t): Add `arg' member, document members.
(disassembler_options_mips): New prototype.
(disassembler_options_arm, disassembler_options_powerpc)
(disassembler_options_s390): Update prototypes.
opcodes/
PR tdep/8282
* mips-dis.c (mips_option_arg_t): New enumeration.
(mips_options): New variable.
(disassembler_options_mips): New function.
(print_mips_disassembler_options): Reimplement in terms of
`disassembler_options_mips'.
* arm-dis.c (disassembler_options_arm): Adapt to using the
`disasm_options_and_args_t' structure.
* ppc-dis.c (disassembler_options_powerpc): Likewise.
* s390-dis.c (disassembler_options_s390): Likewise.
gdb/
PR tdep/8282
* disasm.h (gdb_disassembler): Add
`m_disassembler_options_holder'. member
* disasm.c (get_all_disassembler_options): New function.
(gdb_disassembler::gdb_disassembler): Use it.
(gdb_buffered_insn_length_init_dis): Likewise.
(gdb_buffered_insn_length): Adjust accordingly.
(set_disassembler_options): Handle options with arguments.
(show_disassembler_options_sfunc): Likewise. Add a leading new
line if showing options with descriptions.
(disassembler_options_completer): Adapt to using the
`disasm_options_and_args_t' structure.
* mips-tdep.c (mips_disassembler_options): New variable.
(mips_disassembler_options_o32): Likewise.
(mips_disassembler_options_n32): Likewise.
(mips_disassembler_options_n64): Likewise.
(gdb_print_insn_mips): Don't set `disassembler_options'.
(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove
functions.
(mips_gdbarch_init): Always set `gdbarch_print_insn' to
`gdb_print_insn_mips'. Set `gdbarch_disassembler_options',
`gdbarch_disassembler_options_implicit' and
`gdbarch_valid_disassembler_options'.
* arm-tdep.c (_initialize_arm_tdep): Adapt to using the
`disasm_options_and_args_t' structure.
* gdbarch.sh (disassembler_options_implicit): New `gdbarch'
method.
(valid_disassembler_options): Switch from `disasm_options_t' to
the `disasm_options_and_args_t' structure.
* NEWS: Document `set disassembler-options' support for the MIPS
target.
* gdbarch.h: Regenerate.
* gdbarch.c: Regenerate.
gdb/doc/
PR tdep/8282
* gdb.texinfo (Source and Machine Code): Document `set
disassembler-options' support for the MIPS target.
gdb/testsuite/
PR tdep/8282
* gdb.arch/mips-disassembler-options.exp: New test.
* gdb.arch/mips-disassembler-options.s: New test source.
Remove regcache_raw_write, update all callers to use regcache::raw_write
instead.
gdb/ChangeLog:
* regcache.h (regcache_raw_write): Remove, update callers to use
regcache::raw_write instead.
* regcache.c (regcache_raw_write): Remove.
Remove regcache_raw_read, update all callers to use
readable_regcache::raw_read instead.
gdb/ChangeLog:
* regcache.h (regcache_raw_read): Remove, update callers to use
readable_regcache::raw_read instead.
* regcache.c (regcache_raw_read): Remove.
-Wduplicated-cond pointed out that arm_record_vfp_data_proc_insn
checks "opc1 == 0x0b" twice. I filed this a while ago as
PR tdep/20362.
Based on the ARM instruction manual at
https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf, I think the
instruction decoding in this function has two bugs.
First, opc1 is computed as:
opc1 = bits (arm_insn_r->arm_insn, 20, 23);
[...]
opc1 = opc1 & 0x04;
This means that tests like:
else if (opc1 == 0x01)
can never be true.
In the ARM manual, "opc1" corresponds to these bits:
name bit
r 20
q 21
D 22
p 23
... where the D bit is not used for VFP instruction decoding.
So, I believe this code should use ~0x04 instead.
Second, VDIV is recognized by the bits "pqrs" being equal to "1000".
This tranlates to opc1 == 0x08 -- not 0x0b. Note that pqrs==1001 is
an undefined encoding, which is probably why opc2 is not checked here;
this code doesn't seem to really deal with undefined encodings in
general, so I've left that as is.
I don't have an ARM machine or any reasonable way to test this.
ChangeLog
2018-05-07 Tom Tromey <tom@tromey.com>
PR tdep/20362:
* arm-tdep.c (arm_record_vfp_data_proc_insn): Properly mask off D
bit. Use correct value for VDIV.
I noticed the existence of -Wsuggest-override and so this patch
enables it for gdb. It found a few spots that could use "override".
Also I went ahead and removed all uses of the "OVERRIDE" macro.
Using override is beneficial because it makes it harder to change a
base class and then forget to change a derived class.
Tested by the buildbot.
ChangeLog
2018-04-27 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* warning.m4 (AM_GDB_WARNINGS): Add -Wsuggest-override.
* dwarf2loc.c (class dwarf_evaluate_loc_desc): Use "override", not
"OVERRIDE".
(class symbol_needs_eval_context): Likewise.
* dwarf2read.c (mock_mapped_index::symbol_name_count)
(mock_mapped_index::symbol_name_at): Use "override". Remove
"virtual".
* dwarf2-frame.c (dwarf_expr_executor::get_addr_index): Use
"override".
(class dwarf_expr_executor): Use "override", not "OVERRIDE".
* aarch64-tdep.c (instruction_reader::read): Use "override".
(instruction_reader_test::read): Likewise.
* arm-tdep.c (instruction_reader::read): Use "override".
(instruction_reader_thumb::read): Likewise.
gdbserver/ChangeLog
2018-04-27 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
Simon Marchi