Commit graph

14814 commits

Author SHA1 Message Date
GDB Administrator
4f075c06a3 Automatic date update in version.in 2018-09-06 00:00:45 +00:00
GDB Administrator
5e627001a0 Automatic date update in version.in 2018-09-05 00:00:32 +00:00
Jose E. Marchesi
e920c014ec bfd, sparc: avoid duplicated error messages on invalid relocations.
This patch avoids a duplicated error message when an invalid
relocation number is read from an object file in sparc-* ELF targets:

$ strip -g test.o
strip: test.o: unsupported relocation type 0xd7
strip: test.o: unsupported relocation type 0xd7
strip: test.o: bad value

Tested in x86_64-linux-gnu, sparc64-linux-gnu and sparc-linux-gnu
targets.

bfd/ChangeLog:

2018-09-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* elfxx-sparc.c (_bfd_sparc_elf_info_to_howto): Do not issue an
	error when an invalid relocation is passed;  this is already done
	by `_bfd_sparc_elf_info_to_howto_ptr'.
2018-09-04 20:31:41 +02:00
Jose E. Marchesi
8410d65b77 bfd, sparc: issue an error when reading relocations with invalid symbol references.
The function `elf64_sparc_slurp_one_reloc_table' in elf64-sparc.c
currently checks that the symbol indexes read in the r_sym fields of
relocations are in range.  This is done for both dynamic and
non-dynamic symbols.  This avoids subsequent invalid memory accesses.
However, no error is issued to the user.

This patch makes BFD to issue an error when the read symbol index is
out of range, following the same behavior implemented in both the
generic ELF routines and other ELF backends (such as mips64).

Tested in x86_64-linux-gnu, sparc64-linux-gnu, and
--enable-targets=all.

2018-09-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

            * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Issue an
            error when an invalid symbol index is retrieved in ELF64_R_SYM of
            a relocation seen in an input file.
2018-09-04 20:31:41 +02:00
GDB Administrator
70f95c89a1 Automatic date update in version.in 2018-09-04 00:00:41 +00:00
Jozef Lawrynowicz
2542e49e21 PR23595, simple objcopy of executable failure for msp430-elf
VMA of the first section in the segment containing the ELF file header
(and possibly section headers too) can't be used to reliably find the
size of the headers plus padding.  What's really needed is sh_offset
of the first section assuming it has contents (vma does have a
relationship to sh_offset, but is only guaranteed in demand paged
executables).

If the first section is SHT_NOBITS and it hasn't been converted to
have file contents by the existence of a following SHT_PROGBITS
section in the same segment, the sh_offset value also isn't reliable.

	PR 23595
	elf.c (copy_elf_program_header): When first segment contains
	only the headers and SHT_NOBITS sections, use segment p_filesz
	to calculate header and padding size.  Use filepos of the first
	section otherwise.
2018-09-03 15:50:54 +09:30
GDB Administrator
ec8da87a22 Automatic date update in version.in 2018-09-03 00:00:48 +00:00
GDB Administrator
23a29771e0 Automatic date update in version.in 2018-09-02 00:00:59 +00:00
H.J. Lu
b986869b66 Allow an IR object with unknown architecture
An IR object may have an unknown architecture.  But it is compatible
with other architecture.

	PR ld/23600
	* archures.c (bfd_arch_get_compatible): Allow an IR object with
	unknown architecture.
2018-08-31 19:57:38 -07:00
GDB Administrator
d431d6279b Automatic date update in version.in 2018-09-01 00:00:38 +00:00
Alan Modra
3d58e1fcfb PowerPC64 --emit-relocs support for notoc stubs
This patch uses the newly defined high-part REL16 relocs to emit
relocations on the notoc stubs as we already do for other stubs.

	* elf64-ppc.c (num_relocs_for_offset): New function.
	(emit_relocs_for_offset): New function.
	(use_global_in_relocs): New function, split out from..
	(ppc_build_one_stub): ..here.  Output relocations for notoc stubs.
	(ppc_size_one_stub): Calculate reloc count for notoc stubs.
	(ppc64_elf_size_stubs): Don't count undefined syms in stub_globals.
2018-08-31 22:15:05 +09:30
Alan Modra
4a9699735b PowerPC64 higher REL16 relocations
There are occasions where someone might want to build a 64-bit
pc-relative offset from 16-bit pieces.  This adds the necessary REL16
relocs corresponding to existing ADDR16 relocs that can be used to
build 64-bit absolute values.

include/
	* elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
	(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
	(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
	(R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
bfd/
	* reloc.c (BFD_RELOC_PPC64_REL16_HIGH, BFD_RELOC_PPC64_REL16_HIGHA),
	(BFD_RELOC_PPC64_REL16_HIGHER, BFD_RELOC_PPC64_REL16_HIGHERA),
	(BFD_RELOC_PPC64_REL16_HIGHEST, BFD_RELOC_PPC64_REL16_HIGHESTA):
	Define.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add new REL16 howtos.
	(ppc64_elf_reloc_type_lookup): Translate new REL16 relocs.
	(ppc64_elf_check_relocs, ppc64_elf_relocate_section): Handle them.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Allow ADDR16
	HIGH, HIGHA, HIGHER, HIGHERA, HIGHEST, and HIGHESTA relocs.
	Group 16-bit relocs.
	* config/tc-ppc.c (md_apply_fix): Translate those ADDR16 relocs
	to REL16 when pcrel.  Sort relocs.
2018-08-31 22:15:05 +09:30
Alan Modra
f891966ff6 Rearrange ppc_size_one_stub and correct _notoc stub examples
This patch rearranges ppc_size_one_stub to make it a little easier to
compare against ppc_build_one_stub, and makes a few other random
changes that might help for future maintenance.  There should be no
functional changes here.

The patch also fixes code examples in comments.  A couple of "ori"
instructions lacked the source register operand, and "@high" is the
correct reloc modifier to use in a sequence building a 64-bit value.
(@hi reports overflow of a 32-bit signed value.)

	* elf64-ppc.c: Correct _notoc stub comments.
	(ppc_build_one_stub): Simplify output of branch for notoc
	long branch stub.  Don't include label offset of 8 bytes in
	"off" calculation for notoc plt stub.  Don't emit insns to get pc.
	(build_offset): Emit insns to get pc here instead.
	(size_offset): Add 4 extra insns.
	(plt_stub_size): Adjust for "off" and size_offset changes.
	(ppc_size_one_stub): Rearrange code into a switch, duplicating
	some to better match ppc_build_one_stub.
2018-08-31 22:15:05 +09:30
GDB Administrator
0cb8eedc91 Automatic date update in version.in 2018-08-31 00:00:35 +00:00
GDB Administrator
450629c8d5 Automatic date update in version.in 2018-08-30 00:01:03 +00:00
Chenghua Xu
9108bc33b1 [MIPS] Add Loongson 2K1000 proccessor support.
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs264e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS264E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs264e to
	bfd_mach_mips_gs464e extension.

binutils/
	* NEWS: Mention Loongson 2K1000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs264e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E.
	(mips_cpu_info_table): Add gs264e descriptors.
	* doc/as.texi (march table): Add gs264e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
	* opcode/mips.h (CPU_XXX): New CPU_GS264E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs264e and gs464e.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs264e descriptors.
2018-08-29 20:55:25 +08:00
Chenghua Xu
bd782c07b9 [MIPS] Add Loongson 3A2000/3A3000 proccessor support.
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs464e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS464E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs464e to
	bfd_mach_mips_gs464 extension.

binutils/
	* NEWS: Mention Loongson 3A2000/3A3000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs464e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
	(mips_cpu_info_table): Add gs464e descriptors.
	* doc/as.texi (march table): Add gs464e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
	* opcode/mips.h (CPU_XXX): New CPU_GS464E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs464e and gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464e descriptors.
2018-08-29 20:43:19 +08:00
Chenghua Xu
ac8cb70f36 [MIPS] Add Loongson 3A1000 proccessor support.
bfd/
	* archures.c (bfd_architecture): Rename
	bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Likewise.
	(bfd_mips_isa_ext_mach): Likewise.
	(bfd_mips_isa_ext): Likewise.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

binutils/
	* NEWS: Mention Loongson 3A1000 proccessor support.
	* readelf.c (get_machine_flags): Rename loongson-3a to gs464.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

elfcpp/
	* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
	CPU_LOONGSON_3A to CPU_GS464.
	(mips_cpu_info_table): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* doc/as.texi (march table): Rename loongson3a to gs464.
	* testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
	flag to None.

gold/
	* mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach):
	Rename loongson3a to gs464.
	(mips_isa_ext_mach, mips_isa_ext): Delete loongson3a.
	(infer_abiflags): Use ases instead of isa_ext for infer ABI
flags.
	(elf_mips_mach_name): Rename loongson3a to gs464.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.
	(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
	* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
	(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
	* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a
	to gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* mips-opc.c (mips_opcodes): Change Comments.
2018-08-29 20:32:30 +08:00
Chenghua Xu
a693765e23 [MIPS/GAS] Add Loongson EXT2 Instructions support.
bfd/
	* elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.

binutils/
	* readelf.c (print_mips_ases): Add Loongson EXT2 extension.

gas/
	* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
	OPTION_NO_LOONGSON_EXT2.
	(md_longopts): Likewise.
	(mips_ases): Define availability for EXT.
	(mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to
	AFL_ASE_LOONGSON_EXT2.
	(md_show_usage): Add help for -mloongson-ext2 and
	-mno-loongson-ext2.
	* doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2.
	* doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2,
	.set loongson-ext2 and .set noloongson-ext2.
	* testsuite/gas/mips/loongson-ext2.d: New test.
	* testsuite/gas/mips/loongson-ext2.s: New test.
	* testsuite/gas/mips/mips.exp: Run loongson-ext2 test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
	* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.

opcodes/
	* mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext
	option.
	(print_mips_disassembler_options): Document -M loongson-ext.
	* mips-opc.c (LEXT2): New macro.
	(mips_opcodes): Add cto, ctz, dcto, dctz instructions.
2018-08-29 20:08:58 +08:00
Chenghua Xu
bdc6c06e3b [MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
bfd/
	 * elfxx-mips.c (infer_mips_abiflags): Use ases instead of
	 isa_ext for infer ABI flags.
	 (print_mips_ases): Add Loongson EXT extension.

binutils/
	 * readelf.c (print_mips_ases): Add Loongson EXT extension.

elfcpp/
	 * mips.h (AFL_ASE_LOONGSON_EXT): New enum.

gas/
	 * NEWS: Mention Loongson EXTensions (EXT) support.
	 * config/tc-mips.c (options): Add OPTION_LOONGSON_EXT and
	 OPTION_NO_LOONGSON_EXT.
	 (md_longopts): Likewise.
	 (mips_ases): Define availability for EXT.
	 (mips_convert_ase_flags): Map ASE_LOONGSON_EXT to
	 AFL_ASE_LOONGSON_EXT.
	 (mips_cpu_info_table): Add ASE_LOONGSON_EXT for loongson3a.
	 (md_show_usage): Add help for -mloongson-ext and
	 -mno-loongson-ext.
	 * doc/as.texi: Document -mloongson-ext, -mno-loongson-ext.
	 * doc/c-mips.texi: Document -mloongson-ext, -mno-loongson-ext,
	 .set loongson-ext and .set noloongson-ext.
	 * testsuite/gas/mips/loongson-mmi.d: Add ASE flag.

include/
	 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
	 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
	 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.

opcodes/
	 * mips-dis.c (mips_arch_choices): Add EXT to loongson3a
	 descriptors.
	 (parse_mips_ase_option): Handle -M loongson-ext option.
	 (print_mips_disassembler_options): Document -M loongson-ext.
	 * mips-opc.c (IL3A): Delete.
	 * mips-opc.c (LEXT): New macro.
	 (mips_opcodes): Replace IL2F|IL3A marking with LEXT for EXT
	 instructions.
2018-08-29 19:57:39 +08:00
Chenghua Xu
716c08de28 [MIPS/GAS] Split Loongson CAM Instructions from loongson3a
bfd/
	* elfxx-mips.c (print_mips_ases): Add CAM extension.

binutils/
	* readelf.c (print_mips_ases): Add CAM extension.

gas/
	* NEWS: Mention Loongson Content Address Memory (CAM)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_CAM and
	OPTION_NO_LOONGSON_CAM.
	(md_longopts): Likewise.
	(mips_ases): Define availability for CAM.
	(mips_convert_ase_flags): Map ASE_LOONGSON_CAM to
	AFL_ASE_LOONGSON_CAM.
	(mips_cpu_info_table): Add ASE_LOONGSON_CAM for loongson3a.
	(md_show_usage): Add help for -mloongson-cam and
	-mno-loongson-cam.
	* doc/as.texi: Document -mloongson-cam, -mno-loongson-cam.
	* doc/c-mips.texi: Document -mloongson-cam, -mno-loongson-cam,
	.set loongson-cam and .set noloongson-cam.
	* testsuite/gas/mips/loongson-3a-2.d: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a-2.s: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.s: Here.
	* testsuite/gas/mips/loongson-3a-mmi.d: Add ASE flag.
	* testsuite/gas/mips/mips.exp: Run loongson-cam test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
	* opcode/mips.h (ASE_LOONGSON_CAM): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add CAM to loongson3a
	descriptors.
	(parse_mips_ase_option): Handle -M loongson-cam option.
	(print_mips_disassembler_options): Document -M loongson-cam.
	* mips-opc.c (LCAM): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LCAM for CAM
	instructions.
2018-08-29 19:33:09 +08:00
GDB Administrator
160fc977b6 Automatic date update in version.in 2018-08-29 00:00:38 +00:00
GDB Administrator
626887ddc3 Automatic date update in version.in 2018-08-28 00:00:33 +00:00
H.J. Lu
90c745dc54 x86: Don't mask out the GNU_PROPERTY_X86_UINT32_VALID bit
Since only the GNU_PROPERTY_X86_UINT32_VALID bit may be set in data-only
relocatable objects which don't contain any instructions, linker
shouldn't mask out the GNU_PROPERTY_X86_UINT32_VALID bit when merging
GNU_PROPERTY_X86_XXX bits.  Otherwise, linker output doesn't contain
GNU_PROPERTY_X86_XXX property with any data-only relocatable inputs.
This patch keeps the GNU_PROPERTY_X86_UINT32_VALID bit and updates
readelf to print "<None>" if GNU_PROPERTY_X86_XXX property only has
the GNU_PROPERTY_X86_UINT32_VALID bit.

bfd/

	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Don't mask
	out the GNU_PROPERTY_X86_UINT32_VALID bit.

binutils/

	* readelf.c (decode_x86_isa): Print <None> if bitmask only
	contains the GNU_PROPERTY_X86_UINT32_VALID bit.
	(decode_x86_feature_1): Likewise.
	(decode_x86_feature_2): Likewise.
	(print_gnu_property_note): Don't mask out the
	GNU_PROPERTY_X86_UINT32_VALID bit.
	* testsuite/binutils-all/i386/pr21231b.d: Updated.
	* testsuite/binutils-all/x86-64/pr21231b.d: Likewise.

gas/

	* testsuite/gas/i386/i386.exp: Run property-1 and
	x86-64-property-1.
	* testsuite/gas/i386/property-1.d: New file.
	* testsuite/gas/i386/property-1.s: Likewise.
	* testsuite/gas/i386/x86-64-property-1.d: Likewise.

ld/

	* testsuite/ld-i386/i386.exp: Run property-x86-5.
	* testsuite/ld-i386/property-x86-5.d: New file.
	* testsuite/ld-x86-64/property-x86-5-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-5.d: Likewise.
	* testsuite/ld-x86-64/property-x86-5a.s: Likewise.
	* testsuite/ld-x86-64/property-x86-5b.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run property-x86-5 and
	property-x86-5-x32.
2018-08-27 15:42:14 -07:00
GDB Administrator
2cd0bfe054 Automatic date update in version.in 2018-08-27 00:01:39 +00:00
GDB Administrator
ed60adf0a3 Automatic date update in version.in 2018-08-26 00:01:07 +00:00
H.J. Lu
7a815dd566 elf: Check for corrupt symbol version info
The BFD linker with PR ld/23499 may generate shared libraries with
corrupt symbol version info which leads to linker error when the
corrupt shared library is used:

/usr/bin/ld: bin/libKF5Service.so.5.49.0: _edata: invalid version 21 (max 0)
/usr/bin/ld: bin/libKF5Service.so.5.49.0: error adding symbols: bad value

Add check for corrupt symbol version info to objdump:

00000000000af005 g    D  .data	0000000000000000  <corrupt>   _edata

and readelf:

   728: 00000000000af005     0 NOTYPE  GLOBAL DEFAULT   25 _edata@<corrupt> (5)

bfd/

	PR ld/23499
	* elf.c (_bfd_elf_get_symbol_version_string): Return
	_("<corrupt>") for corrupt symbol version info.

binutils/

	PR ld/23499
	* readelf.c (get_symbol_version_string): Return _("<corrupt>")
	for corrupt symbol version info.
2018-08-25 06:18:06 -07:00
GDB Administrator
bbf6c6b8ca Automatic date update in version.in 2018-08-25 00:00:32 +00:00
H.J. Lu
a9eafb08b3 x86: Update GNU_PROPERTY_X86_XXX macros
This patch updates GNU_PROPERTY_X86_XXX macros:

1. GNU_PROPERTY_X86_UINT32_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_AND_LO      0xc0000002
 #define GNU_PROPERTY_X86_UINT32_AND_HI      0xc0007fff

2. GNU_PROPERTY_X86_UINT32_OR_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_LO    0xc0008000
 #define GNU_PROPERTY_X86_UINT32_OR_HI    0xc000ffff

3. GNU_PROPERTY_X86_UINT32_OR_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs and the property is
present in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_AND_LO   0xc0010000
 #define GNU_PROPERTY_X86_UINT32_OR_AND_HI   0xc0017fff

4. GNU_PROPERTY_X86_FEATURE_2_NEEDED, GNU_PROPERTY_X86_FEATURE_2_USED
and GNU_PROPERTY_X86_FEATURE_2_XXX bits.

GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.  GNU_PROPERTY_X86_ISA_1_USED
and GNU_PROPERTY_X86_ISA_1_NEEDED are updated to better support targeted
processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't very useful.
A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are defined.  The previous
GNU_PROPERTY_X86_ISA_1_XXX macros are deprecated and renamed to
GNU_PROPERTY_X86_COMPAT_ISA_1_XXX.

bfd/

	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Handle
	X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED,
	X86_UINT32_AND_LO, X86_UINT32_AND_HI, X86_UINT32_OR_LO,
	X86_UINT32_OR_HI, X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI
	instead of X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.
	(_bfd_x86_elf_merge_gnu_properties): Likewise.
	(_bfd_x86_elf_link_setup_gnu_properties): Add X86_FEATURE_2_NEEDED
	instead of X86_ISA_1_NEEDED.
	(_bfd_x86_elf_link_fixup_gnu_properties): Handle
	X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED, X86_UINT32_AND_LO,
	X86_UINT32_AND_HI, X86_UINT32_OR_LO, X86_UINT32_OR_HI,
	X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI instead of
	X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.

binutils/

	* readelf.c (decode_x86_compat_isa): New function.
	(decode_x86_feature_2): Likewise.
	(decode_x86_isa): Updated for new X86_ISA_1_XXX bits.
	(decode_x86_feature): Renamed to ...
	(decode_x86_feature_1): This.  Remove the type argument.
	(print_gnu_property_note): Handle X86_COMPAT_ISA_1_USED,
	X86_COMPAT_ISA_1_NEEDED, X86_UINT32_AND_LO, X86_UINT32_AND_HI,
	X86_UINT32_OR_LO, X86_UINT32_OR_HI, X86_UINT32_OR_AND_LO and
	X86_UINT32_OR_AND_HI instead of X86_ISA_1_USED, X86_ISA_1_NEEDED
	and X86_FEATURE_1_AND.
	* testsuite/binutils-all/i386/pr21231b.s: Updated to the current
	GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
	values.
	* testsuite/binutils-all/x86-64/pr21231b.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494b.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c.s: Likewise.
	* testsuite/binutils-all/i386/pr21231b.d: Updated.
	* testsuite/binutils-all/x86-64/pr21231b.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494d-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494d.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494e-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494e.d: Likewise.

include/

	* elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
	(GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
	(GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
	(GNU_PROPERTY_X86_UINT32_AND_LO): New.
	(GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
	(GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
	(GNU_PROPERTY_X86_UINT32_AND_LO + 0).
	(GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 1).
	(GNU_PROPERTY_X86_ISA_1_USED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).

ld/

	* testsuite/ld-i386/i386.exp: Run pr23372c, pr23372d, pr23486c
	and pr23486d.
	* testsuite/ld-i386/pr23372a.s: Update comments.
	* testsuite/ld-i386/pr23372b.s: Likewise.
	* testsuite/ld-i386/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/pr23372a.s: Likewise.
	* testsuite/ld-x86-64/pr23372b.s: Likewise.
	* testsuite/ld-x86-64/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/pr23486a.s: Likewise.
	* testsuite/ld-x86-64/pr23486b.s: Likewise.
	* testsuite/ld-i386/pr23372c.d: New file.
	* testsuite/ld-i386/pr23372d.d: Likewise.
	* testsuite/ld-i386/pr23486c.d: Likewise.
	* testsuite/ld-i386/pr23486d.d: Likewise.
	* testsuite/ld-x86-64/pr23372c-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372c.d: Likewise.
	* testsuite/ld-x86-64/pr23372d-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372d.d: Likewise.
	* testsuite/ld-x86-64/pr23372d.s: Likewise.
	* testsuite/ld-x86-64/pr23372e.s: Likewise.
	* testsuite/ld-x86-64/pr23372f.s: Likewise.
	* testsuite/ld-x86-64/pr23486c-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23486c.d: Likewise.
	* testsuite/ld-x86-64/pr23486c.s: Likewise.
	* testsuite/ld-x86-64/pr23486d-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23486d.d: Likewise.
	* testsuite/ld-x86-64/pr23486d.s: Likewise.
	* testsuite/ld-i386/property-3.r: Updated.
	* testsuite/ld-i386/property-4.r: Likewise.
	* testsuite/ld-i386/property-5.r: Likewise.
	* testsuite/ld-i386/property-x86-3.d: Likewise.
	* testsuite/ld-i386/property-x86-ibt3a.d: Likewise.
	* testsuite/ld-i386/property-x86-shstk3a.d: Likewise.
	* testsuite/ld-i386/property-x86-shstk3b.d: Likewise.
	* testsuite/ld-x86-64/property-3.r: Likewise.
	* testsuite/ld-x86-64/property-4.r: Likewise.
	* testsuite/ld-x86-64/property-5.r: Likewise.
	* testsuite/ld-x86-64/property-x86-3-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-3.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3a-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3a.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3b-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3b.d: Likewise.
	* testsuite/ld-i386/property-x86-1.S: Updated to the current
	GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
	values.
	* testsuite/ld-i386/property-x86-2.S: Likewise.
	* testsuite/ld-i386/property-x86-3.s: Likewise.
	* testsuite/ld-x86-64/property-x86-1.S: Likewise.
	* testsuite/ld-x86-64/property-x86-2.S: Likewise.
	* testsuite/ld-x86-64/property-x86-3.s: Likewise.
	* ld/testsuite/ld-x86-64/x86-64.exp: Run pr23372c, pr23372c-x32,
	pr23372d, pr23372d-x32, pr23486c, pr23486c-x32, pr23486d and
	pr23486d-x32.
2018-08-24 04:42:15 -07:00
H.J. Lu
aa7bca9b2e x86: Add GNU_PROPERTY_X86_UINT32_VALID
The older linker treats .note.gnu.property section as a generic note
and just concatenates all .note.gnu.property sections from the input
to the output.  On CET-enabled OS, the output of the older linker is
marked as CET enabled, but in fact, it is not CET enabled and it crashes
on CET-enabled machines.

This patch defines GNU_PROPERTY_X86_UINT32_VALID.  Linker is updated to
set the GNU_PROPERTY_X86_UINT32_VALID bit in GNU property note for
non-relocatable output to differentiate outputs from the older linker.

bfd/

	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Mask out the
	GNU_PROPERTY_X86_UINT32_VALID bit.
	(_bfd_x86_elf_link_fixup_gnu_properties): Set the
	GNU_PROPERTY_X86_UINT32_VALID bit for non-relocatable output.

binutils/

	* readelf.c (print_gnu_property_note): Check the
	GNU_PROPERTY_X86_UINT32_VALID bit for invalid GNU property note.

include/

	* elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
2018-08-24 04:38:02 -07:00
GDB Administrator
4575aaa964 Automatic date update in version.in 2018-08-24 00:00:37 +00:00
Zenith423
b0ceb98aec Avoid problems with plugins being loaded multiple times.
PR 23460
	* plugin.c (struct plugin_list_entry): New structure.
	(plugin_list): New variable.
	(try_load_plugin): Place opened plugins on a list.  Ensure that
	the refcount in the dynamic loader is kept at 1.
2018-08-23 16:22:56 +01:00
Alan Modra
f53ad3cf2b PowerPC64 "call lacks nop"
The "-fPIC" and "-mcmodel=small" parts of these messages isn't always
true, so lets dispense with that and just report the type of stub
causing trouble.

	* elf64-ppc.c (ppc64_elf_relocate_section): Revise "call lacks
	nop" error message.
2018-08-24 00:23:27 +09:30
Nick Clifton
38cf70ca4d Replace unworkable code in HPPA relocs handelr with an assertion.
* elf64-hppa.c (elf_hppa_final_link_relocate): Replace unworkable
	code with an assertion.
2018-08-23 13:34:14 +01:00
Nick Clifton
334d4ced42 Prevent illegal memory access when processing COFF auxillary symbol information.
PR 23061
	* coffgen.c (coff_pointerize_aux): Add table_end parameter.  Use
	it to prevent walking off the end of the table.
	(coff_get_normalized_symtab): Pass internal_end pointer to
	coff_pointerize_aux.
2018-08-23 11:45:38 +01:00
Alan Modra
d0abeec8d4 Fix "unresolved reloc" error for NOTOC relocs
* elf64-ppc.c (ppc64_elf_relocate_section): Don't miss clearing
	unresolved_reloc on ppc_stub_plt_call_notoc.
2018-08-23 13:54:24 +09:30
GDB Administrator
d3f467568f Automatic date update in version.in 2018-08-23 00:00:15 +00:00
H.J. Lu
9eef060895 bfd/development.sh: Add experimental
Add experimental to indicate whether this is a release branch.

	PR ld/23536
	* development.sh (experimental): New.
2018-08-22 10:32:23 -07:00
Helge Deller
6f4286c4f7 Use the correct constants when setting the section type of HPPA unwind sections.
* elf-hppa.h (elf_hppa_fake_sections): Use SHT_PARISC_UNWIND as
	the section type of the .PARISC.unwind section on 64-bit binaries
	and SHT_PROGBITS for 32-bit binaries.  Add a comment about it.
	Add comment about the sh_entsize value.
2018-08-22 10:32:53 +01:00
Rafeal Auler
3da64fe404 Fix AArch64 stub layout algorithm to allow for the fact that section layut might change a stub's target location.
PR 23560
	* elfnn-aarch64.c (elfNN_aarch64_size_stubs): Always update the
	stub's target, since it may have been changed after the layout.
2018-08-22 10:04:09 +01:00
Alan Modra
ebf983a444 Fix changelog entries 2018-08-22 16:38:55 +09:30
GDB Administrator
ac1e2e51c0 Automatic date update in version.in 2018-08-22 00:00:43 +00:00
John Darrington
4e57b45639 S12Z: Rename reloc R_S12Z_UKNWN_3 to R_S12Z_EXT18 and implement according to recently inferred information about this reloc.
* bfd/elf32-s12z.c: (opru18_reloc): New function.
* bfd/elf32-s12z.c: (elf_s12z_howto_table): Adjust Howto according to new knowledge.
* include/elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
2018-08-21 19:24:21 +02:00
mephi42
ae19acf320 Fix running objcopy on Mach-O binaries.
PR binutils/23315
	* mach-o.c (bfd_mach_o_mangle_symbols): Update n_type even if
	data is already considered filled.
2018-08-21 16:34:56 +01:00
Alan Modra
46807bf451 PowerPC HOWTOs
These take up far too many lines in the files.  This patch introduces
a replacement for the HOWTO macro that simplifies the relow howto
initialization.  Apart from the two relocs mentioned in the ChangeLog,
no relocation howto is changed.

	* elf64-ppc.c (HOW): Define.
	(ONES): Delete.
	(ppc64_elf_howto_raw): Use HOW to initialize entries.
	* elf32-ppc.c (HOW): Define.
	(ppc_elf_howto_raw): Use HOW to initialize entries, updating
	R_PPC_VLE_REL15 and R_PPC_VLE_REL24 to use bitpos=0.
2018-08-21 14:59:53 +09:30
Alan Modra
706704c883 Pack reloc_howto_struct
This patch uses bitfields in reloc_howto_struct, reducing its size
from 80 to 40 bytes on 64-bit hosts and from 52 to 32 bytes on 32-bit
hosts (with a 32-bit bfd_vma).  I've also added a new "negate" field
rather than making the encoded "size" field do double duty as both
a size and a flag.

There was just one use of an encoded size of 8, which according to
bfd_get_reloc_size meant 16 bytes, in vms-alpha.c ALPHA_R_LINKAGE.
See git commit c3d8e071bf adding ALPHA_R_LINKAGE and git commit
8612a388f7 decoding size 8 in bfd_get_reloc_size.  Since no other part
of BFD handles 16 byte relocs, I've removed that encoding and special
cased the ALPHA_R_LINKAGE size in vms-alpha.c.

	* reloc.c (reloc_howto_type): Typedef.
	(bfd_symbol): Delete forward declaration.
	(struct reloc_howto_struct): Add "negate" field.  Make "size",
	"bitsize", "rightshift", "bitpos", "complain_on_overflow",
	"pc_relative", "partial_inplace", and "pcrel_offset" bitfields.
	Rearrange for better packing.  Revise comments.
	(HOWTO): Map to rearranged reloc_howto_struct.
	(bfd_get_reloc_size): Delete now unused cases.
	(read_reloc, write_reloc): Likewise.
	(apply_reloc, _bfd_relocate_contents): Test howto->negate
	rather than howto->size < 0 for negated relocation values.
	* coff-rs6000.c (xcoff_complain_overflow_bitfield_func): Avoid
	signed/unsigned warning.
	(xcoff_ppc_relocate_section): Delete "condition is always false"
	code.
	* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
	* cpu-ns32k.c (do_ns32k_reloc): Adjust to suit reloc_howto_struct
	changes.
	* vms-alpha.c (_bfd_vms_write_etir, alpha_vms_slurp_relocs): Use
	size 16 for ALPHA_R_LINKAGE.
	(alpha_howto_table <ALPHA_R_LINKAGE>): Set encoded size and
	bitsize to zero.
	* bfd-in.h (reloc_howto_type): Delete.
	* bfd-in2.h: Regenerate.
2018-08-21 14:59:53 +09:30
Alan Modra
487096bf0b Delete NEWHOWTO and tidy some uses of reloc_howto_struct
NEWHOWTO was promised way back in 1991 (git commit e568362218).
I doubt it's ever going to be implemented.  This patch removes it,
and tidies some reloc howtos.  I was going to make some changes to
reloc_howto_struct, so I think it's important that all relocs howtos
are initialized with HOWTO.

	* reloc.c (HOWTO): Revise comment.
	(NEWHOWTO, HOWTO_PREPARE): Delete.
	* coff-arm.c (coff_arm_reloc_type_lookup): Replace const struc
	reloc_howto_struct with reloc_howto_type.
	* ns32knetbsd.c (MY_bfd_reloc_type_lookup): Likewise.
	* vms-alpha.c (alpha_vms_bfd_reloc_type_lookup): Likewise.
	* elf-hppa.h (HOW): Define.
	(elf_hppa_howto_table): Use it to simplify this table, correcting
	name of R_PARISC_LTOFF16WF, R_PARISC_LTOFF_FPTR64, and
	R_PARISC_LTOFF_FPTR16DF.
	* elf32-mep.c (MEPREL): Use HOWTO.
	* bfd-in2.h: Regenerate.
2018-08-21 14:59:53 +09:30
GDB Administrator
fe22d84fe4 Automatic date update in version.in 2018-08-21 00:00:49 +00:00
Alan Modra
865dcc8a4d Don't init array at run time
When it can be done at compile time.

	* mmo.c (valid_mmo_symbol_character_set): Initialize and make
	array const.
	(mmo_init): Don't init valid_mmo_symbol_character_set.
2018-08-20 09:54:20 +09:30
Alan Modra
ba1c4c6fee Balance parentheses in expression
* rs6000-core.c (CORE_COMMONSZ): Balance parentheses in expression.
2018-08-20 09:45:02 +09:30