2000-08-30 Mark Hatle <mhatle@mvista.com>
* config/tc-ppc.c (md_parse_option): Recognize -m405.
In src/opcodes/ChangeLog:
2000-08-30 Mark Hatle <mhatle@mvista.com>
* ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics.
(powerpc_opcodes): Add table entries for PPC 405 instructions.
Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
instructions.
Added extended mnemonic mftbl as defined in the 405GP manual
for all PPCs.
* config.in (STRICTCOFF): New for strict COFF.
* configure.in: Define STRICTCOFF for i386-*-msdosdjgpp*,
i386-*-go32* and i386-go32-rtems*.
* configure: Rebuilt.
* config/obj-coff.c (obj_coff_endef): Follow the historical
behavior if STRICTCOFF is not defined.
* doc/internals.texi: Document STRICTCOFF.
bfd:
* elf32-i860.c (elf32_i860_relocate_pc16): Just write the immediate
field with the newly relocated value instead of adding it to the
existing immediate field.
(elf32_i860_relocate_splitn): Likewise.
(elf32_i860_relocate_highadj): Likewise.
gas:
* config/tc-i860.c (md_apply_fix3): Do not insert the immediate
if the fixup resulted in a relocation.
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to
add a symbol's address. Removed all target-specific #ifdefs that
used to accomplished the same.
* config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
bfd/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle
EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP.
(elf64_ia64_print_private_bfd_data): Likewise. Also handle
EF_IA_64_ABSOLUTE.
gas/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic.
(md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC.
(md_begin): Change assignment to md.flag to OR in the new bit.
include/elf/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP,
EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
(i860_fix_info): New enum.
(MD_APPLY_FIX3): Define.
(WORKING_DOT_WORD): Define.
(TC_HANDLES_FX_DONE): Define.
(DIFF_EXPR_OK): Define.
(LISTING_HEADER): Define.
(TARGET_FORMAT): Select target format based on endian flag.
(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
(target_big_endian): Add external declaration.
* config/tc-i860.c: All existing code reworked completely. Other
new code shown below.
(SYNTAX_SVR4): Define.
(target_warn_expand): New variable.
(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
(md_longopts): Declare and define with new options (-EL, -EB,
and -mwarn-expand).
(md_show_usage): New function.
(md_operand): New function.
(obtain_reloc_for_imm16): New function.
(md_apply_fix3): New function.
(tc_gen_reloc): New function.
include:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* opcode/i860.h: Small formatting adjustments.
opcode:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* i860-dis.c (print_br_address): Change third argument from int
to long.
bfd:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
(dot_vframe): Elide psp_gr record if it overlaps prologue_gr.
(dot_save): Likewise for pfs_gr, rp_gr, and preds_gr.
(dot_body): Clear unwind.prologue_mask.
(dot_prologue): Set it. Accept a register second argument.
Don't declare md_pcrel_from_section (already in tc-avr.h).
(avr_operands): Use AVR_UNDEF_P and AVR_SKIP_P macros.
(avr_operand): Don't set (unsigned) op_mask to -1.
* configure.in: Add bits for i860-stardent-{sysv4, elf}*.
* configure: Regenerated.
* config/obj-elf.c (obj_elf_type): Recognize a fifth type
of operand to the .type directive (.e.g, "type").
