Change
ld: warning: creating DT_TEXTREL in a PIE
to
ld: warning: creating DT_TEXTREL in a PDE
on PDE.
bfd/
* elflink.c (bfd_elf_final_link): Correct DT_TEXTREL warning in
PDE.
ld/
* testsuite/ld-x86-64/textrel-1.err: New file.
* testsuite/ld-x86-64/textrel-1a.s: Likewise.
* testsuite/ld-x86-64/textrel-1b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run textrel-1 tests.
1. Skip am33_2.0-*-* hppa*-*-hpux* mn10300-*-* since assembly source file
for the HPPA assembler is renamed and modifed by sed. mn10300 has RELA
relocations in .note.gnu.property section which elf_parse_notes doesn't
support.
2. Pass --generate-missing-build-notes=no to assembler.
3. Allow other note sections for xtensa.
* testsuite/ld-elf/property-and-1.d: Skip am33_2.0, hppa-hpux
and mn10300.
Pass --generate-missing-build-notes=no to assembler. Allow
other note sections for xtensa.
* testsuite/ld-elf/property-and-2.d: Likewise.
* testsuite/ld-elf/property-and-3.d: Likewise.
* testsuite/ld-elf/property-and-4.d: Likewise.
* testsuite/ld-elf/property-or-1.d: Likewise.
* testsuite/ld-elf/property-or-2.d: Likewise.
* testsuite/ld-elf/property-or-3.d: Likewise.
* testsuite/ld-elf/property-or-4.d: Likewise.
Implement GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXX:
https://sourceware.org/pipermail/gnu-gabi/2021q1/000467.html
1. GNU_PROPERTY_UINT32_AND_LO..GNU_PROPERTY_UINT32_AND_HI
#define GNU_PROPERTY_UINT32_AND_LO 0xb0000000
#define GNU_PROPERTY_UINT32_AND_HI 0xb0007fff
A bit in the output pr_data field is set only if it is set in all
relocatable input pr_data fields. If all bits in the the output
pr_data field are zero, this property should be removed from output.
If the bit is 1, all input relocatables have the feature. If the
bit is 0 or the property is missing, the info is unknown.
2. GNU_PROPERTY_UINT32_OR_LO..GNU_PROPERTY_UINT32_OR_HI
#define GNU_PROPERTY_UINT32_OR_LO 0xb0008000
#define GNU_PROPERTY_UINT32_OR_HI 0xb000ffff
A bit in the output pr_data field is set if it is set in any
relocatable input pr_data fields. If all bits in the the output
pr_data field are zero, this property should be removed from output.
If the bit is 1, some input relocatables have the feature. If the
bit is 0 or the property is missing, the info is unknown.
bfd/
* elf-properties.c (_bfd_elf_parse_gnu_properties): Handle
GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI,
GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI.
(elf_merge_gnu_properties): Likewise.
binutils/
* readelf.c (print_gnu_property_note): Handle
GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI,
GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI.
include/
* elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New.
(GNU_PROPERTY_UINT32_AND_HI): Likewise.
(GNU_PROPERTY_UINT32_OR_LO): Likewise.
(GNU_PROPERTY_UINT32_OR_HI): Likewise.
ld/
* testsuite/ld-elf/property-and-1.d: New file.
* testsuite/ld-elf/property-and-1.s: Likewise.
* testsuite/ld-elf/property-and-2.d: Likewise.
* testsuite/ld-elf/property-and-2.s: Likewise.
* testsuite/ld-elf/property-and-3.d: Likewise.
* testsuite/ld-elf/property-and-3.s: Likewise.
* testsuite/ld-elf/property-and-4.d: Likewise.
* testsuite/ld-elf/property-and-empty.s: Likewise.
* testsuite/ld-elf/property-or-1.d: Likewise.
* testsuite/ld-elf/property-or-1.s: Likewise.
* testsuite/ld-elf/property-or-2.d: Likewise.
* testsuite/ld-elf/property-or-2.s: Likewise.
* testsuite/ld-elf/property-or-3.d: Likewise.
* testsuite/ld-elf/property-or-3.s: Likewise.
* testsuite/ld-elf/property-or-4.d: Likewise.
* testsuite/ld-elf/property-or-empty.s: Likewise.
On x86-64, function pointers in executable for external funtions may be
resolved to their PLT entries in executable. If it happens, function
pointers of protected funtions in shared libraries must be resolved to
the PLT entries in executable, not addresses of protected funtions in
shared libraries.
PR ld/27973
* testsuite/ld-x86-64/x86-64.exp: Run protected function tests.
* testsuite/ld-x86-64/protected-func-1.h: New file.
* testsuite/ld-x86-64/protected-func-1a.s: Likewise.
* testsuite/ld-x86-64/protected-func-1b.c: Likewise.
gold has had this option for many years. Not having this option caused
some confusion to users. The help message clarifies the default state.
ld/
* ldlex.h (enum option_values): Add OPTION_NO_PIE.
* lexsup.c (struct ld_options): Add -no-pie.
(parse_args): Handle -no-pie.
* ld.texi: Document -no-pie.
I finally found time to teach readelf to identify PIEs in the file
header display and program header display. So in place of
"DYN (Shared object file)" which isn't completely true, show
"DYN (Position-Independent Executable file)".
It requires a little bit of untangling code in readelf due to
process_program_headers setting up dynamic_addr and dynamic_size,
needed to scan .dynamic for the DT_FLAGS_1 entry, and
process_program_headers itself wanting to display the file type in
some cases. At first I modified process_program_header using a
"probe" parameter similar to get_section_headers in order to inhibit
output, but decided it was cleaner to separate out
locate_dynamic_sections.
binutils/
* readelf.c (locate_dynamic_section, is_pie): New functions.
(get_file_type): Replace e_type parameter with filedata. Call
is_pie for ET_DYN. Update all callers.
(process_program_headers): Use local variables dynamic_addr and
dynamic_size, updating filedata on exit from function. Set
dynamic_size of 1 to indicate no dynamic section or segment.
Update tests of dynamic_size throughout.
* testsuite/binutils-all/x86-64/pr27708.dump: Update expected output.
ld/
* testsuite/ld-pie/vaddr-0.d: Update expected output.
gdb/
* testsuite/lib/gdb.exp (exec_is_pie): Match new PIE readelf output.
This patch adds a new elf_tdata flag, is_pie, set during the linker's
open_input_bfds processing. The flag is then used to reject attempts
to link a PIE as if it were a shared library.
bfd/
PR 27952
* elf-bfd.h (struct elf_obj_tdata): Add is_pie.
* elflink.c (elf_link_add_object_symbols): Set is_pie.
ld/
PR 27952
* ldelf.c (ldelf_after_open): Error on input PIEs too.
PR 27666
bfd * config.bfd: Do not add the sparc_elf32_vec or sparc_elf64_vec
vectors to Sparc Solaris2 targets.
ld * testsuite/ld-sparc/sparc.exp: Do not run the sparctests or
sparc64tests for Solaris2 targets.
2021-05-31 Nelson Chu <nelson.chu@sifive.com>
Lifang Xia <lifang_xia@c-sky.com>
The data segment phase exp_seg_relro_adjust means we are still adjusting the
relro segments, so we will get the symbol values which havn't consider the
relro. It is dangerous and we shouldn't do the relaxations at this stage.
Otherwise, we may get the truncated fails when the relax range crossing the
data segment.
One of the solution is that, we use a pointer to monitor the data segment
phase while relaxing, to know whether the relro has been handled or not.
Once we check the phase is exp_seg_relro_adjust, we should skip this round
of relaxations, since the incorrect symbol values will affect the correctness
of relaxations. I think we probably need to record more information about
data segment or alignments in the future, to make sure it is safe to doing
relaxations.
For the two new testcases, relro-relax-lui and relro-relax-pcrel, we get
the following truncated errors when using toolchains, which enable relro:
(.text+0x0): relocation truncated to fit: R_RISCV_GPREL_I against symbol `SymbolRodata' defined in .rodata section in test1.o
After applying this patch, the truncated errors should be resolved.
However, only linux toolchains support -z relro, so we only test these
two testcases when supporting shared library.
bfd/
PR 27566
* elfnn-riscv.c (struct riscv_elf_link_hash_table): New integer pointer
to monitor the data segment phase.
(bfd_elfNN_riscv_set_data_segment_info): New function called by
after_allocation, to set the data_segment_phase from expld.dataseg.
(_bfd_riscv_relax_section): Don't relax when data_segment_phase is
exp_seg_relro_adjust (0x4).
* elfxx-riscv.h (bfd_elf32_riscv_set_data_segment_info): New extern.
(bfd_elf64_riscv_set_data_segment_info): Likewise.
ld/
PR 27566
* emultempl/riscvelf.em (after_allocation): Call
riscv_set_data_segment_info to set data segment phase before relaxing.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
* testsuite/ld-riscv-elf/relro-relax-lui.d: New testcase.
* testsuite/ld-riscv-elf/relro-relax-lui.s: Likewise.
* testsuite/ld-riscv-elf/relro-relax-pcrel.d: Likewise.
* testsuite/ld-riscv-elf/relro-relax-pcrel.s: Likewise.
commit a7664973b2
Author: Jan Beulich <jbeulich@suse.com>
Date: Mon Apr 26 10:41:35 2021 +0200
x86: correct overflow checking for 16-bit PC-relative relocs
caused linker failure when building 16-bit program in a 32-bit ELF
container. Update GNU_PROPERTY_X86_FEATURE_2_USED with
#define GNU_PROPERTY_X86_FEATURE_2_CODE16 (1U << 12)
to indicate that 16-bit mode instructions are used in the input object:
https://groups.google.com/g/x86-64-abi/c/UvvXWeHIGMA
to indicate that 16-bit mode instructions are used in the object to
allow linker to properly perform relocation overflow check for 16-bit
PC-relative relocations in 16-bit mode instructions.
1. Update x86 assembler to always generate the GNU property note with
GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF object.
2. Update i386 and x86-64 linkers to use 16-bit PC16 relocations if
input object is marked with GNU_PROPERTY_X86_FEATURE_2_CODE16.
bfd/
PR ld/27905
* elf32-i386.c: Include "libiberty.h".
(elf_howto_table): Add 16-bit R_386_PC16 entry.
(elf_i386_rtype_to_howto): Add a BFD argument. Use 16-bit
R_386_PC16 if input has 16-bit mode instructions.
(elf_i386_info_to_howto_rel): Update elf_i386_rtype_to_howto
call.
(elf_i386_tls_transition): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Add 16-bit
R_X86_64_PC16 entry.
(elf_x86_64_rtype_to_howto): Use 16-bit R_X86_64_PC16 if input
has 16-bit mode instructions.
* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Set
elf_x86_has_code16 if relocatable input is marked with
GNU_PROPERTY_X86_FEATURE_2_CODE16.
* elfxx-x86.h (elf_x86_obj_tdata): Add has_code16.
(elf_x86_has_code16): New.
binutils/
PR ld/27905
* readelf.c (decode_x86_feature_2): Support
GNU_PROPERTY_X86_FEATURE_2_CODE16.
gas/
PR ld/27905
* config/tc-i386.c (set_code_flag): Update x86_feature_2_used
with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF
object.
(set_16bit_gcc_code_flag): Likewise.
(x86_cleanup): Always generate the GNU property note if
x86_feature_2_used isn't 0.
* testsuite/gas/i386/code16-2.d: New file.
* testsuite/gas/i386/code16-2.s: Likewise.
* testsuite/gas/i386/x86-64-code16-2.d: Likewise.
* testsuite/gas/i386/i386.exp: Run code16-2 and x86-64-code16-2.
include/
PR ld/27905
* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): New.
ld/
PR ld/27905
* testsuite/ld-i386/code16.d: New file.
* testsuite/ld-i386/code16.t: Likewise.
* testsuite/ld-x86-64/code16.d: Likewise.
* testsuite/ld-x86-64/code16.t: Likewise.
* testsuite/ld-i386/i386.exp: Run code16.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
The %pcrel_lo addend may causes the overflow, and need more than one
%pcrel_hi values. But there may be only one auipc, shared by those
%pcrel_lo with addends. However, the existing check method in the
riscv_resolve_pcrel_lo_relocs, may not be able to work for some
special/corner cases.
Consider the testcases pcrel-lo-addend-2b. Before applying this patch,
I can compile it successfully. But in fact the addend cause the value
of %pcrel_hi to be different. This patch try to check the value of
%pcrel_hi directly, to make sure it won't be changed. Otherwise, linker
will report the following errors,
(.text+0xa): dangerous relocation: %pcrel_lo overflow with an addend,
the value of %pcrel_hi is 0x1000 without any addend, but may be 0x2000
after adding the %pcrel_lo addend
The toolchain regressions, rv64gc-linux/rv64gc-elf/rv32gc-linux/rv32i-elf,
pass expectedly and looks fine.
bfd/
* elfnn-riscv.c (riscv_resolve_pcrel_lo_relocs): Check the values
of %pcrel_hi, before and after adding the addend. Make sure the
value won't be changed, otherwise, report dangerous error.
ld/
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d: Renamed from
pcrel-lo-addend-2.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2a.s: Likewise.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2b.d: New testcase.
* testsuite/ld-riscv-elf/pcrel-lo-addend-2b.s: Likewise.
The recent change to correct the detection of thumb2 object files
resulted in a ld test for veneering starting to fail. The problem was
the test itself, which was incorrectly expecting thumb1 type far-call
veneers instead of the thumb2 flavour. We already have a dump file of
the expected form, so the fix is to change the expected output
accordingly.
ld/
* testsuite/ld-arm/arm-elf.exp (farcall test for v8-m.mainline):
Correct expected output.
Use the pattern from other projects where we generate the html pages
in a dir named the same as the project. So now we have:
gas/doc/gas.html - single html page
gas/doc/gas/ - multiple html pages
This works for projects that have a doc/ subdir already, but gprof &
ld require a little tweaking since they generate their docs in their
respective toplevels.
This better matches other GNU projects like autoconf/automake where
the html manual is the single page form. We'll support the multi-page
form in a follow up change.
x86-64 uses rela relocations. The comment next to the field's declaration
says "Non-zero values for ELF USE_RELA targets should be viewed with
suspicion ..." And indeed the fields being non-zero causes section
contents to be accumulated into the final relocated values in addition to
the relocations' addends, which is contrary to the ELF spec.
In commit 89753bbf81 I enabled a warning for scripts redefining
symbols. The idea was to not warn for symbols defined by shared
libraries (the h->u.def.section->output_section != NULL test), but the
test failed to take into account absolute symbols. Absolute symbols
defined in shared libraries are currently indistinguishable from
absolute symbols defined in relocatable objects, at least when only
looking at struct bfd_link_hash_entry. So, don't warn for any
absolute symbols.
* ldexp.c (update_definedness): Don't return false for absolute
symbols.
* ldmain.c (multiple_definition): Print "warning: " in message
when not a hard error.
The current PLT generation code will generate invalid code when the PLT
relocation offset exceeds 64k. This fixes the issue by detecting large
plt_reloc offsets and generare code sequences to create larger plt
relocations.
The "large" plt code needs 2 extra instructions to create 32-bit offsets.
bfd/ChangeLog:
PR 27746
* elf32-or1k.c (PLT_ENTRY_SIZE_LARGE, PLT_MAX_INSN_COUNT,
OR1K_ADD, OR1K_ORI): New macros to help with plt creation.
(elf_or1k_link_hash_table): New field plt_count.
(elf_or1k_link_hash_entry): New field plt_index.
(elf_or1k_plt_entry_size): New function.
(or1k_write_plt_entry): Update to support variable size PLTs.
(or1k_elf_finish_dynamic_sections): Use new or1k_write_plt_entry
API.
(or1k_elf_finish_dynamic_symbol): Update to write large PLTs
when needed.
(allocate_dynrelocs): Use elf_or1k_plt_entry_size to account for
PLT size.
ld/ChangeLog:
PR 27746
testsuite/ld-or1k/or1k.exp (or1kplttests): Add tests for linking
along with gotha() relocations.
testsuite/ld-or1k/gotha1.dd: New file.
testsuite/ld-or1k/gotha1.s: New file.
testsuite/ld-or1k/gotha2.dd: New file.
testsuite/ld-or1k/gotha2.s: New file
testsuite/ld-or1k/pltlib.s (x): Define size to avoid link
failure.
The tests currently in binutils are aimed at the original GCC-based
implementation of CTF, which emitted CTF directly from GCC's internal
representation. The approach now under review emits CTF from DWARF,
with an eye to eventually doing this for all non-DWARF debuginfo-like
formats GCC supports. It also uses a different flag to enable
CTF emission (-gctf rather than -gt).
Adjust the testsuite accordingly.
Given that the ld testsuite results are dependent on type ordering,
which we do not guarantee at all, it's amazing how little changes. We
see a few type ordering differences, slices change because the old GCC
was buggy (slices were emitted "backwards", from the wrong end of the
machine word) and its expected results were wrong, and GCC now emits the
underlying integral type for enumerated types, though CTF has no way to
record this yet (coming in v4).
GCC also now emits even hidden symbols into the symtab (and thus
symtypetab), so one symtypetab test changes its expected results
slightly to compensate.
Also add tests for the CTF_K_UNKNOWN nonrepresentable type: this
couldn't be done before now since the only GCC that emits CTF_K_UNKNOWN
for nonrepresentable types is the new one.
ld/ChangeLog
2021-05-06 Nick Alcock <nick.alcock@oracle.com>
* testsuite/ld-ctf/ctf.exp: Use -gctf, not -gt.
* testsuite/lib/ld-lib.exp: Likewise.
* testsuite/ld-ctf/nonrepresentable-1.c: New test for nonrepresentable types.
* testsuite/ld-ctf/nonrepresentable-2.c: Likewise.
* testsuite/ld-ctf/nonrepresentable.d: Likewise.
* testsuite/ld-ctf/array.d: Larger type section.
* testsuite/ld-ctf/data-func-conflicted.d: Likewise.
* testsuite/ld-ctf/enums.d: Likewise.
* testsuite/ld-ctf/conflicting-enums.d: Don't compare types.
* testsuite/ld-ctf/cross-tu-cyclic-conflicting.d: Changed type order.
* testsuite/ld-ctf/cross-tu-noncyclic.d: Likewise.
* testsuite/ld-ctf/slice.d: Adjust for improved slice emission.
libctf/ChangeLog
2021-05-06 Nick Alcock <nick.alcock@oracle.com>
* testsuite/lib/ctf-lib.exp: Use -gctf, not -gt.
* testsuite/libctf-regression/nonstatic-var-section-ld-r.lk:
Hidden symbols now get into the symtypetab anyway.
Test for commit 4916030821 and b293661219.
* testsuite/ld-powerpc/empty.s: New file.
* testsuite/ld-powerpc/undefweak.d,
* testsuite/ld-powerpc/undefweak.s: New testcase.
* testsuite/ld-powerpc/powerpc.exp: Run it.
bfd * elf.c (_bfd_elf_maybe_function_sym): Do not accept annobin
symbols as potential function symbols.
* elfnn-aarch64.c (elfNN_aarch64_maybe_function_sym): Likewise.
* elf64-ppc.c (ppc64_elf_maybe_function_sym): Likewise.
* elf32-arm.c (elf32_arm_maybe_function_sym): Likewise.
ld * testsuite/ld-elf/anno-sym.s: New test source file.
* testsuite/ld-elf/anno-sym.d: New test driver.
* testsuite/ld-elf/anno-sym.l: New test error output.
The only insn requiring a truly 16-bit PC-relative relocation outside of
16-bit mode is XBEGIN (with an operand size override). For it, the
relocation generated should behave similar to 8- and (for 64-bit) 32-bit
PC-relatives ones, i.e. be checked for a signed value to fit the field.
This same mode is also correct for 16-bit code. Outside of 16-bit code,
branches with operand size overrides act in a truly PC-relative way only
when living in the low 32k of address space, as they truncate rIP to 16
bits. This can't be expressed by a PC-relative relocation.
Putting in place a new testcase, I'd like to note that the two existing
ones (pcrel16 and pcrel16abs) appear to be pretty pointless: They don't
expect any error despite supposedly checking for overflow, and in fact
there can't possibly be any error for the
- former since gas doesn't emit any relocation in the first place there,
- latter because the way the relocation gets expressed by gas doesn't
allow the linker to notice the overflow; it should be detected by gas
if at all, but see above (an error would be reported here for x86-64
afaict, but this test doesn't get re-used there).
Don't create a symbolic link to tmpdir/ldscripts if it exists.
PR ld/27771
* testsuite/ld-bootstrap/bootstrap.exp: Create a symbolic link
to tmpdir/ldscripts only if it doesn't exist.
While the testcase put in place by 74edb473c9 ("PE/Windows x86_64: Fix
weak undef symbols after image base change") is fine for MingW, it fails
for Cygwin. This is because the default image base is different there
(for whatever reason).
It's not enough to test that the output is ELF before casting
bfd_link_hash_entry to elf_link_hash_entry. Some ELF targets (d30v,
dlx, pj, s12z, xgate) use the generic linker support in bfd/linker.c
and thus their symbols are of type generic_link_hash_entry.
Not all of the places this patch touches can result in wrong accesses,
but I thought it worth ensuring that all occurrences of
elf_link_hash_entry in ld/ were obviously correct.
PR 27719
* ldlang.c (lang_mark_undefineds, undef_start_stop): Test that
the symbol hash table is the correct type before accessing
elf_link_hash_entry symbols.
* plugin.c (is_visible_from_outside): Likewise.
* emultempl/armelf.em (ld${EMULATION_NAME}_finish): Likewise.
* emultempl/solaris2.em (elf_solaris2_before_allocation): Likewise.
This adds some annotation to Power10 pcrel instructions, displaying
the target address (ie. pc + D34 field) plus a symbol if there is one
at exactly that target address. pld from the .got or .plt will also
look up the entry and display it, symbolically if there is a dynamic
relocation on the entry.
include/
* dis-asm.h (struct disassemble_info): Add dynrelbuf and dynrelcount.
binutils/
* objdump.c (struct objdump_disasm_info): Delete dynrelbuf and
dynrelcount.
(find_symbol_for_address): Adjust for dynrelbuf and dynrelcount move.
(disassemble_section, disassemble_data): Likewise.
opcodes/
* ppc-dis.c (struct dis_private): Add "special".
(POWERPC_DIALECT): Delete. Replace uses with..
(private_data): ..this. New inline function.
(disassemble_init_powerpc): Init "special" names.
(skip_optional_operands): Add is_pcrel arg, set when detecting R
field of prefix instructions.
(bsearch_reloc, print_got_plt): New functions.
(print_insn_powerpc): For pcrel instructions, print target address
and symbol if known, and decode plt and got loads too.
gas/
* testsuite/gas/ppc/prefix-pcrel.d: Update expected output.
* testsuite/gas/ppc/prefix-reloc.d: Likewise.
* gas/testsuite/gas/ppc/vsx_32byte.d: Likewise.
ld/
* testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output.
* testsuite/ld-powerpc/inlinepcrel-2.d: Likewise.
* testsuite/ld-powerpc/notoc2.d: Likewise.
* testsuite/ld-powerpc/notoc3.d: Likewise.
* testsuite/ld-powerpc/pcrelopt.d: Likewise.
* testsuite/ld-powerpc/startstop.d: Likewise.
* testsuite/ld-powerpc/tlsget.d: Likewise.
* testsuite/ld-powerpc/tlsget2.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
* testsuite/ld-powerpc/weak1.d: Likewise.
* testsuite/ld-powerpc/weak1so.d: Likewise.
Due to a bogus linker script, or perhaps because a section doesn't get
placed by a linker script while default placement puts it too high up,
sections can end up above .reloc. Since the process of determining its
contents (and hence its size) happens before final section placement,
relocations needed for such sections would no longer point at the
correct address in the final binary. Warn about this (down the road this
may want to become an error, unless size determination and content
creation for .reloc would get decoupled).
To avoid triggering the warning when .reloc gets discarded, suppress
populating the section in the first place in this case.
The change in PR19011 changed the image load address from being in the lower
32-bit address space to the higher 64-bit address space.
However when you have a weak undef symbol which stays undef at the end of
linking the linker has to resolve this (Windows loader does not support undef
symbols). As such typically these would resolve to 0.
The relocation used for these weak symbols are the normal 32-bit PC_REL call
relocs. So when doing the overflow check LD checks if the distance between the
symbol and the call is within range. However now that the load address is
> 32-bits and the symbol val is 0 this overflow check will always fail.
As such the linker gives a bogus error. This patch makes the linker not emit
the overflow failure but chooses to still let the check be performed (as it's
mid-end code).
One down side of this is that it does break the common convention that the call
be to sym at 0x0. i.e. before you'd get
401015: 74 05 je 40101c
401017: e8 e4 ef bf ff callq 0
and now you get
140001015: 74 05 je 14000101c
140001017: e8 e4 ef ff bf call 100000000
since the call is PC_REL there's no way to get the range large enough to
resolve to 0. As such I have chosen to leave it as the furthest simple range
that we can still represent.
By only ignoring the error we leave the symbol value itself to still be 0
such that the if(<symbol>) checks still work correctly.
bfd/ChangeLog:
2021-04-01 Tamar Christina <tamar.christina@arm.com>
PR ld/26659
* cofflink.c (_bfd_coff_generic_relocate_section): Ignore overflow.
ld/ChangeLog:
2021-04-01 Tamar Christina <tamar.christina@arm.com>
PR ld/26659
* testsuite/ld-pe/pe.exp: Add test.
* testsuite/ld-pe/pr26659-weak-undef-sym.d: New test.
* testsuite/ld-pe/pr26659-weak-undef-sym.s: New test.
