More fun with R_PPC64_NONE found in .opd. Fixed by the
allocate_dynrelocs and ppc64_elf_size_dynamic_sections changes, and
since we are doing ifunc, opd and SYMBOL_REFERENCES_LOCAL tests later,
don't duplicate that work in check_relocs.
* elf64-ppc.c (ppc64_elf_check_relocs): Remove opd and ifunc
conditions for rel_count.
(dec_dynrel_count): Likewise.
(allocate_dynrelocs): Test for opd and ifunc when allocating
relative relocs.
(ppc64_elf_size_dynamic_sections): Likewise.
Similarly to the local GOT case.
* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Don't allocate
space for PLT relocs against local syms when enable_dt_relr.
Fixes another case where we end up with superfluous R_PPC64_NONE.
* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Don't allocate
space for GOT relocs against non-TLS local syms when enable_dt_relr.
(ppc64_elf_layout_multitoc): Likewise.
HJ: "There are 238 R_PPC64_NONEs in libc.so.6 alone."
Indeed, let's make them go away. I had the SYMBOL_REFERENCES_LOCAL
test in the wrong place. check_relocs is too early to know whether a
symbol is dynamic in a shared library. Lots of glibc symbols are made
local by version script, but that doesn't happen until
size_dynamic_sections.
* elf64-ppc.c (ppc64_elf_check_relocs): Don't count relative relocs
here depending on SYMBOL_REFERENCES_LOCAL.
(dec_dynrel_count): Likewise.
(allocate_dynrelocs): Do so here instead.
I see this error with clang-14:
CC elf64-ppc.lo
/home/smarchi/src/binutils-gdb/bfd/elf64-ppc.c:13131:11: error: use of bitwise '&' with boolean operands [-Werror,-Wbitwise-instead-of-logical]
return (check_pasted_section (info, ".init")
~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fix by replacing & with &&. But given that the check_pasted_section
function has side-effects and we want to make sure both calls are made,
assign to temporary variables before evaluating the `&&`.
Change-Id: I849e1b2401bea5f4d8ef3ab9af99ba9e3ef42490
PowerPC64 takes a more traditional approach to DT_RELR than x86. Count
relative relocs in check_relocs, allocate space for them and output in
the usual places but not doing so when enable_dt_relr. DT_RELR is
sized in the existing ppc stub relaxation machinery, run via the
linker's ldemul_after_allocation hook. DT_RELR is output in the same
function that writes ppc stubs, run via ldemul_finish.
This support should be considered experimental.
bfd/
* elf64-ppc.c (struct ppc_local_dyn_relocs): Renamed from
ppc_dyn_relocs. Add rel_count field. Update uses.
(struct ppc_dyn_relocs): New. Replace all uses of elf_dyn_relocs.
(struct ppc_link_hash_table): Add relr_alloc, relr_count and
relr_addr.
(ppc64_elf_copy_indirect_symbol): Merge rel_count.
(ppc64_elf_check_relocs): Init rel_count for global and local syms.
(dec_dynrel_count): Change r_info param to reloc pointer. Update
all callers. Handle decrementing rel_count.
(allocate_got): Don't allocate space for relative relocs when
enable_dt_relr.
(allocate_dynrelocs): Likewise.
(ppc64_elf_size_dynamic_sections): Likewise. Handle srelrdyn.
(ppc_build_one_stub): Don't emit relative relocs on .branch_lt.
(compare_relr_address, append_relr_off): New functions.
(got_and_plt_relr_for_local_syms, got_and_plt_relr): Likewise.
(ppc64_elf_size_stubs): Size .relr.syn.
(ppc64_elf_build_stubs): Emit .relr.dyn.
(build_global_entry_stubs_and_plt): Don't output relative relocs
when enable_dt_relr.
(write_plt_relocs_for_local_syms): Likewise.
(ppc64_elf_relocate_section): Likewise.
binutils/
* testsuite/lib/binutils-common.exp (supports_dt_relr): Add
powerpc64.
ld/
* emulparams/elf64ppc.sh: Source dt-relr.sh.
* testsuite/ld-elf/dt-relr-2b.d: Adjust for powerpc.
* testsuite/ld-elf/dt-relr-2c.d: Likewise.
* testsuite/ld-elf/dt-relr-2d.d: Likewise.
* testsuite/ld-elf/dt-relr-2e.d: Likewise.
bfd/
* elf-bfd.h (UNDEFWEAK_NO_DYNAMIC_RELOC): Test linker_def.
ld/
* ldelf.c (ldelf_before_allocation): Don't force __ehdr_start
local and hidden here..
* ldlang.c (lang_symbol_tweaks): ..do so here instead and set
def_regular and linker_def for check_relocs. New function
extracted from lang_process.
tc-ppc.c: In function 'ppc_comm':
tc-ppc.c:4560:40: error: 'visibility' may be used uninitialized in this function [-Werror=maybe-uninitialized]
With that fixed we hit lots of segfaults in the ld testsuite.
PR 22085
bfd/
* xcofflink.c (xcoff_link_input_bfd): Don't segfault on NULL
sym_hash.
gas/
* config/tc-ppc.c (ppc_comm): Init visibility.
This makes the code setting DT_RELR tags generally available. Many
targets will be able to use the defaults. Those that can't should set
up sh_entsize for .relr.dyn output section before reaching the dynamic
tag code in bfd_elf_final_link.
* elflink.c (bfd_elf_final_link): Set up DT_RELR tags and sh_entsize.
* elfxx-x86.c (_bfd_x86_elf_finish_dynamic_sections): Don't do any
of that here.
When DT_RELR is enabled, to avoid random run-time crash with older glibc
binaries without DT_RELR support, add a GLIBC_ABI_DT_RELR symbol version,
which is provided by glibc with DT_RELR support, dependency on the shared
C library if it provides a GLIBC_2.XX symbol version.
bfd/
* elflink.c (elf_link_add_dt_relr_dependency): New function.
(bfd_elf_size_dynamic_sections): Call
elf_link_add_dt_relr_dependency if DT_RELR is enabled.
ld/
* ld.texi: Mention GLIBC_ABI_DT_RELR in -z pack-relative-relocs
entry.
* testsuite/ld-elf/dt-relr-glibc-1.c: New file.
* testsuite/ld-elf/dt-relr-glibc-1a.rd: Likewise.
* testsuite/ld-elf/dt-relr-glibc-1b.rd: Likewise.
* testsuite/ld-elf/dt-relr.exp: Likewise.
DT_RELR is implemented with linker relaxation:
1. During linker relaxation, we scan input relocations with the same
logic in relocate_section to determine if a relative relocation should
be generated and save the relative relocation candidate information for
sizing the DT_RELR section later after all symbols addresses can be
determined. For these relative relocations which can't be placed in
the DT_RELR section, they will be placed in the rela.dyn/rel.dyn
section.
2. When DT_RELR is enabled, _bfd_elf_map_sections_to_segments calls a
backend function to size the DT_RELR section which will compute the
DT_RELR section size and tell ldelf_map_segments to layout sections
again when the DT_RELR section size has been increased.
3. After regular symbol processing is finished, bfd_elf_final_link calls
a backend function to finish the DT_RELR section.
* elf32-i386.c (elf_i386_relocate_section): Don't generate
relative relocation when DT_RELR is enabled.
(elf_i386_finish_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_relocate_section): Don't generate
relative relocation when DT_RELR is enabled.
(elf_x86_64_finish_dynamic_symbol): Likewise.
* elfxx-x86.c (_bfd_x86_elf_link_hash_table_create): Initialize
relative_r_type, relative_r_name, elf_append_reloc,
elf_write_addend and elf_write_addend_in_got.
(elf_x86_relative_reloc_record_add): New function.
(_bfd_x86_elf_link_relax_section): Likewise.
(elf64_dt_relr_bitmap_add): Likewise.
(elf32_dt_relr_bitmap_add): Likewise.
(_bfd_elf32_write_addend): Likewise.
(_bfd_elf64_write_addend): Likewise.
(elf_x86_size_or_finish_relative_reloc): Likewise.
(elf_x86_compute_dl_relr_bitmap): Likewise.
(elf_x86_write_dl_relr_bitmap): Likewise.
(elf_x86_relative_reloc_compare ): Likewise.
(_bfd_elf_x86_size_relative_relocs): Likewise.
(_bfd_elf_x86_finish_relative_relocs): Likewise.
(_bfd_x86_elf_size_dynamic_sections): Skip the .relr.dyn section.
(_bfd_x86_elf_finish_dynamic_sections): Convert 3 spare dynamic
tags to DT_RELR, DT_RELRSZ and for compact relative relocation.
* elfxx-x86.h (X86_64_GOT_TYPE_P): New.
(I386_GOT_TYPE_P): Likewise.
(X86_GOT_TYPE_P): Likewise.
(X86_64_RELATIVE_RELOC_TYPE_P): Likewise.
(I386_RELATIVE_RELOC_TYPE_P): Likewise.
(X86_RELATIVE_RELOC_TYPE_P): Likewise.
(X86_LOCAL_GOT_RELATIVE_RELOC_P): Likewise.
(I386_PCREL_TYPE_P): Likewise.
(X86_64_PCREL_TYPE_P): Likewise.
(X86_64_NEED_DYNAMIC_RELOC_TYPE_P): Rewrite.
(I386_NEED_DYNAMIC_RELOC_TYPE_P): Likewise.
(GENERATE_DYNAMIC_RELOCATION_P): Also check rel_from_abs.
(elf_x86_link_hash_entry): Add got_relative_reloc_done.
(elf_x86_relative_reloc_record): New.
(elf_x86_relative_reloc_data): Likewise.
(elf_dt_relr_bitmap): Likewise.
(elf_x86_link_hash_table): Add dt_relr_bitmap, relative_reloc,
unaligned_relative_reloc, relative_r_type, relative_r_name,
elf_append_reloc, elf_write_addend, elf_write_addend_in_got and
relative_reloc_done.
(elf_x86_relative_reloc_done): New.
(relative_reloc_packed): Likewise.
(_bfd_x86_elf_link_relax_section): Likewise.
(_bfd_elf_x86_size_relative_relocs): Likewise.
(_bfd_elf_x86_finish_relative_relocs): Likewise.
(_bfd_elf32_write_addend): Likewise.
(_bfd_elf64_write_addend): Likewise.
(bfd_elf32_bfd_relax_section): Likewise.
(bfd_elf64_bfd_relax_section): Likewise.
(elf_backend_size_relative_relocs): Likewise.
(elf_backend_finish_relative_relocs): Likewise.
(elf_x86_allocate_local_got_info): Also allocate
relative_reloc_done.
On some targets, the DT_RELR section size can be computed only after all
symbols addresses can be determined. Set the preliminary DT_RELR section
size before mapping sections to segments and set the final DT_RELR section
size after regular symbol processing is done.
* elf-bfd.h (elf_backend_data): Add size_relative_relocs and
finish_relative_relocs.
* elf.c (_bfd_elf_map_sections_to_segments): Call
size_relative_relocs if DT_RELR is enabled.
* elflink.c (bfd_elf_final_link): Call finish_relative_relocs
after regular symbol processing is finished if DT_RELR is enabled.
* elfxx-target.h (elf_backend_size_relative_relocs): New.
(elf_backend_finish_relative_relocs): Likewise.
(elfNN_bed): Add elf_backend_size_relative_relocs and
elf_backend_finish_relative_relocs.
Add a -z pack-relative-relocs option to enable DT_RELR and create a
relr.dyn section for DT_RELR. DT_RELR is implemented with the linker
relaxation infrastructure, but it doesn't require the --relax option
enabled. -z pack-relative-relocs implies -z combreloc. -z nocombreloc
implies -z nopack-relative-relocs.
-z pack-relative-relocs is chosen over the similar option in lld,
--pack-dyn-relocs=relr, to implement a glibc binary lockout mechanism
with a special glibc version symbol, to avoid random crashes of DT_RELR
binaries with the existing glibc binaries.
bfd/
* elf-bfd.h (elf_link_hash_table): Add srelrdyn.
* elflink.c (_bfd_elf_link_create_dynamic_sections): Create a
.relr.dyn section for DT_RELR.
include/
* bfdlink.h (bfd_link_info): Add enable_dt_relr.
ld/
* News: Mention -z pack-relative-relocs and
-z nopack-relative-relocs.
* ld.texi: Document -z pack-relative-relocs and
-z nopack-relative-relocs.
* ldelf.c (ldelf_after_parse): Disable DT_RELR if not building
PIE nor shared library. Add 3 spare dynamic tags for DT_RELR,
DT_RELRSZ and DT_RELRENT.
* ldlang.c (lang_relax_sections): Also enable relaxation if
DT_RELR is enabled.
* emulparams/elf32_x86_64.sh: Source dt-relr.sh.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* emulparams/dt-relr.sh: New file.
* scripttempl/elf.sc: Support .relr.dyn.
On some targets, the DT_RELR section size can be computed only after all
symbols addresses can be determined. Update ldelf_map_segments to pass
need_layout to _bfd_elf_map_sections_to_segments which will size DT_RELR
section and set need_layout to true if the DT_RELR section size is changed.
bfd/
* elf-bfd.h (_bfd_elf_map_sections_to_segments): Add a bool
pointer argument.
* elf.c (_bfd_elf_map_sections_to_segments): Add a bool pointer
argument to indicate if section layout needs update.
(assign_file_positions_for_load_sections): Pass NULL to
_bfd_elf_map_sections_to_segments.
* elflink.c (_bfd_elf_strip_zero_sized_dynamic_sections): Pass
NULL to _bfd_elf_map_sections_to_segments.
ld/
* ldelfgen.c (ldelf_map_segments): Pass &need_layout to
_bfd_elf_map_sections_to_segments.
This patch adds a primary support for hidden and internal visibility in
GNU linker for XCOFF format.
The protected visibility isn't yet supported.
PR 22085
bfd/ChangeLog:
* xcofflink.c (xcoff_dynamic_definition_p): Add hidden
and internal visibility support.
(xcoff_link_add_symbols): Likewise.
(xcoff_auto_export_p): Likewise.
(bfd_xcoff_export_symbol): Likewise.
(xcoff_link_input_bfd): Likewise.
ld/ChangeLog:
* testsuite/ld-vsb/main.c: Adapt for XCOFF.
* testsuite/ld-vsb/sh1.c: Likewse.
* testsuite/ld-vsb/vsb.exp: Likewise.
* testsuite/ld-vsb/visibility-1-xcoff-32.d: New test.
* testsuite/ld-vsb/visibility-1-xcoff-64.d: New test.
* testsuite/ld-vsb/visibility-2-xcoff-32.d: New test.
* testsuite/ld-vsb/visibility-2-xcoff-64.d: New test.
* testsuite/ld-vsb/xcoffvsb.dat: New test.
XCOFF assembly defines the visibility using an additional argument
on several pseudo-ops: .globl, .weak, .extern and .comm.
This implies that .globl and .weak syntax is different than the
usual GNU syntax. But we want to provide compatibility with AIX
assembler, especially because GCC is generating the visibility
using this XCOFF syntax.
PR 22085
bfd/ChangeLog:
* coffcode.h (coff_write_object_contents): Change XCOFF header
vstamp field to 2.
* coffgen.c (coff_print_symbol): Increase the size for n_type.
gas/ChangeLog:
* config/tc-ppc.c (ppc_xcoff_get_visibility): New function.
(ppc_globl): New function.
(ppc_weak): New function.
(ppc_comm): Add visibility field support.
(ppc_extern): Likewise.
* testsuite/gas/all/cofftag.d: Adjust to new n_type size
providing by objdump.
* testsuite/gas/ppc/test1xcoff32.d: Likewise.
* testsuite/gas/ppc/aix.exp: Add new tests.
* testsuite/gas/ppc/xcoff-visibility-1-32.d: New test.
* testsuite/gas/ppc/xcoff-visibility-1-64.d: New test.
* testsuite/gas/ppc/xcoff-visibility-1.s: New test.
include/ChangeLog:
* coff/internal.h (SYM_V_INTERNAL, SYM_V_HIDDEN,
SYM_V_PROTECTED, SYM_V_EXPORTED, SYM_V_MASK): New defines.
* coff/xcoff.h (struct xcoff_link_hash_entry): Add visibility
field.
ld/ChangeLog:
* testsuite/ld-pe/pr19803.d: Adjust to new n_type size
providing by objdump.
For the sake of DT_RELR.
bfd/
* elflink.c (elf_link_input_bfd): Don't set SEC_ELF_REVERSE_COPY
here. Move sanity checks to reverse copying code.
ld/
* ldlang.c (lang_add_section): Set SEC_ELF_REVERSE_COPY for
.ctors/.dtors in .init_array/.fini_array.
This patch adds support for TLS relocation targeting C_HIDEXT symbols.
In gas, TLS relocations, except R_TLSM and R_TLMSL, must keep the value
of their target symbol.
In ld, it simply ensures that internal TLS symbols are added to the
linker hash table for xcoff_reloc_type_tls.
It also improves the tests made by both.
bfd/ChangeLog:
* coff-rs6000.c (xcoff_howto_table): Fix name of R_TLSML.
(xcoff_reloc_type_tls): Replace the error when h is NULL by
an assert.
(xcoff_complain_overflow_unsigned_func): Adjust comments.
* coff64-rs6000.c (xcoff64_howto_table): Fix name of R_TLSML.
* xcofflink.c (xcoff_link_add_symbols_to_hash_table): New
function.
(xcoff_link_add_symbols): Add C_HIDEXT TLS symbols to the linker
hash table.
gas/ChangeLog:
* config/tc-ppc.c (md_apply_fix): Enable support for TLS
relocation over internal symbols.
* testsuite/gas/ppc/aix.exp: Replace xcoff-tlms by xcoff-tls.
* testsuite/gas/ppc/xcoff-tlsm-32.d: Removed.
* testsuite/gas/ppc/xcoff-tlsm-64.d: Removed.
* testsuite/gas/ppc/xcoff-tlsm.s: Removed.
* testsuite/gas/ppc/xcoff-tls-32.d: New test.
* testsuite/gas/ppc/xcoff-tls-64.d: New test.
* testsuite/gas/ppc/xcoff-tls.s: New test.
ld/ChangeLog:
* testsuite/ld-powerpc/aix52.exp: Improve aix-tls-reloc test.
* testsuite/ld-powerpc/aix-tls-reloc.s: Likewise.
* testsuite/ld-powerpc/aix-tls-reloc-32.d: Removed.
* testsuite/ld-powerpc/aix-tls-reloc-64.d: Removed.
* testsuite/ld-powerpc/aix-tls-reloc-32.dd: New test.
* testsuite/ld-powerpc/aix-tls-reloc-32.dt: New test.
* testsuite/ld-powerpc/aix-tls-reloc-64.dd: New test.
* testsuite/ld-powerpc/aix-tls-reloc-64.dt: New test.
DT_RELR encodes consecutive R_*_RELATIVE relocations in GOT (the global
offset table) and data sections in a compact format:
https://groups.google.com/g/generic-abi/c/bX460iggiKg
On some targets, R_*_RELATIVE relocations are counted and the GOT offsets
are allocated when setting the dynamic section sizes after seeing all
relocations. R_*_RELATIVE relocations are generated while relocating
sections after section layout has been finalized.
To prepare for DT_RELR implementation on these targets, extract
_bfd_elf_link_iterate_on_relocs from _bfd_elf_link_check_relocs so
that a backend can scan relocations in elf_backend_always_size_sections
For x86 targets, the old check_relocs is renamed to scan_relocs and a
new check_relocs is added to chek input sections and create dynamic
relocation sections so that they will be mapped to output sections.
scan_relocs is now called from elf_backend_always_size_sections.
Since relocations are scanned after __start, __stop, .startof. and
.sizeof. symbols have been finalized on x86, __[start|stop]_SECNAME for
--gc-sections -z start-stop-gc are now zero when all SECNAME sections
been garbage collected. This is no need for elf_x86_start_stop_gc_p.
bfd/
* elf-bfd.h (_bfd_elf_link_iterate_on_relocs): New.
* elf32-i386.c (elf_i386_convert_load_reloc): Don't call
elf_x86_start_stop_gc_p.
(elf_i386_check_relocs): Renamed to ...
(elf_i386_scan_relocs): This. Don't call
_bfd_elf_make_dynamic_reloc_section.
(elf_i386_always_size_sections): New.
(elf_backend_check_relocs): Removed.
(elf_backend_always_size_sections): New.
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Don't call
elf_x86_start_stop_gc_p.
(elf_x86_64_check_relocs): Renamed to ...
(elf_x86_64_scan_relocs): This. Don't call
_bfd_elf_make_dynamic_reloc_section.
(elf_x86_64_always_size_sections): New.
(elf_backend_check_relocs): Removed.
(elf_backend_always_size_sections): New.
* elflink.c (elf_link_check_or_scan_relocs):
New. Extracted from _bfd_elf_link_check_relocs.
(_bfd_elf_link_check_relocs): Call elf_link_check_or_scan_relocs.
* elfxx-x86.c (_bfd_x86_elf_check_relocs): New.
* elfxx-x86.h (X86_64_NEED_DYNAMIC_RELOC_TYPE_P): New.
(I386_NEED_DYNAMIC_RELOC_TYPE_P): Likewise.
(X86_NEED_DYNAMIC_RELOC_TYPE_P): Likewise.
(_bfd_x86_elf_check_relocs): Likewise.
(elf_backend_check_relocs): Likewise.
(elf_backend_always_size_sections): Removed.
(elf_x86_start_stop_gc_p): Likewise.
ld/
* testsuite/ld-i386/pr27491-1a.d: Updated.
* testsuite/ld-x86-64/pr27491-1a.d: Likewise.
Update the default ISA spec from 2.2 to 20191213 will change the default
version of i from 2.0 to 2.1. Since zicsr and zifencei are separated
from i 2.1, users need to add them in the architecture string if they need
fence.i and csr instructions. Besides, we also allow old ISA spec can
recognize zicsr and zifencei, but we won't output them since they are
already included in the i extension when i's version is less than 2.1.
bfd/
* elfxx-riscv.c (riscv_parse_add_subset): Allow old ISA spec can
recognize zicsr and zifencei.
gas/
* config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Updated to 20191213.
* testsuite/gas/riscv/csr-version-1p10.d: Added zicsr to -march since
the default version of i is 2.1.
* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
* testsuite/gas/riscv/option-arch-03.d: Updated i's version to 2.1.
* testsuite/gas/riscv/option-arch-03.s: Likewise.
ld/
* testsuite/ld-riscv-elf/call-relax.d: Added zicsr to -march since
the default version of i is 2.1.
* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated i's version to 2.1.
* testsuite/ld-riscv-elf/attr-merge-arch-01a.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-01b.: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-02a.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-02b.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-03a.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-03b.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d: Added zifencei
into Tag_RISCV_arch since it is added implied when i's version is
larger than 2.1.
Add elf_x86_allocate_local_got_info to allocate x86 GOT info for local
symbols.
* elf32-i386.c (elf_i386_check_relocs): Call
elf_x86_allocate_local_got_info.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
* elfxx-x86.h (elf_x86_allocate_local_got_info): New.
Currently, on 32-bit and 64-bit ARM, it seems that ld generates p_align
values of 0x10000 even if no section alignment is greater than 0x1000.
The issue is more general and probably affects other targets with multiple
page sizes.
While file layout absolutely must take 64K page size into account, that
does not have to be reflected in the p_align value. If running on a 64K
kernel, the file will be loaded at a 64K page boundary by necessity. On
a 4K kernel, 64K alignment is not needed.
The glibc loader has been fixed to honor p_align:
https://sourceware.org/bugzilla/show_bug.cgi?id=28676
similar to kernel:
commit ce81bb256a224259ab686742a6284930cbe4f1fa
Author: Chris Kennelly <ckennelly@google.com>
Date: Thu Oct 15 20:12:32 2020 -0700
fs/binfmt_elf: use PT_LOAD p_align values for suitable start address
This means that on 4K kernels, we will start to do extra work for 64K
p_align, but this pointless for pretty much all binaries (whose section
alignment rarely exceeds 16).
The minimum page size is used, instead of the maximum section alignment
due to this glibc bug:
https://sourceware.org/bugzilla/show_bug.cgi?id=28688
It has been fixed in glibc 2.35. But linker output must work on existing
glibc binaries.
1. Set p_align to the minimum page size while laying out segments aligning
to the maximum page size or section alignment. The run-time loader can
align segments to the minimum page size or above, depending on system page
size.
2. If -z max-page-size=NNN is used, p_align will be set to the maximum
page size or the largest section alignment.
3. If a section requires alignment higher than the minimum page size,
don't set p_align to the minimum page size.
4. If a section requires alignment higher than the maximum page size,
set p_align to the section alignment.
5. For objcopy, when the minimum page size != the maximum page size,
p_align may be set to the minimum page size while segments are aligned
to the maximum page size. In this case, the input p_align will be
ignored and the maximum page size will be used to align the ouput
segments.
6. Update linker to disallow the common page size > the maximum page size.
7. Update linker to avoid the common page size > the maximum page size.
8. Adjust pru_irq_map-1.d to expect p_align == sh_addralign:
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 20000000 00007c 000004 00 AX 0 0 4
...
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000074 0x00000000 0x00000000 0x00008 0x00008 RW 0x1
LOAD 0x00007c 0x20000000 0x20000000 0x00004 0x00004 R E 0x4
vs.
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 20000000 00007c 000004 00 AX 0 0 4
...
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000074 0x00000000 0x00000000 0x00008 0x00008 RW 0x1
LOAD 0x00007c 0x20000000 0x20000000 0x00004 0x00004 R E 0x1
To enable this linker optimization, the backend should define ELF_P_ALIGN
to ELF_MINPAGESIZE.
bfd/
PR ld/28689
PR ld/28695
* elf-bfd.h (elf_backend_data): Add p_align.
* elf.c (assign_file_positions_for_load_sections): Set p_align
to the default p_align value while laying out segments aligning
to maximum page size or section alignment.
(elf_is_p_align_valid): New function.
(copy_elf_program_header): Call elf_is_p_align_valid to determine
if p_align is valid.
* elfxx-target.h (ELF_P_ALIGN): New. Default to 0.
(elfNN_bed): Add ELF_P_ALIGN.
* elfxx-x86.h (ELF_P_ALIGN): New. Set to ELF_MINPAGESIZE.
include/
PR ld/28689
PR ld/28695
* bfdlink.h (bfd_link_info): Add maxpagesize_is_set.
ld/
PR ld/28689
PR ld/28695
* emultempl/elf.em (gld${EMULATION_NAME}_handle_option): Set
link_info.maxpagesize_is_set for -z max-page-size=NNN.
* ldelf.c (ldelf_after_parse): Disallow link_info.commonpagesize
> link_info.maxpagesize.
* testsuite/ld-elf/elf.exp: Pass -z max-page-size=0x4000 to
linker to build mbind2a and mbind2b.
* testsuite/ld-elf/header.d: Add -z common-page-size=0x100.
* testsuite/ld-elf/linux-x86.exp: Add PR ld/28689 tests.
* testsuite/ld-elf/p_align-1.c: New file.
* testsuite/ld-elf/page-size-1.d: New test.
* testsuite/ld-elf/pr26936.d: Add -z common-page-size=0x1000.
* testsuite/ld-elf/seg.d: Likewise.
* testsuite/ld-scripts/rgn-at5.d: Likewise.
* testsuite/ld-pru/pru_irq_map-1.d: Append 1 to name. Adjust
expected PT_LOAD segment alignment.
* testsuite/ld-pru/pru_irq_map-2.d: Append 2 to name.
* testsuite/ld-scripts/pr23571.d: Add -z max-page-size=0x1000.
Use 0x%v, instead of bfd_sprintf_vma, to report relative relocations.
Change linker relative relocations report from
tmpdir/dump: R_X86_64_IRELATIVE (offset: 0x0000000000002000, info: 0x0000000000000025, addend: 0x0000000000001007) against 'ifunc' for section '.data.rel.ro.local' in tmpdir/report-reloc-1.o
to
tmpdir/dump: R_X86_64_IRELATIVE (offset: 0x2000, info: 0x25, addend: 0x1007) against 'ifunc' for section '.data.rel.ro.local' in tmpdir/report-reloc-1.o
bfd/
* elfxx-x86.c (_bfd_x86_elf_link_report_relative_reloc): Use
0x%v instead of bfd_sprintf_vma.
ld/
* testsuite/ld-i386/report-reloc-1.l: Updated.
* testsuite/ld-x86-64/report-reloc-1.l: Likewise.
