In fact, we can treate these two relocation as the same one in the
riscv_elf_check_relocs. I have heard that RISC-V lld had made this
improvement, and so had GNU AARCH64, they only need R_AARCH64_CALL26
for calls rather than two seperate relocations.
Beside, the following PLT issue for RISC-V 32-bit glibc seems to be
fixed by applying at least this patch.
<https://sourceware.org/pipermail/libc-alpha/2020-August/117214.html>
I have ran the toolchain regression, and everything seems fine for now.
bfd/
* elfnn-riscv.c (riscv_elf_check_relocs): Treat R_RISCV_CALL
and R_RISCV_CALL_PLT as the same in the riscv_elf_check_relocs.
(riscv_elf_relocate_section): Remove the R_RISCV_CALL for the
unresolved reloc checks.
ld/
testsuite/ld-riscv-elf/lib-nopic-01a.s: Use R_RISCV_JAL rather
than R_RISCV_CALL.
testsuite/ld-riscv-elf/lib-nopic-01b.d: Likewise.
testsuite/ld-riscv-elf/lib-nopic-01b.s: Likewise.
PR 26356
* som.c (som_bfd_copy_private_section_data): Issue error when a
subspace is specified without its containing space.
* testsuite/binutils-all/objcopy.exp (objcopy --reverse-bytes): Add
"-j $PRIVATE$" to command on hppa*-*-hpux*.
* testsuite/lib/utils-lib.exp (default_binutils_run): Remove existing
dollar-sign quotes before quoting. Do this prior to generating log
output.
Yes, the target is marked obsolete due to this and other segfaults,
but this one is easy enough to fix.
* elf32-arm.c (elf32_arm_final_link_relocate): Don't segfault
on sym_sec not being output.
PR 26416
* elf64-alpha.c (elf64_alpha_relax_tls_get_addr): Test for and
ignore local symbols.
(elf64_alpha_relax_got_load): Do not check for local dynamic
symbols.
(OP_LDA, OP_LDAH, OP_LDQ, OP_BR, OP_BSR): Use unsigned constant
values.
(INSN_A) Cast the A parameter to unsigned.
(INSN_AB): Define in terms of INSN_A.
(INSN_ABC): Likewise.
(INSN_ABO): Likewise.
(INSN_AD): Likewise.
An unsigned short value is promoted to int, thus triggering UB on a
left shift of a positive value that results in a negative int.
PR 26415
* vms-misc.c (vms_time_t_to_vms_time): Don't use unsigned short vars.
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
When building with gcc with -gdwarf-5 ld tests (including ld-elf/dwarf.exp)
fail because they try to read the .debug_ranges section. But DWARF5
introduces a new .debug_rnglists section that encodes the address ranges
more efficiently. Implement reading the debug_rnglists in bfd/dwarf2.c.
Which makes all tests pass again and fixes several gcc testsuite tests
when defaulting to DWARF5.
* dwarf2.c (struct dwarf2_debug_file): Add dwarf_rnglists_buffer
and dwarf_rnglists_size fields.
(dwarf_debug_sections): Add debug_rnglists.
(dwarf_debug_section_enum): Likewise.
(read_debug_rnglists): New function.
(read_rangelist): New function to call either read_ranges or
read_rnglists. Rename original function to...
(read_ranges): ...this.
(read_rnglists): New function.
Always reading 32 bits in order to extract addends from instruction
fields is wrong when the field size is smaller. It also leads to
reading past the end of the section. This patch tidies that by
reading the proper field size, which allows some later refetching of
addends to disappear.
PR 26422
* elf32-arm.c (elf32_arm_final_link_relocate): Use the appropriate
bfd_get_x size function to read addends out of fields. Apply
rightshift adjustment too. Don't apply the now unnecessary
howto->size shift to branch REL addends. Don't refetch R_ARM_ABS8
and R_ARM_ABS16 addends. Don't refetch thumb branch addends.
Correct R_ARM_THM_JUMP6 addend.
As reported in [1], _bfd_error_handler() doesn't support '%zu'.
module_name_size is always 32-bits in the data structure we are
extracting it from, so use an unsigned int to store it instead.
[1] https://sourceware.org/pipermail/gdb-patches/2020-August/171391.html
bfd/ChangeLog:
2020-08-21 Jon Turney <jon.turney@dronecode.org.uk>
* elf.c (elfcore_grok_win32pstatus): Change name_size to unsigned
int. Use '%u' format with _bfd_error_handler to render it.
Stub sections are inserted after sec_info is sized, so have higher ids.
Test flags that will exclude stub sections before looking at the
sec_info array.
PR 26489
* elf64-ppc.c (ppc64_elf_size_stubs): Test code_sec->has_toc_reloc
and code_sec->makes_toc_func_call before sec_info[code_sec->id].
ppc64 ld optimises sequences like the following
addis 3,13,wot@tprel@ha
lwz 3,wot@tprel@l(3)
to
nop
lwz 3,wot@tprel(13)
when "wot" is located near enough to the thread pointer.
However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on
an addis rt,13,imm instruction, and while ld checked for that on the
high-part instruction it didn't disable the optimisation on the
low-part instruction. This patch fixes that problem, disabling the
tprel optimisation globally if high-part instructions don't pass
sanity checks. The optimisation is also enabled for ppc32, where
before ld.bfd had the code in the wrong place and ld.gold had it in a
block only enabled for ppc64.
bfd/
* elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for
high part tprel16 relocs.
(ppc_elf_tls_optimize): Sanity check high part tprel16 relocs.
Clear do_tls_opt on odd instructions.
(ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later.
Don't sanity check them here.
* elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for
high part tprel16 relocs.
(ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs.
Clear do_tls_opt on odd instructions.
(ppc64_elf_relocate_section): Don't sanity check TPREL16_HA.
ld/
* testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation.
* testsuite/ld-powerpc/tlsexe32.d: Likewise.
* testsuite/ld-powerpc/tlsldopt32.d: Likewise.
* testsuite/ld-powerpc/tlsmark32.d: Likewise.
* testsuite/ld-powerpc/tlsopt4_32.d: Likewise.
* testsuite/ld-powerpc/tprel.s,
* testsuite/ld-powerpc/tprel.d,
* testsuite/ld-powerpc/tprel32.d: New tests.
* testsuite/ld-powerpc/tprelbad.s,
* testsuite/ld-powerpc/tprelbad.d: New test.
* testsuite/ld-powerpc/powerpc.exp: Run them.
gold/
* powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors.
(Target_powerpc::Scan::local): Sanity check tprel high relocs.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Control tprel optimisation
with tprel_opt_ and enable for 32-bit.
The symbol string table in the .symtab section is optional and cosmetic.
Keep only one '@' for undefined versioned symbols, which are defined in
shared objects, in the symbol string table. Update "nm -D" to display
only one '@' for undefined versioned symbols.
bfd/
PR ld/26382
* elflink.c (elf_link_output_symstrtab): Keep only one '@' for
versioned symbols, which are defined in shared objects, in
symbol string table.
binutils/
PR ld/26382
* nm.c (print_symname): Display only one '@' for undefined
versioned symbols.
* doc/binutils.texi: Update nm version information.
ld/
PR ld/26382
* testsuite/ld-elf/pr26302.nd: Updated.
* testsuite/ld-elf/pr26302.rd: New file.
* testsuite/ld-elf/shared.exp: Add a test for readelf -sW.
bfd * elfnn-aarch64.c (_bfd_aarch64_erratum_835769_scan): Only sort
the data map if there are entries in it.
(_bfd_aarch64_erratum_843419_scan): Likewise.
opcodes * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
symbols.
Xen Project embeds a build ID in its hypervisor binary (including its
EFI variant), living in a standalone section. This usually gets placed
right after .rodata, and due to the rounding done on the (file) size of
.rodata the two sections appear to overlap (as far as e.g.
find_section_by_vma() is concerned). With the first byte "found" in
.rodata, nothing guarantees that the entire debug dir fits in that
section, leading to apparently random failure of objcopy on such an
image.
Possible alternatives to the solution chosen:
- make find_section_by_vma() honor virt_size,
- correct the recording of sizes elsewhere (ibfd has size == virt_size,
while obfd doesn't),
- fix the linker to avoid producing apparently overlapping sections.
While touching the condition around and the contents of the disgnostic,
pull it up ahead of the bfd_malloc_and_get_section() call: There's no
point first obtaining the section contents, in order to then fail.
PR 26428
bfd * bfd.c (bfd_update_compression_header): Also set the sh_addralign
field in the ELF header of the compressed sections.
ld * testsuite/ld-elf/zlibbegin.rS: Update expected output.
* testsuite/ld-elf/zlibnormal.rS: Likewise.
