Commit graph

3 commits

Author SHA1 Message Date
Mike Frysinger
37e9f18266 sim: switch to AC_CHECK_FUNCS_ONCE & merge a little
This avoids duplicate tests for functions between common m4, arches,
and any other sources that would trigger func tests.

Also manually delete known duplicate function tests between the m4,
bfin, and v850 ports.
2021-04-18 21:55:17 -04:00
Mike Frysinger
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
Mike Frysinger
26da232cbd sim: example-synacor: a simple implementation for reference
Provide a simple example simulator for people porting to new targets
to use as a reference.  This one has the advantage of being used by
people and having a fun program available for it.

It doesn't require a special target -- the example simulators can be
built for any existing port.
2021-04-03 16:19:16 -04:00