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Author SHA1 Message Date
Shahab Vahedi
5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS 
The numbers for the auxiliary registers "tlbindex" and
"tlbcommand" of ARCv2HS are incorrect.  This patch makes
the following changes to correct that error.

 ,------------.-----------------.---------------.
 | aux. reg.  | old (incorrect) | new (correct) |
 |------------+-----------------+---------------|
 | tlbindex   |      0x463      |     0x464     |
 | tlbcommand |      0x464      |     0x465     |
 `------------^-----------------^---------------'

opcodes/
2021-08-17  Shahab Vahedi <shahab@synopsys.com>

	* arc-regs.h (DEF): Fix the register numbers.
 2021-08-17 18:33:05 +02:00
Alan Modra
250d07de5c Update year range in copyright notice of binutils files 2021-01-01 10:31:05 +10:30
Claudiu Zissulescu
265b467340 [ARC][committed] Update int_vector_base aux register. 
INT_VECTOR_BASE auxiliary register is available across all ARC
architectures.

xxxx-xx-xx  Claudiu Zissulescu <claziss@gmail.com>

	* arc-regs.h (int_vector_base): Make it available for all ARC
	CPUs.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
 2020-02-25 10:27:07 +02:00
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
claziss
b6523c37fb [ARC] Update handling AUX-registers. 
Update aux-registers data-base, and accept aux-registers names with
upper/lowercase names.

opcode/
2017-07-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Update aux-registers.

gas/
2017-07-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/tc-arc.c (find_opcode_match): Accept uppercase aux-regs
	names.
	* testsuite/gas/arc/ld2.d: Update test.
	* testsuite/gas/arc/taux.d: Likewise.
	* testsuite/gas/arc/taux.s: Likewise.

include/
2017-07-18  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 2018-08-06 16:41:32 +03:00
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
claziss
70b448ba7c [ARC] Add SecureShield AUX registers 
Update auxiliary registers with SecureShield ones.

opcodes/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (sec_stat): New aux register.
	(aux_kernel_sp): Likewise.
	(aux_sec_u_sp): Likewise.
	(aux_sec_k_sp): Likewise.
	(sec_vecbase_build): Likewise.
	(nsc_table_top): Likewise.
	(nsc_table_base): Likewise.
	(ersec_stat): Likewise.
	(aux_sec_except): Likewise.
 2017-07-19 09:56:55 +02:00
John Eric Martin
684d5a10b1 [ARC] Add JLI support. 
The following relocation types were added to GCC/binutils:

ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.

bfd/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c (JLI): Define.
	* reloc.c: Add JLI relocations.

gas/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/jli-1.d: New file.
	* testsuite/gas/arc/jli-1.s: Likewise.
	* testsuite/gas/arc/taux.d: Update for jli_base.

include/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* elf/arc-reloc.def: Add JLI relocs howto.
	* opcode/arc-func.h (replace_jli): New function.

ld/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* emulparams/arcelf.sh (JLI_START_TABLE): Define.
	* scripttempl/elfarc.sc: Handle jlitab section.
	* scripttempl/elfarcv2.sc: Likewise.
	* testsuite/ld-arc/arc.exp: Add JLI test.
	* testsuite/ld-arc/jli-script.ld: New file.
	* testsuite/ld-arc/jli-simple.dd: Likewise.
	* testsuite/ld-arc/jli-simple.rd: Likewise.
	* testsuite/ld-arc/jli-simple.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.

opcode/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
	(UIMM3_23): Adjust accordingly.
	* arc-regs.h: Add/correct jli_base register.
	* arc-tbl.h (jli_s): Likewise.
 2017-07-19 09:56:55 +02:00
Vineet Gupta
66a5a74065 Distinguish some of the registers different on ARC700 and HS38 cpus 
opcodes	* arc-regs.h: Distinguish some of the registers different on
	ARC700 and HS38 cpus.

gas	* testsuite/gas/arc/st.d: Update for 0xe having a name now
 2017-02-15 08:54:25 +00:00
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Claudiu Zissulescu
f36e33dac1 Add support for .extCondCode, .extCoreRegister and .extAuxRegister. 
gas/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/textauxregister.d: New file.
	* testsuite/gas/arc/textauxregister.s: Likewise.
	* testsuite/gas/arc/textcondcode.d: Likewise.
	* testsuite/gas/arc/textcondcode.s: Likewise.
	* testsuite/gas/arc/textcoreregister.d: Likewise.
	* testsuite/gas/arc/textcoreregister.s: Likewise.
	* testsuite/gas/arc/textpseudoop.d: Likewise.
	* testsuite/gas/arc/textpseudoop.s: Likewise.
	* testsuite/gas/arc/ld2.d: Update test.
	* testsuite/gas/arc/st.d: Likewise.
	* testsuite/gas/arc/taux.d: Likewise.
	* doc/c-arc.texi (ARC Directives): Add .extCondCode,
	.extCoreRegister and .extAuxRegister documentation.
	* config/tc-arc.c (arc_extcorereg): New function.
	(md_pseudo_table): Add .extCondCode, .extCoreRegister and
	.extAuxRegister pseudo-ops.
	(extRegister_t): New type.
	(ext_condcode, arc_aux_hash): New global variable.
	(find_opcode_match): Check for extensions.
	(preprocess_operands): Likewise.
	(md_begin): Add aux registers in a hash.
	(assemble_insn): Update use arc_flags member.
	(tokenize_extregister): New function.
	(create_extcore_section): Likewise.
	* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Increase to 10.
	(arc_flags): Delete code, add flgp.

include/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (flag_class_t): Update.
	(ARC_OPCODE_NONE): Define.
	(ARC_OPCODE_ARCALL): Likewise.
	(ARC_OPCODE_ARCFPX): Likewise.
	(ARC_REGISTER_READONLY): Likewise.
	(ARC_REGISTER_WRITEONLY): Likewise.
	(ARC_REGISTER_NOSHORT_CUT): Likewise.
	(arc_aux_reg): Add cpu.

opcodes/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
 2016-04-12 10:21:06 +02:00
Claudiu Zissulescu
8ddf6b2a13 [ARC] Fix support for double assist instructions. 
opcodes/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-regs.h: Add a new subclass field.  Add double assist
        accumulator register values.
        * arc-tbl.h: Use DPA subclass to mark the double assist
        instructions.  Use DPX/SPX subclas to mark the FPX instructions.
        * arc-opc.c (RSP): Define instead of SP.
        (arc_aux_regs): Add the subclass field.

include/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
        (ARC_FPUDA): Define.
        (arc_aux_reg): Add new field.

gas/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/tc-arc.c (is_code_density_p): Compare directly the
        subclass field.
        (is_spfp_p, is_dpfp_p, is_spfp_p): Define.
        (check_cpu_feature): New function.
        (find_opcode_match): Use check_cpu_feature function.
        (preprocess_operands): Likewise.
        (md_parse_option): Use mfpuda, mdpfp, mspfp options.
        * testsuite/gas/arc/tdpfp.d: New file.
        * testsuite/gas/arc/tfpuda.d: Likewise.
        * testsuite/gas/arc/tfpx.s: Likewise.
 2016-04-05 17:37:45 +02:00
Claudiu Zissulescu
bd05ac5f5e [ARC] Cleanup AUX register names. 
opcodes/
2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
        (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
        (RTT): Remove duplicate.
        (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
        (PCT_CONFIG*): Remove.
        (D1L, D1H, D2H, D2L): Define.
 2016-03-30 16:06:54 +02:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Nick Clifton
886a250647 New ARC implementation. 
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
 2015-10-07 14:20:19 +01:00