On seeing PR29369 my suspicion was naturally on a recent powerpc64
change, commit 0ab80031430e. Without a reproducer, I spent time
wondering what could have gone wrong, and while I doubt this patch
would have fixed the PR, there are some improvements that can be made
to cater for user silliness.
I also noticed that when -z relro -z now sections are created out of
order, with .got before .plt in the section headers but .got is laid
out at a higher address. That's due to the address expression for
.branch_lt referencing SIZEOF(.got) and so calling init_os (which
creates a bfd section) for .got before the .plt section is created.
Fix that by ignoring SIZEOF in exp_init_os. Unlike ADDR and LOADADDR
which need to reference section vma and lma respectively, SIZEOF can
and does cope with a missing bfd section by returning zero for its
size, which of course is correct.
PR 29369
* ldlang.c (exp_init_os): Don't create a bfd section for SIZEOF.
* emulparams/elf64ppc.sh (OTHER_RELRO_SECTIONS_2): Revise
.branch_lt address to take into account possible user sections
with alignment larger than 8 bytes.
.branch_lt is really an extension of .plt, as is .iplt. We'd like all
of the PLT sections to be fixed relative to .TOC. after stub sizing,
because changes in offset to PLT entries might mean a change in stub
sizes. When -z relro, the relro layout does this by laying out
sections from the end of the relro segment. So for example, a change
in .eh_frame (which happens after stub sizing) will keep the same GOT
to PLT offset when -z relro. Not so when -z norelro, because then the
usual forward layout of section is done and .got is more aligned than
.branch_lt.
* emulparams/elf64ppc.sh: Set .branch_lt address fixed relative
to .got.
* testsuite/ld-powerpc/elfv2exe.d: Adjust to suit.
PowerPC64 takes a more traditional approach to DT_RELR than x86. Count
relative relocs in check_relocs, allocate space for them and output in
the usual places but not doing so when enable_dt_relr. DT_RELR is
sized in the existing ppc stub relaxation machinery, run via the
linker's ldemul_after_allocation hook. DT_RELR is output in the same
function that writes ppc stubs, run via ldemul_finish.
This support should be considered experimental.
bfd/
* elf64-ppc.c (struct ppc_local_dyn_relocs): Renamed from
ppc_dyn_relocs. Add rel_count field. Update uses.
(struct ppc_dyn_relocs): New. Replace all uses of elf_dyn_relocs.
(struct ppc_link_hash_table): Add relr_alloc, relr_count and
relr_addr.
(ppc64_elf_copy_indirect_symbol): Merge rel_count.
(ppc64_elf_check_relocs): Init rel_count for global and local syms.
(dec_dynrel_count): Change r_info param to reloc pointer. Update
all callers. Handle decrementing rel_count.
(allocate_got): Don't allocate space for relative relocs when
enable_dt_relr.
(allocate_dynrelocs): Likewise.
(ppc64_elf_size_dynamic_sections): Likewise. Handle srelrdyn.
(ppc_build_one_stub): Don't emit relative relocs on .branch_lt.
(compare_relr_address, append_relr_off): New functions.
(got_and_plt_relr_for_local_syms, got_and_plt_relr): Likewise.
(ppc64_elf_size_stubs): Size .relr.syn.
(ppc64_elf_build_stubs): Emit .relr.dyn.
(build_global_entry_stubs_and_plt): Don't output relative relocs
when enable_dt_relr.
(write_plt_relocs_for_local_syms): Likewise.
(ppc64_elf_relocate_section): Likewise.
binutils/
* testsuite/lib/binutils-common.exp (supports_dt_relr): Add
powerpc64.
ld/
* emulparams/elf64ppc.sh: Source dt-relr.sh.
* testsuite/ld-elf/dt-relr-2b.d: Adjust for powerpc.
* testsuite/ld-elf/dt-relr-2c.d: Likewise.
* testsuite/ld-elf/dt-relr-2d.d: Likewise.
* testsuite/ld-elf/dt-relr-2e.d: Likewise.
This implements padding of orphan executable sections for PowerPC.
Of course, the simple implementation of bfd_arch_ppc_nop_fill and
removing the NOP definition didn't work, with powerpc64 hitting a
testsuite failure linking to S-records. That's because the srec
target is BFD_ENDIAN_UNKNOWN so the test of bfd_big_endian (abfd) in
default_data_link_order therefore returned false, resulting in a
little-endian nop pattern. The rest of the patch fixes that problem
by adding a new field to bfd_link_info that can be used to determine
actual endianness on targets like srec.
PR 13616
include/
* bfdlink.h (struct bfd_link_info <big_endian>): New field.
bfd/
* cpu-powerpc.c (bfd_arch_ppc_nop_fill): New function, use it
for all ppc arch info.
* linker.c (default_data_link_order): Pass info->big_endian to
arch_info->fill function.
ld/
* emulparams/elf64lppc.sh (NOP): Don't define.
* emulparams/elf64ppc.sh (NOP): Don't define.
* ldwrite.c (build_link_order): Use link_info.big_endian. Move
code determining endian to use for data_statement to..
* ldemul.c (after_open_default): ..here. Set link_info.big_endian.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
.toc1 is the second level TOC section used by gcc's -mminimal-toc. It
too should be read-only after relocation. Also, the last patch
description mentioned .sbss moving but didn't actually do that, so fix
that problem. .tocbss (whatever that is) was before .sbss previously,
so move that one too.
* emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of..
(OTHER_BSS_SYMBOLS): ..this.
(OTHER_PLT_RELOC_SECTIONS): Don't define.
(OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss.
(OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to..
(OTHER_RELRO_SECTIONS_2): ..here.
* scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
More sections can be read-only after relocation. .opd is an obvious
candidate.
* emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Move .opd to..
(OTHER_RELRO_SECTIONS_2): ..here, new define.
* scripttempl/elf.sc: Add OTHER_RELRO_SECTIONS_2.
(GOT): Define.
* emultempl/ppc64elf.em (stub_added): New static var.
(ppc_create_output_section_statements): Call ppc64_elf_init_stub_bfd.
(ppc_add_stub_section): Set stub_added.
(gld${EMULATION_NAME}_finish): Look for .got rather than .toc. Adjust
ppc64_elf_size_stubs call and test for stubs.
* scripttempl/elf.sc (GOT): Define and use.
* emulparams/elf64_aix.sh (DATA_ADDR): Don't use a fixed address
for start of .data, instead align up to 256M boundary.
* scripttempl/aix.sc: Likewise.
and $NATIVE_LIB_DIRS. Add $tool_lib before other libs.
(LIB_SEARCH_DIRS): No need to use "tr".
(COMPILE_IN): Only set for native targets.
* configure.host (NATIVE_LIB_DIRS): Specify all native search dirs
here, rather than adding lib:/usr/lib:/usr/local/lib in genscripts.sh.
* configure.tgt (powerpc*): Set tdir_*.
(powerpcle*): Correct targ_extra_emuls.
* emulparams/elf32ppc.sh (LIB_PATH): Set up native 64 bit dirs.
* emulparams/elf64ppc.sh (LIB_PATH): Likewise.
(struct ppc_link_hash_table): Add sfpr.
(ppc64_elf_link_hash_table_create): Init it.
(ppc64_elf_create_dynamic_sections): Split creation of .stub and
.glink out to..
(create_linkage_sections): ..here. Make .sfpr too.
(ppc64_elf_check_relocs): Call create_linkage_sections, and set
dynobj early.
(MIN_SAVE_FPR, MAX_SAVE_FPR): Define.
(ppc64_elf_func_desc_adjust): Look for missing ._savef* and
._restf* functions, and create as needed.
(func_desc_adjust): Only force_local for shared libs.
* emulparams/elf64ppc.sh (OTHER_TEXT_SECTIONS): Define.
