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Add ABFD argument to sim_create_inferior. Document.

Browse source 
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
This commit is contained in:
Andrew Cagney 1997-08-27 04:44:41 +00:00
parent 9f64f00ada
commit fafce69ab1
35 changed files with 626 additions and 382 deletions
Download patch file Download diff file Expand all files Collapse all files

9
gdb/ChangeLog
View file

@ -1,3 +1,12 @@
Tue Aug 26 15:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
* remote-sim.c (gdbsim_create_inferior): Pass exec_bfd into
sim_create_inferior.
(gdbsim_create_inferior): Pass -1 to proceed, sim_create_inferior
has already set the PC.
(gdbsim_create_inferior): Allow exec_file to be NULL, make "No
exec file" a warning. Ditto for "No program loaded".
Mon Aug 25 17:08:01 1997 Geoffrey Noer <noer@cygnus.com> Mon Aug 25 17:08:01 1997 Geoffrey Noer <noer@cygnus.com>
* ocd.c: revert Sun change -- enable log file handling * ocd.c: revert Sun change -- enable log file handling

45
gdb/remote-sim.c
View file

@ -418,6 +418,9 @@ gdbsim_load (prog, fromtty)
if (sim_load (gdbsim_desc, prog, NULL, fromtty) == SIM_RC_FAIL) if (sim_load (gdbsim_desc, prog, NULL, fromtty) == SIM_RC_FAIL)
error ("unable to load program"); error ("unable to load program");
/* FIXME: If a load command should reset the targets registers then
a call to sim_create_inferior() should go here. */
program_loaded = 1; program_loaded = 1;
} }
@ -438,37 +441,41 @@ gdbsim_create_inferior (exec_file, args, env)
{ {
int len; int len;
char *arg_buf,**argv; char *arg_buf,**argv;
CORE_ADDR entry_pt;
if (exec_file == 0 || exec_bfd == 0)
warning ("No exec file specified.");
if (! program_loaded) if (! program_loaded)
error ("No program loaded."); warning ("No program loaded.");
if (sr_get_debug ()) if (sr_get_debug ())
printf_filtered ("gdbsim_create_inferior: exec_file \"%s\", args \"%s\"\n", printf_filtered ("gdbsim_create_inferior: exec_file \"%s\", args \"%s\"\n",
exec_file, args); (exec_file ? exec_file: "(NULL)"),
args);
if (exec_file == 0 || exec_bfd == 0)
error ("No exec file specified.");
entry_pt = (CORE_ADDR) bfd_get_start_address (exec_bfd);
gdbsim_kill (); gdbsim_kill ();
remove_breakpoints (); remove_breakpoints ();
init_wait_for_inferior (); init_wait_for_inferior ();
len = strlen (exec_file) + 1 + strlen (args) + 1 + /*slop*/ 10; if (exec_file != NULL)
arg_buf = (char *) alloca (len); {
arg_buf[0] = '\0'; len = strlen (exec_file) + 1 + strlen (args) + 1 + /*slop*/ 10;
strcat (arg_buf, exec_file); arg_buf = (char *) alloca (len);
strcat (arg_buf, " "); arg_buf[0] = '\0';
strcat (arg_buf, args); strcat (arg_buf, exec_file);
argv = buildargv (arg_buf); strcat (arg_buf, " ");
make_cleanup (freeargv, (char *) argv); strcat (arg_buf, args);
sim_create_inferior (gdbsim_desc, argv, env); argv = buildargv (arg_buf);
make_cleanup (freeargv, (char *) argv);
}
else
argv = NULL;
sim_create_inferior (gdbsim_desc, exec_bfd, argv, env);
inferior_pid = 42; inferior_pid = 42;
insert_breakpoints (); /* Needed to get correct instruction in cache */ insert_breakpoints (); /* Needed to get correct instruction in cache */
proceed (entry_pt, TARGET_SIGNAL_DEFAULT, 0);
/* NB: Entry point already set by sim_create_inferior. */
proceed ((CORE_ADDR)-1, TARGET_SIGNAL_DEFAULT, 0);
} }
/* The open routine takes the rest of the parameters from the command, /* The open routine takes the rest of the parameters from the command,

7
include/ChangeLog
View file

@ -1,7 +1,10 @@
Tue Aug 26 12:25:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
* remote-sim.h (sim_create_inferior): Add ABFD arg. Document.
Mon Aug 25 10:50:51 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 10:50:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
* remote-sim.h (sim_open): Add ABFD arg. Change ARGV to PARGV. * remote-sim.h (sim_open): Add ABFD arg. Document.
Document.
Fri Aug 8 16:43:56 1997 Doug Evans <dje@canuck.cygnus.com> Fri Aug 8 16:43:56 1997 Doug Evans <dje@canuck.cygnus.com>

84
include/remote-sim.h
View file

@ -69,8 +69,8 @@ struct _bfd;
(This function is called when the simulator is selected from the (This function is called when the simulator is selected from the
gdb command line.) gdb command line.)
KIND specifies how the simulator will be used. Currently there are only KIND specifies how the simulator shall be used. Currently there
two kinds: stand-alone and debug. are only two kinds: stand-alone and debug.
CALLBACK specifies a standard host callback (defined in callback.h). CALLBACK specifies a standard host callback (defined in callback.h).
@ -80,6 +80,8 @@ struct _bfd;
ARGV is a standard ARGV pointer such as that passed from the ARGV is a standard ARGV pointer such as that passed from the
command line. The syntax of the argument list is is assumed to be command line. The syntax of the argument list is is assumed to be
``SIM-PROG { SIM-OPTION } [ TARGET-PROGRAM { TARGET-OPTION } ]''. ``SIM-PROG { SIM-OPTION } [ TARGET-PROGRAM { TARGET-OPTION } ]''.
The trailing TARGET-PROGRAM and args are only valid for a
stand-alone simulator.
On success, the result is a non NULL descriptor that shall be On success, the result is a non NULL descriptor that shall be
passed to the other sim_foo functions. While the simulator passed to the other sim_foo functions. While the simulator
@ -88,14 +90,14 @@ struct _bfd;
successful creation of the simulator shall not dependent on the successful creation of the simulator shall not dependent on the
presence of any of these arguments/options. presence of any of these arguments/options.
For a simulator modeling real hardware, the created simulator shall Hardware simulator: The created simulator shall be sufficiently
be sufficiently initialized to handle, with out restrictions any initialized to handle, with out restrictions any client requests
client requests (including memory reads/writes, register (including memory reads/writes, register fetch/stores and a
fetch/stores and a resume). resume).
For a simulator modeling a process, that process is not created Process simulator: that process is not created until a call to
until a call to sim_create_inferior. FIXME: What should the state sim_create_inferior. FIXME: What should the state of the simulator
of the simulator be? */ be? */
SIM_DESC sim_open PARAMS ((SIM_OPEN_KIND kind, struct host_callback_struct *callback, struct _bfd *abfd, char **argv)); SIM_DESC sim_open PARAMS ((SIM_OPEN_KIND kind, struct host_callback_struct *callback, struct _bfd *abfd, char **argv));
@ -116,58 +118,38 @@ void sim_close PARAMS ((SIM_DESC sd, int quitting));
If ABFD is non-NULL, the bfd for the file has already been opened. If ABFD is non-NULL, the bfd for the file has already been opened.
The result is a return code indicating success. The result is a return code indicating success.
For a simulator modeling real hardware, the client is permitted to Hardware simulator: A call to this function should not effect the
make multiple calls to this function. Such calls have an state of the processor registers. Multiple calls to this function
accumulative effect. are permitted and have an accumulative effect.
For a simulator modeling a process, calls to this function may be Process simulator: Calls to this function may be ignored.
ignored. */
FIXME: Some hardware targets, before a loaded program can be
executed, require the manipulation of VM registers and tables.
Such manipulation should probably (?) occure in
sim_create_inferior. */
SIM_RC sim_load PARAMS ((SIM_DESC sd, char *prog, struct _bfd *abfd, int from_tty)); SIM_RC sim_load PARAMS ((SIM_DESC sd, char *prog, struct _bfd *abfd, int from_tty));
/* Prepare to run the simulated program. /* Prepare to run the simulated program.
ARGV and ENV are NULL terminated lists of pointers. ABFD, if not NULL, provides initial processor state information.
ARGV and ENV, if non NULL, are NULL terminated lists of pointers.
For a simulator modeling real hardware, this function shall Hardware simulator: This function shall initialize the processor
initialize the processor registers to a known value. The program registers to a known value. The program counter and possibly stack
counter shall be set to the start address obtained from the last pointer shall be set using information obtained from ABFD (or
program loaded (or the hardware reset default). The ARGV and ENV hardware reset defaults). ARGV and ENV, dependant on the target
arguments can be ignored. ABI, may be written to memory.
For a simulator modeling a process, after a call to this function a Process simulator: After a call to this function, a new process
new process instance shall exist - the TEXT, DATA, BSS and stack instance shall exist. The TEXT, DATA, BSS and stack regions shall
regions shall all be initialized, ARGV and ENV shall be written to all be initialized, ARGV and ENV shall be written to process
process address space (according to the applicable ABI), and the address space (according to the applicable ABI) and the program
program counter and stack pointer set accordingly. (NB: A simulator counter and stack pointer set accordingly. */
may in fact initialize the TEXT, DATA and BSS sections during an
earlier stage).
-- SIM_RC sim_create_inferior PARAMS ((SIM_DESC sd, struct _bfd *abfd, char **argv, char **env));
FIXME: Is the below a better definition - assuming that ABFD arg is
added.
Prepare to run the simulated program.
ABFD, if not NULL, can be used to obtain initial processor state
information (eg PC value).
ARGV and ENV, if non NULL, are NULL terminated lists of pointers.
For a simulator modeling real hardware, this function shall
initialize the processor registers to a known value. The program
counter shall be set to the start address obtained from the ABFD
struct (or the hardware reset default). The ARGV and ENV arguments
can be ignored.
For a simulator modeling a process, after a call to this function a
new process instance shall exist - the TEXT, DATA, BSS and stack
regions shall all be initialized, ARGV and ENV shall be written to
process address space (according to the applicable ABI), and the
program counter and stack pointer set accordingly. */
SIM_RC sim_create_inferior PARAMS ((SIM_DESC sd, char **argv, char **env));
/* Read LENGTH bytes of the simulated program's memory and store in /* Read LENGTH bytes of the simulated program's memory and store in

3
sim/arm/ChangeLog
View file

@ -1,6 +1,9 @@
Tue Aug 26 10:37:27 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:37:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
* wrapper.c (sim_kill): Delete. * wrapper.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

1
sim/common/.Sanitize
View file

@ -64,6 +64,7 @@ sim-events.c
sim-events.h sim-events.h
sim-fpu.c sim-fpu.c
sim-fpu.h sim-fpu.h
sim-hload.c
sim-inline.c sim-inline.c
sim-inline.h sim-inline.h
sim-io.c sim-io.c

22
sim/common/ChangeLog
View file

@ -1,3 +1,25 @@
Wed Aug 27 11:55:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-utils.c (sim_analyze_program): Add prog_name argument.
Update STATE_PROG_BFD when needed with a dup'd copy of the
program.
* sim-config.c (sim_config): Delete ABFD argument, use
STATE_PROG_BFD directly.
Tue Aug 26 12:55:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
* run.c (main): Pass the open ABFD to sim_create_inferior.
* nrun.c (main): Determine prog_bfd. Pass to sim_create_inferior
and sim_load.
(bfd.h): Include.
* sim-hload.c (sim_load): New file. Implement generic sim_load for
hardware only simulator targets.
* Make-common.in (sim-hload.o): Add rule.
Wed Aug 27 09:51:42 1997 Andrew Cagney <cagney@b1.cygnus.com> Wed Aug 27 09:51:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-utils.c (sim_copy_argv): Rewrite to match malloc strategy * sim-utils.c (sim_copy_argv): Rewrite to match malloc strategy

117
sim/common/Make-common.in
View file

@ -132,7 +132,7 @@ all: libsim.a run $(SIM_EXTRA_ALL)
libsim.a: $(LIB_OBJS) libsim.a: $(LIB_OBJS)
rm -f libsim.a rm -f libsim.a
$(AR) $(ARFLAGS) libsim.a $(LIB_OBJS) $(AR) $(AR_FLAGS) libsim.a $(LIB_OBJS)
$(RANLIB) libsim.a $(RANLIB) libsim.a
run: $(SIM_RUN_OBJS) libsim.a $(LIBDEPS) run: $(SIM_RUN_OBJS) libsim.a $(LIBDEPS)
@ -181,6 +181,9 @@ sim_main_headers = \
$(srcdir)/../common/sim-trace.h \ $(srcdir)/../common/sim-trace.h \
$(srcdir)/../common/sim-profile.h \ $(srcdir)/../common/sim-profile.h \
$(srcdir)/../common/sim-engine.h \ $(srcdir)/../common/sim-engine.h \
$(srcdir)/../common/sim-events.h \
$(srcdir)/../common/sim-watch.h \
$(srcdir)/../common/sim-assert.h \
tconfig.h tconfig.h
sim-assert_h = $(srcdir)/../common/sim-assert.h sim-assert_h = $(srcdir)/../common/sim-assert.h
@ -209,69 +212,41 @@ BUILT_SRC_FROM_COMMON= \
sim-config.c \ sim-config.c \
sim-io.c sim-io.c
sim-abort.o: sim-abort.c \ sim-abort.o: $(srcdir)/../common/sim-abort.c \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-abort.c: $(srcdir)/../common/sim-abort.c $(CC) -c $(srcdir)/../common/sim-abort.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-bits.o: sim-bits.c $(sim-bits_h) $(sim-n-bits_h) $(sim-assert_h) \ sim-bits.o: $(srcdir)/../common/sim-bits.c $(sim-bits_h) $(sim-n-bits_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-bits.c: $(srcdir)/../common/sim-bits.c $(CC) -c $(srcdir)/../common/sim-bits.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-config.o: sim-config.c $(sim-config_h) $(sim-nconfig_h) $(sim-assert_h) \ sim-config.o: $(srcdir)/../common/sim-config.c $(sim-config_h) $(sim-nconfig_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-config.c: $(srcdir)/../common/sim-config.c $(CC) -c $(srcdir)/../common/sim-config.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-core.o: sim-core.c $(sim-core_h) $(sim-n-core_h) \ sim-core.o: $(srcdir)/../common/sim-core.c $(sim-core_h) $(sim-n-core_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-core.c: $(srcdir)/../common/sim-core.c $(CC) -c $(srcdir)/../common/sim-core.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-endian.o: sim-endian.c $(sim-endian_h) $(sim-n-endian_h) $(sim-assert_h) \ sim-endian.o: $(srcdir)/../common/sim-endian.c $(sim-endian_h) $(sim-n-endian_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-endian.c: $(srcdir)/../common/sim-endian.c $(CC) -c $(srcdir)/../common/sim-endian.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-engine.o: sim-engine.c $(sim_main_headers) $(sim-engine_h) $(sim-assert_h) \ sim-engine.o: $(srcdir)/../common/sim-engine.c $(sim_main_headers) $(sim-engine_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-engine.c: $(srcdir)/../common/sim-engine.c $(CC) -c $(srcdir)/../common/sim-engine.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-events.o: sim-events.c $(sim-events_h) $(sim-assert_h) \ sim-events.o: $(srcdir)/../common/sim-events.c $(sim-events_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-events.c: $(srcdir)/../common/sim-events.c $(CC) -c $(srcdir)/../common/sim-events.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-fpu.o: sim-fpu.c $(sim-fpu_h) $(sim-assert_h) \ sim-fpu.o: $(srcdir)/../common/sim-fpu.c $(sim-fpu_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-fpu.c: $(srcdir)/../common/sim-fpu.c $(CC) -c $(srcdir)/../common/sim-fpu.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@ sim-hload.o: $(srcdir)/../common/sim-hload.c $(sim-assert_h) \
cat $(srcdir)/../common/$@ >> tmp-$@ $(SIM_EXTRA_DEPS)
$(srcdir)/../../move-if-change tmp-$@ $@ $(CC) -c $(srcdir)/../common/sim-hload.c $(ALL_CFLAGS)
sim-inline.c: $(srcdir)/../common/sim-inline.c sim-inline.c: $(srcdir)/../common/sim-inline.c
rm -f $@ tmp-$@ rm -f $@ tmp-$@
@ -279,13 +254,9 @@ sim-inline.c: $(srcdir)/../common/sim-inline.c
cat $(srcdir)/../common/$@ >> tmp-$@ cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@ $(srcdir)/../../move-if-change tmp-$@ $@
sim-io.o: sim-io.c $(sim_main_headers) $(sim-io_h) $(sim-assert_h) \ sim-io.o: $(srcdir)/../common/sim-io.c $(sim_main_headers) $(sim-io_h) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-io.c: $(srcdir)/../common/sim-io.c $(CC) -c $(srcdir)/../common/sim-io.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-module.o: $(srcdir)/../common/sim-module.c $(sim_main_headers) \ sim-module.o: $(srcdir)/../common/sim-module.c $(sim_main_headers) \
$(sim-io_h) $(SIM_EXTRA_DEPS) $(sim-io_h) $(SIM_EXTRA_DEPS)
@ -295,37 +266,21 @@ sim-options.o: $(srcdir)/../common/sim-options.c $(sim_main_headers) \
$(sim-options_h) $(sim-io_h) $(SIM_EXTRA_DEPS) $(sim-options_h) $(sim-io_h) $(SIM_EXTRA_DEPS)
$(CC) -c $(srcdir)/../common/sim-options.c $(ALL_CFLAGS) $(CC) -c $(srcdir)/../common/sim-options.c $(ALL_CFLAGS)
sim-reason.o: sim-reason.c $(sim_main_headers) $(sim-assert_h) \ sim-reason.o: $(srcdir)/../common/sim-reason.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-reason.c: $(srcdir)/../common/sim-reason.c $(CC) -c $(srcdir)/../common/sim-reason.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-resume.o: sim-resume.c $(sim_main_headers) $(sim-assert_h) \ sim-resume.o: $(srcdir)/../common/sim-resume.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-resume.c: $(srcdir)/../common/sim-resume.c $(CC) -c $(srcdir)/../common/sim-resume.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-run.o: sim-run.c $(sim_main_headers) $(sim-assert_h) \ sim-run.o: $(srcdir)/../common/sim-run.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-run.c: $(srcdir)/../common/sim-run.c $(CC) -c $(srcdir)/../common/sim-run.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-stop.o: sim-stop.c $(sim_main_headers) $(sim-assert_h) \ sim-stop.o: $(srcdir)/../common/sim-stop.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
sim-stop.c: $(srcdir)/../common/sim-stop.c $(CC) -c $(srcdir)/../common/sim-stop.c $(ALL_CFLAGS)
rm -f $@ tmp-$@
echo "# 1 \"$(srcdir)/../common/$@\"" > tmp-$@
cat $(srcdir)/../common/$@ >> tmp-$@
$(srcdir)/../../move-if-change tmp-$@ $@
sim-trace.o: $(srcdir)/../common/sim-trace.c $(sim_main_headers) \ sim-trace.o: $(srcdir)/../common/sim-trace.c $(sim_main_headers) \
$(sim-options_h) $(sim-io_h) $(SIM_EXTRA_DEPS) $(sim-options_h) $(sim-io_h) $(SIM_EXTRA_DEPS)
@ -343,6 +298,10 @@ sim-utils.o: $(srcdir)/../common/sim-utils.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS) $(SIM_EXTRA_DEPS)
$(CC) -c $(srcdir)/../common/sim-utils.c $(ALL_CFLAGS) $(CC) -c $(srcdir)/../common/sim-utils.c $(ALL_CFLAGS)
sim-watch.o: $(srcdir)/../common/sim-watch.c $(sim_main_headers) \
$(SIM_EXTRA_DEPS)
$(CC) -c $(srcdir)/../common/sim-watch.c $(ALL_CFLAGS)
sim-load.o: $(srcdir)/../common/sim-load.c sim-load.o: $(srcdir)/../common/sim-load.c
$(CC) -c $(srcdir)/../common/sim-load.c $(ALL_CFLAGS) $(CC) -c $(srcdir)/../common/sim-load.c $(ALL_CFLAGS)

60
sim/common/sim-config.c
View file

@ -132,45 +132,15 @@ config_floating_point_to_a (int floating_point)
SIM_RC SIM_RC
sim_config (SIM_DESC sd, sim_config (SIM_DESC sd)
struct _bfd *abfd)
{ {
int prefered_target_byte_order; int prefered_target_byte_order;
/* clone the bfd struct (or open prog_name directly) */
{
const char *prog_name;
if (STATE_PROG_ARGV (sd) == NULL)
{
if (abfd != NULL)
prog_name = bfd_get_filename (abfd);
else
prog_name = NULL;
}
else
prog_name = *STATE_PROG_ARGV (sd);
if (prog_name != NULL)
{
abfd = bfd_openr (prog_name, 0);
if (abfd == NULL)
{
sim_io_eprintf (sd, "%s: can't open \"%s\": %s\n",
STATE_MY_NAME (sd),
prog_name,
bfd_errmsg (bfd_get_error ()));
return SIM_RC_FAIL;
}
STATE_PROG_BFD (sd) = abfd;
}
else
STATE_PROG_BFD (sd) = NULL;
}
/* extract all relevant information */ /* extract all relevant information */
if (abfd == NULL) if (STATE_PROG_BFD (sd) == NULL)
prefered_target_byte_order = 0; prefered_target_byte_order = 0;
else else
prefered_target_byte_order = (bfd_little_endian(abfd) prefered_target_byte_order = (bfd_little_endian(STATE_PROG_BFD (sd))
? LITTLE_ENDIAN ? LITTLE_ENDIAN
: BIG_ENDIAN); : BIG_ENDIAN);
@ -210,16 +180,16 @@ sim_config (SIM_DESC sd,
/* verify the target byte order */ /* verify the target byte order */
if (CURRENT_TARGET_BYTE_ORDER == 0) if (CURRENT_TARGET_BYTE_ORDER == 0)
{ {
sim_io_eprintf (sd, "target byte order unspecified"); sim_io_eprintf (sd, "Target byte order unspecified\n");
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order) if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
sim_io_eprintf (sd, "target (%s) and configured (%s) byte order in conflict", sim_io_eprintf (sd, "Target (%s) and configured (%s) byte order in conflict\n",
config_byte_order_to_a (current_target_byte_order), config_byte_order_to_a (current_target_byte_order),
config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER)); config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER));
if (prefered_target_byte_order != 0 if (prefered_target_byte_order != 0
&& CURRENT_TARGET_BYTE_ORDER != prefered_target_byte_order) && CURRENT_TARGET_BYTE_ORDER != prefered_target_byte_order)
sim_io_eprintf (sd, "target (%s) and specified (%s) byte order in conflict", sim_io_eprintf (sd, "Target (%s) and specified (%s) byte order in conflict\n",
config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER), config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER),
config_byte_order_to_a (prefered_target_byte_order)); config_byte_order_to_a (prefered_target_byte_order));
@ -233,12 +203,12 @@ sim_config (SIM_DESC sd,
/* verify the stdio */ /* verify the stdio */
if (CURRENT_STDIO == 0) if (CURRENT_STDIO == 0)
{ {
sim_io_eprintf (sd, "target standard IO unspecified"); sim_io_eprintf (sd, "Target standard IO unspecified\n");
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
if (CURRENT_STDIO != current_stdio) if (CURRENT_STDIO != current_stdio)
{ {
sim_io_eprintf (sd, "target (%s) and configured (%s) standard IO in conflict", sim_io_eprintf (sd, "Target (%s) and configured (%s) standard IO in conflict\n",
config_stdio_to_a (CURRENT_STDIO), config_stdio_to_a (CURRENT_STDIO),
config_stdio_to_a (current_stdio)); config_stdio_to_a (current_stdio));
return SIM_RC_FAIL; return SIM_RC_FAIL;
@ -249,7 +219,7 @@ sim_config (SIM_DESC sd,
if (WITH_TARGET_WORD_MSB != 0 if (WITH_TARGET_WORD_MSB != 0
&& WITH_TARGET_WORD_MSB != (WITH_TARGET_WORD_BITSIZE - 1)) && WITH_TARGET_WORD_MSB != (WITH_TARGET_WORD_BITSIZE - 1))
{ {
sim_io_eprintf (sd, "target bitsize (%d) contradicts target most significant bit (%d)", sim_io_eprintf (sd, "Target bitsize (%d) contradicts target most significant bit (%d)\n",
WITH_TARGET_WORD_BITSIZE, WITH_TARGET_WORD_MSB); WITH_TARGET_WORD_BITSIZE, WITH_TARGET_WORD_MSB);
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
@ -281,12 +251,12 @@ sim_config (SIM_DESC sd,
/* verify the environment */ /* verify the environment */
if (CURRENT_ENVIRONMENT == 0) if (CURRENT_ENVIRONMENT == 0)
{ {
sim_io_eprintf (sd, "target environment unspecified"); sim_io_eprintf (sd, "Target environment unspecified\n");
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
if (CURRENT_ENVIRONMENT != current_environment) if (CURRENT_ENVIRONMENT != current_environment)
{ {
sim_io_eprintf (sd, "target (%s) and configured (%s) environment in conflict", sim_io_eprintf (sd, "Target (%s) and configured (%s) environment in conflict\n",
config_environment_to_a (CURRENT_ENVIRONMENT), config_environment_to_a (CURRENT_ENVIRONMENT),
config_environment_to_a (current_environment)); config_environment_to_a (current_environment));
return SIM_RC_FAIL; return SIM_RC_FAIL;
@ -310,12 +280,12 @@ sim_config (SIM_DESC sd,
/* verify the alignment */ /* verify the alignment */
if (CURRENT_ALIGNMENT == 0) if (CURRENT_ALIGNMENT == 0)
{ {
sim_io_eprintf (sd, "target alignment unspecified"); sim_io_eprintf (sd, "Target alignment unspecified\n");
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
if (CURRENT_ALIGNMENT != current_alignment) if (CURRENT_ALIGNMENT != current_alignment)
{ {
sim_io_eprintf (sd, "target (%s) and configured (%s) alignment in conflict", sim_io_eprintf (sd, "Target (%s) and configured (%s) alignment in conflict\n",
config_alignment_to_a (CURRENT_ALIGNMENT), config_alignment_to_a (CURRENT_ALIGNMENT),
config_alignment_to_a (current_alignment)); config_alignment_to_a (current_alignment));
return SIM_RC_FAIL; return SIM_RC_FAIL;
@ -332,12 +302,12 @@ sim_config (SIM_DESC sd,
/* verify the floating point */ /* verify the floating point */
if (CURRENT_FLOATING_POINT == 0) if (CURRENT_FLOATING_POINT == 0)
{ {
sim_io_eprintf (sd, "target floating-point unspecified"); sim_io_eprintf (sd, "Target floating-point unspecified\n");
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
if (CURRENT_FLOATING_POINT != current_floating_point) if (CURRENT_FLOATING_POINT != current_floating_point)
{ {
sim_io_eprintf (sd, "target (%s) and configured (%s) floating-point in conflict", sim_io_eprintf (sd, "Target (%s) and configured (%s) floating-point in conflict\n",
config_alignment_to_a (CURRENT_FLOATING_POINT), config_alignment_to_a (CURRENT_FLOATING_POINT),
config_alignment_to_a (current_floating_point)); config_alignment_to_a (current_floating_point));
return SIM_RC_FAIL; return SIM_RC_FAIL;

3
sim/common/sim-config.h
View file

@ -546,8 +546,7 @@ extern int current_stdio;
/* complete/verify/print the simulator configuration */ /* complete/verify/print the simulator configuration */
extern SIM_RC sim_config extern SIM_RC sim_config
(SIM_DESC sd, (SIM_DESC sd);
struct _bfd *abfd);
extern void print_sim_config (SIM_DESC sd); extern void print_sim_config (SIM_DESC sd);

52
sim/common/sim-utils.c
View file

@ -119,9 +119,7 @@ char **
sim_copy_argv (argv) sim_copy_argv (argv)
char **argv; char **argv;
{ {
int i;
int argc; int argc;
int len;
char **copy; char **copy;
if (argv == NULL) if (argv == NULL)
@ -149,16 +147,56 @@ sim_copy_argv (argv)
return copy; return copy;
} }
/* Analyze a bfd and set various fields in the state struct. */ /* Analyze a prog_name/prog_bfd and set various fields in the state
struct. */
void SIM_RC
sim_analyze_program (sd, prog_bfd) sim_analyze_program (sd, prog_name, prog_bfd)
SIM_DESC sd; SIM_DESC sd;
char *prog_name;
bfd *prog_bfd; bfd *prog_bfd;
{ {
asection *s; asection *s;
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
if (prog_bfd != NULL)
{
if (prog_bfd == STATE_PROG_BFD (sd))
/* already analyzed */
return SIM_RC_OK;
else
/* duplicate needed, save the name of the file to be re-opened */
prog_name = bfd_get_filename (prog_bfd);
}
/* do we need to duplicate anything? */
if (prog_name == NULL)
return SIM_RC_OK;
/* open a new copy of the prog_bfd */
prog_bfd = bfd_openr (prog_name, 0);
if (prog_bfd == NULL)
{
sim_io_eprintf (sd, "%s: can't open \"%s\": %s\n",
STATE_MY_NAME (sd),
prog_name,
bfd_errmsg (bfd_get_error ()));
return SIM_RC_FAIL;
}
if (!bfd_check_format (prog_bfd, bfd_object))
{
sim_io_eprintf (sd, "%s: \"%s\" is not an object file: %s\n",
STATE_MY_NAME (sd),
prog_name,
bfd_errmsg (bfd_get_error ()));
bfd_close (prog_bfd);
return SIM_RC_FAIL;
}
/* update the sim structure */
if (STATE_PROG_BFD (sd) != NULL)
bfd_close (STATE_PROG_BFD (sd));
STATE_PROG_BFD (sd) = prog_bfd; STATE_PROG_BFD (sd) = prog_bfd;
STATE_START_ADDR (sd) = bfd_get_start_address (prog_bfd); STATE_START_ADDR (sd) = bfd_get_start_address (prog_bfd);
@ -170,6 +208,8 @@ sim_analyze_program (sd, prog_bfd)
STATE_TEXT_END (sd) = STATE_TEXT_START (sd) + bfd_section_size (prog_bfd, s); STATE_TEXT_END (sd) = STATE_TEXT_START (sd) + bfd_section_size (prog_bfd, s);
break; break;
} }
return SIM_RC_OK;
} }
/* Simulator timing support. */ /* Simulator timing support. */

70
sim/common/sim-utils.h Normal file
View file

@ -0,0 +1,70 @@
/* Miscellaneous simulator utilities.
Copyright (C) 1997 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef SIM_UTILS_H
#define SIM_UTILS_H
/* Memory management with an allocator that clears memory before use. */
void *zalloc (unsigned long size);
#define ZALLOC(TYPE) (TYPE*)zalloc(sizeof (TYPE))
void zfree(void*);
/* Turn VALUE into a string with commas. */
char *sim_add_commas (char *, int, unsigned long);
/* Utilities for elapsed time reporting. */
/* Opaque type, known only inside sim_elapsed_time_foo fns. */
typedef unsigned long SIM_ELAPSED_TIME;
/* Get reference point for future call to sim_time_elapsed. */
SIM_ELAPSED_TIME sim_elapsed_time_get (void);
/* Elapsed time in milliseconds since START. */
unsigned long sim_elapsed_time_since (SIM_ELAPSED_TIME start);
/* Utilities for manipulating the load image. */
SIM_RC sim_analyze_program (SIM_DESC sd, char *prog_name,
struct _bfd *prog_bfd);
char **sim_copy_argv (char **argv);
/* Load program PROG into the simulator.
If PROG_BFD is non-NULL, the file has already been opened.
If VERBOSE_P is non-zero statistics are printed of each loaded section
and the transfer rate (for consistency with gdb).
If this fails an error message is printed and NULL is returned.
If it succeeds the bfd is returned. */
struct _bfd *sim_load_file (SIM_DESC sd, const char *myname,
host_callback *callback, char *prog,
struct _bfd *prog_bfd, int verbose_p);
/* These are defined in callback.c as cover functions to the vprintf
callbacks. */
void sim_cb_printf (host_callback *, const char *, ...);
void sim_cb_eprintf (host_callback *, const char *, ...);
#endif

4
sim/d10v/ChangeLog
View file

@ -1,6 +1,10 @@
Tue Aug 26 10:37:49 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:37:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
(start_address): Delete variable.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

18
sim/d10v/interp.c
View file

@ -14,7 +14,6 @@ enum _leftright { LEFT_FIRST, RIGHT_FIRST };
static char *myname; static char *myname;
static SIM_OPEN_KIND sim_kind; static SIM_OPEN_KIND sim_kind;
static bfd_vma start_address;
int d10v_debug; int d10v_debug;
host_callback *d10v_callback; host_callback *d10v_callback;
unsigned long ins_type_counters[ (int)INS_MAX ]; unsigned long ins_type_counters[ (int)INS_MAX ];
@ -797,20 +796,26 @@ sim_info (sd, verbose)
} }
SIM_RC SIM_RC
sim_create_inferior (sd, argv, env) sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
#ifdef DEBUG bfd_vma start_address;
if (d10v_debug)
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%x\n", start_address);
#endif
/* reset all state information */ /* reset all state information */
memset (&State.regs, 0, (int)&State.imem - (int)&State.regs[0]); memset (&State.regs, 0, (int)&State.imem - (int)&State.regs[0]);
/* set PC */ /* set PC */
if (abfd != NULL)
start_address = bfd_get_start_address (prog_bfd);
else
start_address = 0xffc0 << 2;
#ifdef DEBUG
if (d10v_debug)
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
#endif
PC = start_address >> 2; PC = start_address >> 2;
/* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */ /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
@ -924,7 +929,6 @@ sim_load (sd, prog, abfd, from_tty)
sim_kind == SIM_OPEN_DEBUG); sim_kind == SIM_OPEN_DEBUG);
if (prog_bfd == NULL) if (prog_bfd == NULL)
return SIM_RC_FAIL; return SIM_RC_FAIL;
start_address = bfd_get_start_address (prog_bfd);
prog_bfd_was_opened_p = abfd == NULL; prog_bfd_was_opened_p = abfd == NULL;
return SIM_RC_OK; return SIM_RC_OK;
} }

6
sim/erc32/ChangeLog
View file

@ -1,6 +1,12 @@
Tue Aug 26 10:38:20 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:38:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* float.c (__setfpucw): Compile on any i386 target. Not just NT.
* interf.c (sim_kill): Delete. * interf.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument. Initialize PC from ABFD
argument.
(sim_load): Don't save start address.
(start_address): Delete variable.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

5
sim/h8300/ChangeLog
View file

@ -1,6 +1,11 @@
Tue Aug 26 10:38:43 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:38:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
* compile.c (sim_kill): Delete. * compile.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
(sim_open, sim_load, set_h8300h): Add fixme explaining why much of
the sim_load code should be moved to sim_open.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

16
sim/h8300/compile.c
View file

@ -2009,6 +2009,9 @@ void
set_h8300h (flag) set_h8300h (flag)
int flag; int flag;
{ {
/* FIXME: Much of the code in sim_load can be moved to sim_open.
This function being replaced by a sim_open:ARGV configuration
option */
h8300hmode = flag; h8300hmode = flag;
} }
@ -2019,6 +2022,8 @@ sim_open (kind, ptr, abfd, argv)
struct _bfd *abfd; struct _bfd *abfd;
char **argv; char **argv;
{ {
/* FIXME: Much of the code in sim_load can be moved here */
sim_kind = kind; sim_kind = kind;
myname = argv[0]; myname = argv[0];
sim_callback = ptr; sim_callback = ptr;
@ -2045,6 +2050,9 @@ sim_load (sd, prog, abfd, from_tty)
{ {
bfd *prog_bfd; bfd *prog_bfd;
/* FIXME: The code below that sets a specific variant of the h8/300
being simulated should be moved to sim_open(). */
/* See if the file is for the h8/300 or h8/300h. */ /* See if the file is for the h8/300 or h8/300h. */
/* ??? This may not be the most efficient way. The z8k simulator /* ??? This may not be the most efficient way. The z8k simulator
does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */ does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */
@ -2109,7 +2117,6 @@ sim_load (sd, prog, abfd, from_tty)
return SIM_RC_FAIL; return SIM_RC_FAIL;
} }
cpu.pc = bfd_get_start_address (prog_bfd);
/* Close the bfd if we opened it. */ /* Close the bfd if we opened it. */
if (abfd == NULL && prog_bfd != NULL) if (abfd == NULL && prog_bfd != NULL)
bfd_close (prog_bfd); bfd_close (prog_bfd);
@ -2117,11 +2124,16 @@ sim_load (sd, prog, abfd, from_tty)
} }
SIM_RC SIM_RC
sim_create_inferior (sd, argv, env) sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
if (abfd != NULL)
cpu.pc = bfd_get_start_address (abfd);
else
cpu.pc = 0;
return SIM_RC_OK; return SIM_RC_OK;
} }

6
sim/m32r/ChangeLog
View file

@ -1,6 +1,12 @@
Tue Aug 26 10:39:42 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:39:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-if.c (sim_kill): Delete. * sim-if.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
(sim_load): Delete, use sim-hload.c instead.
* Makefile.in (SIM_OBJS): Add sim-hload.o module.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

86
sim/m32r/Makefile.in Normal file
View file

@ -0,0 +1,86 @@
# Makefile template for Configure for the m32r simulator
# Copyright (C) 1996, 1997 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of GDB, the GNU debugger.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
## COMMON_PRE_CONFIG_FRAG
SIM_OBJS = sim-if.o m32r.o mainloop.o \
decode.o extract.o semantics.o seman-cache.o model.o \
sim-io.o sim-utils.o sim-load.o sim-abort.o sim-watch.o \
sim-module.o sim-options.o sim-trace.o sim-profile.o sim-model.o \
sim-core.o sim-events.o sim-endian.o sim-bits.o sim-config.o \
sim-hload.o \
cgen-utils.o cgen-trace.o cgen-scache.o
# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
$(srcdir)/../common/cgen-types.h \
$(srcdir)/../common/cgen-sim.h \
$(srcdir)/../common/cgen-trace.h \
arch-defs.h
SIM_ENDIAN = @sim_endian@
SIM_HOSTENDIAN = @sim_hostendian@
SIM_SCACHE = @sim_scache@
SIM_DEFAULT_MODEL = @sim_default_model@
SIM_EXTRA_CFLAGS = \
$(SIM_ENDIAN) $(SIM_HOSTENDIAN) \
$(SIM_SCACHE) $(SIM_DEFAULT_MODEL)
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = m32r-clean
## COMMON_POST_CONFIG_FRAG
CPU = m32r
MAIN_INCLUDE_DEPS = \
sim-main.h \
$(srcdir)/../common/sim-config.h \
$(srcdir)/../common/sim-base.h \
$(srcdir)/../common/sim-basics.h \
$(srcdir)/../common/sim-module.h \
$(srcdir)/../common/sim-trace.h \
$(srcdir)/../common/sim-profile.h \
tconfig.h
INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h
OPS_INCLUDE_DEPS = mem-ops.h sem-ops.h
sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h
m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS)
# FIXME: Use of `mono' is wip.
mainloop.c: $(srcdir)/../common/genmloop.sh mainloop.in
rm -f mainloop.c
$(SHELL) $(srcdir)/../common/genmloop.sh mono $(CPU) $(srcdir)/mainloop.in >mainloop.c
mainloop.o: mainloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) \
$(srcdir)/../common/cgen-scache.h
decode.o: decode.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu-opc.h
extract.o: extract.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS)
semantics.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS)
model.o: model.c $(INCLUDE_DEPS) cpu-opc.h
# wip
#extr-cache.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS)
# $(CC) -c $(srcdir)/extract.c -o extr-cache.o -DSCACHE_P $(ALL_CFLAGS)
seman-cache.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS)
$(CC) -c $(srcdir)/semantics.c -o seman-cache.o -DSCACHE_P $(ALL_CFLAGS)
m32r-clean:
rm -f mainloop.c

30
sim/m32r/sim-if.c
View file

@ -100,31 +100,9 @@ sim_close (sd, quitting)
} }
SIM_RC SIM_RC
sim_load (sd, prog, abfd, from_tty) sim_create_inferior (sd, abfd, argv, envp)
SIM_DESC sd;
char *prog;
bfd *abfd;
int from_tty;
{
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
bfd *prog_bfd;
prog_bfd = sim_load_file (sd, STATE_MY_NAME (sd),
STATE_CALLBACK (sd),
prog,
/* pass NULL for abfd, we always open our own */
NULL,
STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
sim_analyze_program (sd, prog_bfd);
STATE_CPU_CPU (sd, 0)->pc = STATE_START_ADDR (sd);
return SIM_RC_OK;
}
SIM_RC
sim_create_inferior (sd, argv, envp)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **envp; char **envp;
{ {
@ -132,6 +110,10 @@ sim_create_inferior (sd, argv, envp)
STATE_ARGV (sd) = sim_copy_argv (argv); STATE_ARGV (sd) = sim_copy_argv (argv);
STATE_ENVP (sd) = sim_copy_argv (envp); STATE_ENVP (sd) = sim_copy_argv (envp);
#endif #endif
if (abfd != NULL)
STATE_CPU_CPU (sd, 0)->pc = bfd_get_start_address (abfd);
else
STATE_CPU_CPU (sd, 0)->pc = 0;
return SIM_RC_OK; return SIM_RC_OK;
} }

11
sim/mips/ChangeLog
View file

@ -1,6 +1,17 @@
Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Add call to sim_analyze_program, update
call to sim_config.
Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument. Set PC from same.
(sim_load): Move code initializing trap handlers from here.
(sim_open): To here.
(sim_load): Delete, use sim-hload.c.
* Makefile.in (SIM_OBJS): Add sim-hload.o module.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

43
sim/mips/Makefile.in
View file

@ -3,15 +3,52 @@
## COMMON_PRE_CONFIG_FRAG ## COMMON_PRE_CONFIG_FRAG
SIM_OBJS = interp.o srcdir=@srcdir@
srcroot=$(srcdir)/../../
SIM_OBJS = interp.o \
sim-load.o \
sim-utils.o \
sim-hload.o \
sim-io.o \
sim-config.o \
sim-endian.o \
sim-engine.o \
sim-stop.o \
sim-resume.o \
sim-reason.o \
sim-events.o \
sim-module.o \
sim-trace.o \
sim-options.o \
sim-core.o \
sim-watch.o
# List of flags to always pass to $(CC).
SIM_WARNINGS=@sim_warnings@
SIM_ENDIAN=@sim_endian@
SIM_HOSTENDIAN=@sim_hostendian@
SIM_INLINE=@sim_inline@
# FIXME: Hack to find syscall.h? Better support for syscall.h # FIXME: Hack to find syscall.h? Better support for syscall.h
# is in progress. # is in progress.
SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/idt SIM_EXTRA_CFLAGS = \
$(SIM_WARNINGS) \
$(SIM_ENDIAN) \
$(SIM_HOSTENDIAN) \
$(SIM_INLINE) \
-I$(srcdir)/../../newlib/libc/sys/idt
SIM_EXTRA_CLEAN = clean-extra SIM_EXTRA_CLEAN = clean-extra
# List of main object files for `run'.
SIM_RUN_OBJS = nrun.o
## COMMON_POST_CONFIG_FRAG ## COMMON_POST_CONFIG_FRAG
interp.o: interp.c engine.c support.h config.h interp.o: $(srcdir)/interp.c engine.c $(srcdir)/support.h config.h
engine.c: gencode engine.c: gencode
./gencode @SIMCONF@ > $@ ./gencode @SIMCONF@ > $@

197
sim/mips/interp.c
View file

@ -820,9 +820,20 @@ sim_open (kind, cb, abfd, argv)
return 0; return 0;
} }
/* check for/establish the a reference program image */
if (sim_analyze_program (sd,
(STATE_PROG_ARGV (sd) != NULL
? *STATE_PROG_ARGV (sd)
: NULL),
abfd) != SIM_RC_OK)
{
sim_module_uninstall (sd);
return 0;
}
/* Configure/verify the target byte order and other runtime /* Configure/verify the target byte order and other runtime
configuration options */ configuration options */
if (sim_config (sd, abfd) != SIM_RC_OK) if (sim_config (sd) != SIM_RC_OK)
{ {
sim_module_uninstall (sd); sim_module_uninstall (sd);
return 0; return 0;
@ -921,6 +932,82 @@ sim_open (kind, cb, abfd, argv)
open_trace(); open_trace();
#endif /* TRACE */ #endif /* TRACE */
/* Write the monitor trap address handlers into the monitor (eeprom)
address space. This can only be done once the target endianness
has been determined. */
{
unsigned loop;
/* Entry into the IDT monitor is via fixed address vectors, and
not using machine instructions. To avoid clashing with use of
the MIPS TRAP system, we place our own (simulator specific)
"undefined" instructions into the relevant vector slots. */
for (loop = 0; (loop < monitor_size); loop += 4) {
uword64 vaddr = (monitor_base + loop);
uword64 paddr;
int cca;
if (AddressTranslation(vaddr, isDATA, isSTORE, &paddr, &cca, isTARGET, isRAW))
StoreMemory(cca, AccessLength_WORD,
(RSVD_INSTRUCTION | (((loop >> 2) & RSVD_INSTRUCTION_ARG_MASK) << RSVD_INSTRUCTION_ARG_SHIFT)),
0, paddr, vaddr, isRAW);
}
/* The PMON monitor uses the same address space, but rather than
branching into it the address of a routine is loaded. We can
cheat for the moment, and direct the PMON routine to IDT style
instructions within the monitor space. This relies on the IDT
monitor not using the locations from 0xBFC00500 onwards as its
entry points.*/
for (loop = 0; (loop < 24); loop++)
{
uword64 vaddr = (monitor_base + 0x500 + (loop * 4));
uword64 paddr;
int cca;
unsigned int value = ((0x500 - 8) / 8); /* default UNDEFINED reason code */
switch (loop)
{
case 0: /* read */
value = 7;
break;
case 1: /* write */
value = 8;
break;
case 2: /* open */
value = 6;
break;
case 3: /* close */
value = 10;
break;
case 5: /* printf */
value = ((0x500 - 16) / 8); /* not an IDT reason code */
break;
case 8: /* cliexit */
value = 17;
break;
case 11: /* flush_cache */
value = 28;
break;
}
/* FIXME - should monitor_base be SIM_ADDR?? */
value = ((unsigned int)monitor_base + (value * 8));
if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&cca,isTARGET,isRAW))
StoreMemory(cca,AccessLength_WORD,value,0,paddr,vaddr,isRAW);
else
sim_error("Failed to write to monitor space 0x%s",pr_addr(vaddr));
/* The LSI MiniRISC PMON has its vectors at 0x200, not 0x500. */
vaddr -= 0x300;
if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&cca,isTARGET,isRAW))
StoreMemory(cca,AccessLength_WORD,value,0,paddr,vaddr,isRAW);
else
sim_error("Failed to write to monitor space 0x%s",pr_addr(vaddr));
}
}
return sd; return sd;
} }
@ -1308,108 +1395,11 @@ sim_info (sd,verbose)
} }
} }
SIM_RC
sim_load (sd,prog,abfd,from_tty)
SIM_DESC sd;
char *prog;
bfd *abfd;
int from_tty;
{
bfd *prog_bfd;
prog_bfd = sim_load_file (sd,
STATE_MY_NAME (sd),
callback,
prog,
/* pass NULL for abfd, we always open our own */
NULL,
STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
sim_analyze_program (sd, prog_bfd);
/* (re) Write the monitor trap address handlers into the monitor
(eeprom) address space. This can only be done once the target
endianness has been determined. */
{
unsigned loop;
/* Entry into the IDT monitor is via fixed address vectors, and
not using machine instructions. To avoid clashing with use of
the MIPS TRAP system, we place our own (simulator specific)
"undefined" instructions into the relevant vector slots. */
for (loop = 0; (loop < monitor_size); loop += 4) {
uword64 vaddr = (monitor_base + loop);
uword64 paddr;
int cca;
if (AddressTranslation(vaddr, isDATA, isSTORE, &paddr, &cca, isTARGET, isRAW))
StoreMemory(cca, AccessLength_WORD,
(RSVD_INSTRUCTION | (((loop >> 2) & RSVD_INSTRUCTION_ARG_MASK) << RSVD_INSTRUCTION_ARG_SHIFT)),
0, paddr, vaddr, isRAW);
}
/* The PMON monitor uses the same address space, but rather than
branching into it the address of a routine is loaded. We can
cheat for the moment, and direct the PMON routine to IDT style
instructions within the monitor space. This relies on the IDT
monitor not using the locations from 0xBFC00500 onwards as its
entry points.*/
for (loop = 0; (loop < 24); loop++)
{
uword64 vaddr = (monitor_base + 0x500 + (loop * 4));
uword64 paddr;
int cca;
unsigned int value = ((0x500 - 8) / 8); /* default UNDEFINED reason code */
switch (loop)
{
case 0: /* read */
value = 7;
break;
case 1: /* write */
value = 8;
break;
case 2: /* open */
value = 6;
break;
case 3: /* close */
value = 10;
break;
case 5: /* printf */
value = ((0x500 - 16) / 8); /* not an IDT reason code */
break;
case 8: /* cliexit */
value = 17;
break;
case 11: /* flush_cache */
value = 28;
break;
}
/* FIXME - should monitor_base be SIM_ADDR?? */
value = ((unsigned int)monitor_base + (value * 8));
if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&cca,isTARGET,isRAW))
StoreMemory(cca,AccessLength_WORD,value,0,paddr,vaddr,isRAW);
else
sim_error("Failed to write to monitor space 0x%s",pr_addr(vaddr));
/* The LSI MiniRISC PMON has its vectors at 0x200, not 0x500. */
vaddr -= 0x300;
if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&cca,isTARGET,isRAW))
StoreMemory(cca,AccessLength_WORD,value,0,paddr,vaddr,isRAW);
else
sim_error("Failed to write to monitor space 0x%s",pr_addr(vaddr));
}
}
return SIM_RC_OK;
}
SIM_RC SIM_RC
sim_create_inferior (sd, argv,env) sim_create_inferior (sd, abfd, argv,env)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
@ -1426,10 +1416,13 @@ sim_create_inferior (sd, argv,env)
patterns (e.g. simulating ROM monitors). */ patterns (e.g. simulating ROM monitors). */
#if 1 #if 1
PC = (uword64) STATE_START_ADDR(sd); if (abfd != NULL)
PC = (unsigned64) bfd_get_start_address(abfd);
else
PC = 0; /* ???? */
#else #else
/* TODO: Sort this properly. SIM_ADDR may already be a 64bit value: */ /* TODO: Sort this properly. SIM_ADDR may already be a 64bit value: */
PC = SIGNEXTEND(bfd_get_start_address(prog_bfd),32); PC = SIGNEXTEND(bfd_get_start_address(abfd),32);
#endif #endif
/* Prepare to execute the program to be simulated */ /* Prepare to execute the program to be simulated */

3
sim/mn10300/ChangeLog
View file

@ -1,6 +1,9 @@
Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

4
sim/ppc/ChangeLog
View file

@ -11,6 +11,10 @@ Wed Aug 27 10:15:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
Tue Aug 26 10:41:35 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:41:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim_calls.c (sim_kill): Delete. * sim_calls.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(entry_point): Delete variable.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 16:17:06 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 16:17:06 1997 Andrew Cagney <cagney@b1.cygnus.com>

19
sim/ppc/sim_calls.c
View file

@ -53,10 +53,6 @@ static device *root_device;
static const char *register_names[] = REGISTER_NAMES; static const char *register_names[] = REGISTER_NAMES;
static host_callback *callbacks; static host_callback *callbacks;
/* For communication between sim_load and sim_create_inferior.
This can be made to go away, please do. */
static unsigned_word entry_point;
SIM_DESC SIM_DESC
sim_open (SIM_OPEN_KIND kind, sim_open (SIM_OPEN_KIND kind,
host_callback *callback, host_callback *callback,
@ -114,9 +110,7 @@ sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
psim_init(simulator); psim_init(simulator);
/* get the start address */ /* get the start address */
if (abfd != NULL) if (abfd == NULL)
entry_point = bfd_get_start_address (abfd);
else
{ {
abfd = bfd_openr (argv[0], 0); abfd = bfd_openr (argv[0], 0);
if (abfd == NULL) if (abfd == NULL)
@ -129,7 +123,6 @@ sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
error ("psim: \"%s\" is not an object file: %s\n", error ("psim: \"%s\" is not an object file: %s\n",
argv[0], errmsg); argv[0], errmsg);
} }
entry_point = bfd_get_start_address (abfd);
bfd_close (abfd); bfd_close (abfd);
} }
@ -199,10 +192,18 @@ sim_info (SIM_DESC sd, int verbose)
SIM_RC SIM_RC
sim_create_inferior (SIM_DESC sd, char **argv, char **envp) sim_create_inferior (SIM_DESC sd,
struct _bfd *abfd,
char **argv,
char **envp)
{ {
unsigned_word entry_point;
TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n", TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n",
entry_point)); entry_point));
if (abfd != NULL)
entry_point = bfd_get_start_address (abfd);
else
entry_point = 0xfff00000; /* ??? */
psim_init(simulator); psim_init(simulator);
psim_stack(simulator, argv, envp); psim_stack(simulator, argv, envp);

3
sim/sh/ChangeLog
View file

@ -1,6 +1,9 @@
Tue Aug 26 10:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

8
sim/sh/interp.c
View file

@ -1242,18 +1242,22 @@ sim_load (sd, prog, abfd, from_tty)
sim_kind == SIM_OPEN_DEBUG); sim_kind == SIM_OPEN_DEBUG);
if (prog_bfd == NULL) if (prog_bfd == NULL)
return SIM_RC_FAIL; return SIM_RC_FAIL;
saved_state.asregs.pc = bfd_get_start_address (prog_bfd);
if (abfd == NULL) if (abfd == NULL)
bfd_close (prog_bfd); bfd_close (prog_bfd);
return SIM_RC_OK; return SIM_RC_OK;
} }
SIM_RC SIM_RC
sim_create_inferior (sd, argv, env) sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
if (abfd != NULL)
saved_state.asregs.pc = bfd_get_start_address (abfd);
else
saved_state.asregs.pc = 0;
return SIM_RC_OK; return SIM_RC_OK;
} }

10
sim/tic80/ChangeLog
View file

@ -1,6 +1,14 @@
Tue Aug 26 10:42:13 1997 Andrew Cagney <cagney@b1.cygnus.com> Wed Aug 27 13:41:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-calls.c (sim_open): Add call to sim_analyze_program, update
call to sim_config.
* sim-calls.c (sim_kill): Delete. * sim-calls.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument. Initialize PC from ABFD
and not SD.
(sim_load): Delete, use sim-hload.c.
* Makefile.in (SIM_OBJS): Add sim-hload.o module.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

1
sim/tic80/Makefile.in
View file

@ -15,6 +15,7 @@ SIM_OBJS = sim-endian.o sim-bits.o sim-config.o \
sim-calls.o \ sim-calls.o \
sim-events.o \ sim-events.o \
sim-core.o \ sim-core.o \
sim-hload.o \
sim-io.o \ sim-io.o \
sim-utils.o \ sim-utils.o \
sim-load.o \ sim-load.o \

41
sim/tic80/sim-calls.c
View file

@ -74,8 +74,19 @@ sim_open (SIM_OPEN_KIND kind,
return 0; return 0;
} }
/* establish the simulator configuration */ /* check for/establish the a reference program image */
if (sim_config (sd, abfd) != SIM_RC_OK) if (sim_analyze_program (sd,
(STATE_PROG_ARGV (sd) != NULL
? *STATE_PROG_ARGV (sd)
: NULL),
abfd) != SIM_RC_OK)
{
sim_module_uninstall (sd);
return 0;
}
/* establish any remaining configuration options */
if (sim_config (sd) != SIM_RC_OK)
{ {
sim_module_uninstall (sd); sim_module_uninstall (sd);
return 0; return 0;
@ -126,24 +137,6 @@ sim_close (SIM_DESC sd, int quitting)
} }
SIM_RC
sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
{
bfd *prog_bfd;
prog_bfd = sim_load_file (sd, STATE_MY_NAME (sd),
STATE_CALLBACK (sd),
prog,
/* pass NULL for abfd, we always open our own */
NULL,
STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG);
if (prog_bfd == NULL)
return SIM_RC_FAIL;
sim_analyze_program (sd, prog_bfd);
return SIM_RC_OK;
}
int int
sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
{ {
@ -217,11 +210,15 @@ sim_info (SIM_DESC sd, int verbose)
SIM_RC SIM_RC
sim_create_inferior (SIM_DESC sd, sim_create_inferior (SIM_DESC sd,
struct _bfd *abfd,
char **argv, char **argv,
char **envp) char **envp)
{ {
STATE_CPU (sd, 0)->cia.ip = STATE_START_ADDR(sd); if (abfd != NULL)
STATE_CPU (sd, 0)->cia.dp = (STATE_START_ADDR(sd) STATE_CPU (sd, 0)->cia.ip = bfd_get_start_address (abfd);
else
STATE_CPU (sd, 0)->cia.ip = 0;
STATE_CPU (sd, 0)->cia.dp = (STATE_CPU (sd, 0)->cia.ip
+ sizeof (instruction_word)); + sizeof (instruction_word));
STATE_CPU (sd, 0)->cr[IE_CR] |= IE_CR_IE; STATE_CPU (sd, 0)->cr[IE_CR] |= IE_CR_IE;
STATE_CPU (sd, 0)->reg[1] = TIC80_MEM_START + TIC80_MEM_SIZE - 16; STATE_CPU (sd, 0)->reg[1] = TIC80_MEM_START + TIC80_MEM_SIZE - 16;

3
sim/v850/ChangeLog
View file

@ -1,6 +1,9 @@
Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument.
(sim_load): Move setting of PC from here.
(sim_create_inferior): To here.
Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>

8
sim/v850/interp.c
View file

@ -663,11 +663,16 @@ sim_info (sd, verbose)
} }
SIM_RC SIM_RC
sim_create_inferior (sd, argv, env) sim_create_inferior (sd, abfd, argv, env)
SIM_DESC sd; SIM_DESC sd;
struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
if (abfd == NULL)
PC = bfd_get_start_address (prog_bfd);
else
PC = 0; /* ??? */
return SIM_RC_OK; return SIM_RC_OK;
} }
@ -917,7 +922,6 @@ sim_load (sd, prog, abfd, from_tty)
sim_kind == SIM_OPEN_DEBUG); sim_kind == SIM_OPEN_DEBUG);
if (prog_bfd == NULL) if (prog_bfd == NULL)
return SIM_RC_FAIL; return SIM_RC_FAIL;
PC = bfd_get_start_address (prog_bfd);
prog_bfd_was_opened_p = abfd == NULL; prog_bfd_was_opened_p = abfd == NULL;
return SIM_RC_OK; return SIM_RC_OK;
} }

1
sim/w65/ChangeLog
View file

@ -1,6 +1,7 @@
Tue Aug 26 10:43:11 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Aug 26 10:43:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_kill): Delete. * interp.c (sim_kill): Delete.
(sim_create_inferior): Add ABFD argument. Set PC from same.
Mon Aug 25 16:34:33 1997 Andrew Cagney <cagney@b1.cygnus.com> Mon Aug 25 16:34:33 1997 Andrew Cagney <cagney@b1.cygnus.com>

12
sim/w65/interp.c
View file

@ -360,14 +360,18 @@ sim_load (prog, from_tty)
void void
sim_create_inferior (start_address, argv, env) sim_create_inferior (abfd, argv, env)
SIM_ADDR start_address; struct _bfd *abfd;
char **argv; char **argv;
char **env; char **env;
{ {
/* ??? We assume this is a 4 byte quantity. */ SIM_ADDR start_address;
int pc; int pc;
if (abfd != NULL)
start_address = bfd_get_start_address (abfd);
else
start_address = 0; /*??*/
/* ??? We assume this is a 4 byte quantity. */
pc = start_address; pc = start_address;
sim_store_register (16, (unsigned char *) &pc); sim_store_register (16, (unsigned char *) &pc);
} }