PowerPC64 undefined weak visibility vs GOT optimisation

Undefined weak symbols with non-default visibility are seen as local
by SYMBOL_REFERENCES_LOCAL.  This stops a got indirect to relative
optimisation for them, so that pies and dlls don't get non-zero values
when loading somewhere other than the address they are linked at
(which always happens).  The optimisation could be allowed for pdes,
but I thought it best not to allow it there too.

bfd/
	* elf64-ppc.c (ppc64_elf_relocate_section): Don't optimise got
	indirect to pc-relative or toc-relative for undefined symbols.
ld/
	* testsuite/ld-powerpc/weak1.d,
	* testsuite/ld-powerpc/weak1.r,
	* testsuite/ld-powerpc/weak1.s,
	* testsuite/ld-powerpc/weak1so.d,
	* testsuite/ld-powerpc/weak1so.r: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
This commit is contained in:
Alan Modra 2021-03-02 21:22:31 +10:30
parent ec11fcffc0
commit f5b9c288a3
9 changed files with 115 additions and 0 deletions

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@ -1,3 +1,8 @@
2021-03-02 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (ppc64_elf_relocate_section): Don't optimise got
indirect to pc-relative or toc-relative for undefined symbols.
2021-03-01 Alan Modra <amodra@gmail.com>
Fangrui Song <maskray@google.com>

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@ -16081,6 +16081,9 @@ ppc64_elf_relocate_section (bfd *output_bfd,
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x8000 < 0x10000
&& sec != NULL
&& sec->output_section != NULL
&& !discarded_section (sec)
&& (h == NULL || SYMBOL_REFERENCES_LOCAL (info, &h->elf)))
{
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
@ -16101,6 +16104,9 @@ ppc64_elf_relocate_section (bfd *output_bfd,
break;
from = TOCstart + htab->sec_info[input_section->id].toc_off;
if (relocation + addend - from + 0x80008000ULL < 0x100000000ULL
&& sec != NULL
&& sec->output_section != NULL
&& !discarded_section (sec)
&& (h == NULL || SYMBOL_REFERENCES_LOCAL (info, &h->elf)))
{
insn = bfd_get_32 (input_bfd, contents + (rel->r_offset & ~3));
@ -16129,6 +16135,9 @@ ppc64_elf_relocate_section (bfd *output_bfd,
+ input_section->output_section->vma
+ input_section->output_offset);
if (!(relocation - from + (1ULL << 33) < 1ULL << 34
&& sec != NULL
&& sec->output_section != NULL
&& !discarded_section (sec)
&& (h == NULL || SYMBOL_REFERENCES_LOCAL (info, &h->elf))))
break;

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@ -1,3 +1,12 @@
2021-03-02 Alan Modra <amodra@gmail.com>
* testsuite/ld-powerpc/weak1.d,
* testsuite/ld-powerpc/weak1.r,
* testsuite/ld-powerpc/weak1.s,
* testsuite/ld-powerpc/weak1so.d,
* testsuite/ld-powerpc/weak1so.r: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
2021-03-01 Hannes Domani <ssbssa@sourceware.org>
Nick Clifton <nickc@redhat.com>

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@ -344,6 +344,12 @@ set ppc64elftests {
{"group3" "-melf64ppc -e foo" "" "-a64" {group3.s group2.s group1.s}
{{objdump {-d} group2.d}
{readelf {-s} group3.sym}} "group3"}
{"weak1" "-melf64ppc --hash-style=both" ""
"-a64 -mpower10" {weak1.s}
{{objdump -d weak1.d} {readelf {-srW} weak1.r}} "weak1"}
{"weak1.so" "-shared -melf64ppc --hash-style=both" ""
"-a64 -mpower10" {weak1.s}
{{objdump -d weak1so.d} {readelf {-srW} weak1so.r}} "weak1.so"}
}
set ppceabitests {

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@ -0,0 +1,26 @@
.*: file format .*
Disassembly of section \.text:
.*0c0 <_start>:
.*0c0: (04 10 00 01|01 00 10 04) pld r3,65888
.*0c4: (e4 60 01 60|60 01 60 e4)
.*0c8: (04 10 00 01|01 00 10 04) pld r3,65856
.*0cc: (e4 60 01 40|40 01 60 e4)
.*0d0: (04 10 00 01|01 00 10 04) pld r3,65864
.*0d4: (e4 60 01 48|48 01 60 e4)
.*0d8: (04 10 00 01|01 00 10 04) pld r3,65848
.*0dc: (e4 60 01 38|38 01 60 e4)
.*0e0: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
.*0e4: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
.*0e8: (e8 62 80 18|18 80 62 e8) ld r3,-32744\(r2\)
.*0ec: (e8 62 80 10|10 80 62 e8) ld r3,-32752\(r2\)
.*0f0: (60 00 00 00|00 00 00 60) nop
.*0f4: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
.*0f8: (60 00 00 00|00 00 00 60) nop
.*0fc: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
.*100: (60 00 00 00|00 00 00 60) nop
.*104: (e8 62 80 18|18 80 62 e8) ld r3,-32744\(r2\)
.*108: (60 00 00 00|00 00 00 60) nop
.*10c: (e8 62 80 10|10 80 62 e8) ld r3,-32752\(r2\)

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@ -0,0 +1,5 @@
There are no relocations in this file.
Symbol table '\.symtab' .*
#pass

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@ -0,0 +1,22 @@
.weak x1, x2, x3, x4
.protected x2
.hidden x3
.internal x4
.global _start
_start:
pld 3,x1@got@pcrel
pld 3,x2@got@pcrel
pld 3,x3@got@pcrel
pld 3,x4@got@pcrel
ld 3,x1@got(2)
ld 3,x2@got(2)
ld 3,x3@got(2)
ld 3,x4@got(2)
addis 9,2,x1@got@ha
ld 3,x1@got@l(9)
addis 9,2,x2@got@ha
ld 3,x2@got@l(9)
addis 9,2,x3@got@ha
ld 3,x3@got@l(9)
addis 9,2,x4@got@ha
ld 3,x4@got@l(9)

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@ -0,0 +1,26 @@
.*: file format .*
Disassembly of section \.text:
0+1c0 <_start>:
1c0: (04 10 00 01|01 00 10 04) pld r3,66144
1c4: (e4 60 02 60|60 02 60 e4)
1c8: (04 10 00 01|01 00 10 04) pld r3,66112
1cc: (e4 60 02 40|40 02 60 e4)
1d0: (04 10 00 01|01 00 10 04) pld r3,66120
1d4: (e4 60 02 48|48 02 60 e4)
1d8: (04 10 00 01|01 00 10 04) pld r3,66104
1dc: (e4 60 02 38|38 02 60 e4)
1e0: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
1e4: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
1e8: (e8 62 80 18|18 80 62 e8) ld r3,-32744\(r2\)
1ec: (e8 62 80 10|10 80 62 e8) ld r3,-32752\(r2\)
1f0: (60 00 00 00|00 00 00 60) nop
1f4: (e8 62 80 20|20 80 62 e8) ld r3,-32736\(r2\)
1f8: (60 00 00 00|00 00 00 60) nop
1fc: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
200: (60 00 00 00|00 00 00 60) nop
204: (e8 62 80 18|18 80 62 e8) ld r3,-32744\(r2\)
208: (60 00 00 00|00 00 00 60) nop
20c: (e8 62 80 10|10 80 62 e8) ld r3,-32752\(r2\)

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@ -0,0 +1,7 @@
#...
.* R_PPC64_GLOB_DAT +0+ x1 \+ 0
#...
.* 0+ +0 NOTYPE +WEAK +DEFAULT +UND x1
#...
.* 0+ +0 NOTYPE +WEAK +DEFAULT +UND x1
#pass