Enhance the RX disassembler to detect and report bad instructions.
opcode * rx.h (enum RX_Size): Add RX_Bad_Size entry. opcodes * rx-decode.opc (bwl): Use RX_Bad_Size. (sbwl): Likewise. (ubwl): Likewise. Rename to ubw. (uBWL): Rename to uBW. Replace all references to uBWL with uBW. * rx-decode.c: Regenerate. * rx-dis.c (size_names): Add entry for RX_Bad_Size. (opsize_names): Likewise. (print_insn_rx): Detect and report RX_Bad_Size.
This commit is contained in:
Nick Clifton
parent
bc1f8cdaf4
commit
f04265eceb
6 changed files with 63 additions and 28 deletions
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@ -1,3 +1,7 @@
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2015-09-22 Nick Clifton <nickc@redhat.com>
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* rx.h (enum RX_Size): Add RX_Bad_Size entry.
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2015-09-09 Daniel Santos <daniel.santos@pobox.com>
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* visium.h (gen_reg_table): Make static.
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@ -38,6 +38,8 @@ typedef enum
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RX_SWord,
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RX_3Byte,
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RX_Long,
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RX_Bad_Size,
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RX_MAX_SIZE
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} RX_Size;
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typedef enum
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@ -1,3 +1,15 @@
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2015-09-22 Nick Clifton <nickc@redhat.com>
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* rx-decode.opc (bwl): Use RX_Bad_Size.
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(sbwl): Likewise.
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(ubwl): Likewise. Rename to ubw.
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(uBWL): Rename to uBW.
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Replace all references to uBWL with uBW.
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* rx-decode.c: Regenerate.
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* rx-dis.c (size_names): Add entry for RX_Bad_Size.
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(opsize_names): Likewise.
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(print_insn_rx): Detect and report RX_Bad_Size.
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2015-09-22 Anton Blanchard <anton@samba.org>
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* ppc-opc.c (powerpc_opcodes): Add mfdscr, mfctrl, mtdscr and mtctrl.
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@ -50,7 +50,7 @@ static int bwl[] =
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RX_Byte,
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RX_Word,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int sbwl[] =
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@ -58,15 +58,15 @@ static int sbwl[] =
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RX_SByte,
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RX_SWord,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int ubwl[] =
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static int ubw[] =
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{
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RX_UByte,
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RX_UWord,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size,/* Bogus instructions can have a size field set to 2. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int memex[] =
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@ -132,7 +132,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
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#define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
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#define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
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#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz]
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#define uBW(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubw[sz]
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#define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long;
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#define F(f) store_flags(rx, f)
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@ -4085,7 +4085,7 @@ rx_decode_opcode (unsigned long pc AU,
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}
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SYNTAX("movu%s %1, %0");
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#line 355 "rx-decode.opc"
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ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____;
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ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
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}
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break;
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@ -6171,7 +6171,7 @@ rx_decode_opcode (unsigned long pc AU,
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}
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SYNTAX("movu%s %1, %0");
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#line 352 "rx-decode.opc"
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ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
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ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
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}
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break;
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@ -9887,7 +9887,7 @@ rx_decode_opcode (unsigned long pc AU,
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}
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SYNTAX("movu%s %1, %0");
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#line 358 "rx-decode.opc"
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ID(mov); uBWL (sz); DR(rdst); F_____;
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ID(mov); uBW (sz); DR(rdst); F_____;
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OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
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/*----------------------------------------------------------------------*/
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@ -13586,7 +13586,7 @@ rx_decode_opcode (unsigned long pc AU,
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}
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SYNTAX("movu%s [%1, %2], %0");
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#line 341 "rx-decode.opc"
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ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
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ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
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}
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break;
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@ -49,7 +49,7 @@ static int bwl[] =
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RX_Byte,
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RX_Word,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int sbwl[] =
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@ -57,15 +57,15 @@ static int sbwl[] =
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RX_SByte,
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RX_SWord,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int ubwl[] =
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static int ubw[] =
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{
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RX_UByte,
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RX_UWord,
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RX_Long,
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0 /* Bogus instructions can have a size field set to 3. */
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RX_Bad_Size,/* Bogus instructions can have a size field set to 2. */
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RX_Bad_Size /* Bogus instructions can have a size field set to 3. */
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};
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static int memex[] =
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@ -131,7 +131,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 };
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#define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz]
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#define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz]
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#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz]
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#define uBW(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubw[sz]
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#define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long;
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#define F(f) store_flags(rx, f)
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@ -338,7 +338,7 @@ rx_decode_opcode (unsigned long pc AU,
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ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
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/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
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ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
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ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
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/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
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ID(mov); sBWL (sz); SR(rsrc); F_____;
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@ -349,13 +349,13 @@ rx_decode_opcode (unsigned long pc AU,
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OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
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/** 1011 w dsp a src b dst movu%s %1, %0 */
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ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
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ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
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/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
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ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____;
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ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
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/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
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ID(mov); uBWL (sz); DR(rdst); F_____;
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ID(mov); uBW (sz); DR(rdst); F_____;
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OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
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/*----------------------------------------------------------------------*/
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@ -48,14 +48,14 @@ rx_get_byte (void * vdata)
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return buf[0];
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}
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static char const * size_names[] =
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static char const * size_names[RX_MAX_SIZE] =
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{
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"", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l"
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"", ".b", ".ub", ".b", ".w", ".uw", ".w", ".a", ".l", "<error>"
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};
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static char const * opsize_names[] =
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static char const * opsize_names[RX_MAX_SIZE] =
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{
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"", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l"
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"", ".b", ".b", ".b", ".w", ".w", ".w", ".a", ".l", "<error>"
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};
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static char const * register_names[] =
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@ -64,10 +64,10 @@ static char const * register_names[] =
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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/* control register */
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"psw", "pc", "usp", "fpsw", "", "", "", "wr",
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"bpsw", "bpc", "isp", "fintv", "intb", "", "", "",
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"pbp", "pben", "", "", "", "", "", "",
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"bbpsw", "bbpc", "", "", "", "", "", ""
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"psw", "pc", "usp", "fpsw", NULL, NULL, NULL, NULL,
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"bpsw", "bpc", "isp", "fintv", "intb", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
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};
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static char const * condition_names[] =
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@ -104,6 +104,23 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
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#define PS (dis->stream)
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#define PC(c) PR (PS, "%c", c)
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/* Detect illegal instructions. */
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if (opcode.op[0].size == RX_Bad_Size
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|| register_names [opcode.op[0].reg] == NULL
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|| register_names [opcode.op[1].reg] == NULL
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|| register_names [opcode.op[2].reg] == NULL)
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{
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bfd_byte buf[10];
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int i;
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PR (PS, ".byte ");
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rx_data.dis->read_memory_func (rx_data.pc - rv, buf, rv, rx_data.dis);
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for (i = 0 ; i < rv; i++)
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PR (PS, "0x%02x ", buf[i]);
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return rv;
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}
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for (s = opcode.syntax; *s; s++)
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{
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if (*s != '%')
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