Restore hppa-elf32 to working order.
This commit is contained in:
Alan Modra
parent
63ac3005ce
commit
edd21acadc
13 changed files with 1410 additions and 1315 deletions
599
bfd/libhppa.h
599
bfd/libhppa.h
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@ -21,8 +21,8 @@
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _HPPA_H
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#define _HPPA_H
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#ifndef _LIBHPPA_H
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#define _LIBHPPA_H
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#define BYTES_IN_WORD 4
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#define PA_PAGESIZE 0x1000
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@ -159,224 +159,71 @@ enum hppa_reloc_expr_type_alt
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((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22))
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#define HPPA_R_ADDEND(r, c) \
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(((r) << 22) + ((c) & 0x3fffff))
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#define HPPA_WIDE (0) /* PSW W-bit, need to check! FIXME */
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/* These macros get bit fields using HP's numbering (MSB = 0),
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* but note that "MASK" assumes that the LSB bits are what's
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* wanted.
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*/
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#ifndef GET_FIELD
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#define GET_FIELD(X, FROM, TO) \
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((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
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#endif
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#define GET_BIT(X, WHICH) \
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GET_FIELD (X, WHICH, WHICH)
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#define MASK(SIZE) \
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(~((-1) << SIZE))
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#define CATENATE(X, XSIZE, Y, YSIZE) \
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(((X & MASK (XSIZE)) << YSIZE) | (Y & MASK (YSIZE)))
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#define ELEVEN(X) \
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CATENATE (GET_BIT (X, 10), 1, GET_FIELD (X, 0, 9), 10)
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/* Some functions to manipulate PA instructions. */
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/* NOTE: these use the HP convention that f{0} is the _left_ most
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* bit (MSB) of f; they sometimes have to impose an assumption
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* about the size of a field; and as far as I can tell, most
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* aren't used.
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*/
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#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7)
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/* Declare the functions with the unused attribute to avoid warnings. */
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static INLINE unsigned int sign_extend (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int low_sign_extend (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_3 (unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_6 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_12 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_16 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_16a (unsigned int, unsigned int,
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unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_17 (unsigned int, unsigned int,
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unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_21 (unsigned int)
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__attribute ((__unused__));
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static INLINE unsigned int sign_unext (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int low_sign_unext (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_3 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_12 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_16 (unsigned int, unsigned int, int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_17 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_22 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_21 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE bfd_signed_vma hppa_field_adjust (bfd_signed_vma, bfd_signed_vma,
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enum hppa_reloc_field_selector_type_alt)
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__attribute__ ((__unused__));
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static INLINE int bfd_hppa_insn2fmt (unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int hppa_rebuild_insn (bfd *, unsigned int,
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unsigned int, unsigned int)
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__attribute__ ((__unused__));
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#endif /* gcc 2.7 or higher */
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static INLINE int sign_extend PARAMS ((int, int)) ATTRIBUTE_UNUSED;
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static INLINE int low_sign_extend PARAMS ((int, int)) ATTRIBUTE_UNUSED;
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static INLINE int sign_unext PARAMS ((int, int)) ATTRIBUTE_UNUSED;
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static INLINE int low_sign_unext PARAMS ((int, int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_3 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_12 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_14 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_16 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_17 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_21 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE int re_assemble_22 PARAMS ((int)) ATTRIBUTE_UNUSED;
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static INLINE bfd_signed_vma hppa_field_adjust
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PARAMS ((bfd_vma, bfd_signed_vma,
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enum hppa_reloc_field_selector_type_alt)) ATTRIBUTE_UNUSED;
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static INLINE int bfd_hppa_insn2fmt PARAMS ((bfd *, int)) ATTRIBUTE_UNUSED;
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static INLINE int hppa_rebuild_insn PARAMS ((int, int, int)) ATTRIBUTE_UNUSED;
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/* The *sign_extend and assemble_* functions are used to assemble
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various bitfields taken from an instruction and return the
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resulting immediate value. They correspond to functions by the
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same name in HP's PA-RISC 2.0 Architecture Reference Manual. */
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/* The *sign_extend functions are used to assemble various bitfields
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taken from an instruction and return the resulting immediate
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value. */
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static INLINE unsigned int
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static INLINE int
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sign_extend (x, len)
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unsigned int x, len;
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int x, len;
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{
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unsigned int signbit = (1 << (len - 1));
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unsigned int mask = (signbit << 1) - 1;
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int signbit = (1 << (len - 1));
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int mask = (signbit << 1) - 1;
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return ((x & mask) ^ signbit) - signbit;
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}
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static INLINE unsigned int
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static INLINE int
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low_sign_extend (x, len)
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unsigned int x, len;
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int x, len;
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{
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return (x >> 1) - ((x & 1) << (len - 1));
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}
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static INLINE unsigned int
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assemble_3 (x)
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unsigned int x;
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{
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return CATENATE (GET_BIT (x, 2), 1, GET_FIELD (x, 0, 1), 2);
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}
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static INLINE unsigned int
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assemble_6 (x, y)
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unsigned int x, y;
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{
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return (((x & 1) << 5) + (32 - (y & 0x1f)));
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}
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/* The re_assemble_* functions prepare an immediate value for
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insertion into an opcode. pa-risc uses all sorts of weird bitfields
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in the instruction to hold the value. */
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static INLINE unsigned int
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assemble_12 (x, y)
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unsigned int x, y;
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{
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return CATENATE (CATENATE (y, 1, GET_BIT (x, 10), 1), 2,
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GET_FIELD (x, 0, 9), 9);
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}
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static INLINE unsigned int
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assemble_16 (x, y)
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unsigned int x, y;
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{
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/* Depends on PSW W-bit !*/
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unsigned int temp;
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if (HPPA_WIDE)
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temp = CATENATE (CATENATE (GET_BIT (y, 13), 1,
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(GET_BIT (y, 13) ^ GET_BIT (x, 0)), 1), 2,
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CATENATE ((GET_BIT (y, 13) ^ GET_BIT (x, 1)), 1,
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GET_FIELD (y, 0, 12), 13), 14);
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else
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temp = CATENATE (CATENATE (GET_BIT (y, 13), 1, GET_BIT (y, 13), 1), 2,
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CATENATE (GET_BIT (y, 13), 1, GET_FIELD (y, 0, 12), 13), 14);
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return sign_extend (temp, 16);
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}
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static INLINE unsigned int
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assemble_16a (x, y, z)
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unsigned int x, y, z;
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{
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/* Depends on PSW W-bit !*/
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unsigned int temp;
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if (HPPA_WIDE)
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temp = CATENATE (CATENATE (z, 1, (z ^ GET_BIT (x, 0)), 1), 2,
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CATENATE ((z ^ GET_BIT (x, 1)), 1, y, 11), 12);
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else
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temp = CATENATE (CATENATE (z, 1, z, 1), 2, CATENATE (z, 1, y, 11), 12);
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return sign_extend ((temp << 2), 16);
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}
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static INLINE unsigned int
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assemble_17 (x, y, z)
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unsigned int x, y, z;
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{
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unsigned int temp;
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temp = CATENATE (CATENATE (z, 1, x, 5), 6,
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CATENATE (GET_BIT (y, 10), 1, GET_FIELD (y, 0, 9), 10), 11);
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return temp;
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}
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static INLINE unsigned int
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assemble_21 (x)
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unsigned int x;
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{
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unsigned int temp;
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temp = (( (x & 0x000001) << 20)
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| ((x & 0x000ffe) << 8)
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| ((x & 0x003000) >> 12)
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| ((x & 0x00c000) >> 7)
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| ((x & 0x1f0000) >> 14));
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return temp;
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}
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static INLINE unsigned int
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assemble_22 (a,b,c,d)
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unsigned int a,b,c,d;
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{
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unsigned int temp;
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temp = CATENATE (CATENATE (d, 1, a, 5), 6,
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CATENATE (b, 5, ELEVEN (c), 11), 16);
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return sign_extend (temp, 22);
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}
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/* The re_assemble_* functions splice together an opcode and an
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immediate value. pa-risc uses all sorts of weird bitfields in the
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instruction to hold the value. */
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static INLINE unsigned int
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static INLINE int
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sign_unext (x, len)
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unsigned int x, len;
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int x, len;
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{
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unsigned int len_ones;
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int len_ones;
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len_ones = ((unsigned int) 1 << len) - 1;
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len_ones = (1 << len) - 1;
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return x & len_ones;
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}
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static INLINE unsigned int
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static INLINE int
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low_sign_unext (x, len)
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unsigned int x, len;
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int x, len;
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{
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unsigned int temp;
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unsigned int sign;
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int temp;
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int sign;
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sign = (x >> (len-1)) & 1;
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@ -385,83 +232,69 @@ low_sign_unext (x, len)
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return (temp << 1) | sign;
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}
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static INLINE unsigned int
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re_assemble_3 (insn, as3)
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unsigned int insn;
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unsigned int as3;
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static INLINE int
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re_assemble_3 (as3)
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int as3;
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{
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return (insn
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| ((as3 & 4) << (13-2))
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return (( (as3 & 4) << (13-2))
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| ((as3 & 3) << (13+1)));
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}
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static INLINE unsigned int
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re_assemble_12 (insn, as12)
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unsigned int insn;
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unsigned int as12;
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static INLINE int
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re_assemble_12 (as12)
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int as12;
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{
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return (insn
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| ((as12 & 0x800) >> 11)
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return (( (as12 & 0x800) >> 11)
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| ((as12 & 0x400) >> (10 - 2))
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| ((as12 & 0x3ff) << (1 + 2)));
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}
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static INLINE unsigned int
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re_assemble_16 (insn, as16, wide)
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unsigned int insn;
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unsigned int as16;
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int wide;
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static INLINE int
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re_assemble_14 (as14)
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int as14;
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{
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unsigned int s, t;
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if (wide)
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{
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/* Unusual 16-bit encoding. */
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t = (as16 << 1) & 0xffff;
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s = (as16 & 0x8000);
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return insn | (t ^ s ^ (s >> 1)) | (s >> 15);
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}
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else
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{
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/* Standard 14-bit encoding. */
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t = (as16 << 1) & 0x3fff;
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s = (as16 & 0x2000);
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return insn | t | (s >> 13);
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}
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return (( (as14 & 0x1fff) << 1)
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| ((as14 & 0x2000) >> 13));
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}
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static INLINE unsigned int
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re_assemble_17 (insn, as17)
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unsigned int insn;
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unsigned int as17;
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static INLINE int
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re_assemble_16 (as16)
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int as16;
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{
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return (insn
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| ((as17 & 0x10000) >> 16)
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int s, t;
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/* Unusual 16-bit encoding, for wide mode only. */
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t = (as16 << 1) & 0xffff;
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s = (as16 & 0x8000);
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return (t ^ s ^ (s >> 1)) | (s >> 15);
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}
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static INLINE int
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re_assemble_17 (as17)
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int as17;
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{
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return (( (as17 & 0x10000) >> 16)
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| ((as17 & 0x0f800) << (16 - 11))
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| ((as17 & 0x00400) >> (10 - 2))
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| ((as17 & 0x003ff) << (1 + 2)));
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}
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static INLINE unsigned int
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re_assemble_21 (insn, as21)
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unsigned int insn;
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unsigned int as21;
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static INLINE int
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re_assemble_21 (as21)
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int as21;
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{
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return (insn
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| ((as21 & 0x100000) >> 20)
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return (( (as21 & 0x100000) >> 20)
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| ((as21 & 0x0ffe00) >> 8)
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| ((as21 & 0x000180) << 7)
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| ((as21 & 0x00007c) << 14)
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| ((as21 & 0x000003) << 12));
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}
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static INLINE unsigned int
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re_assemble_22 (insn, as22)
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unsigned int insn;
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unsigned int as22;
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static INLINE int
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re_assemble_22 (as22)
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int as22;
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{
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return (insn
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| ((as22 & 0x200000) >> 21)
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return (( (as22 & 0x200000) >> 21)
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| ((as22 & 0x1f0000) << (21 - 16))
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| ((as22 & 0x00f800) << (16 - 11))
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| ((as22 & 0x000400) >> (10 - 2))
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@ -481,7 +314,7 @@ re_assemble_22 (insn, as22)
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static INLINE bfd_signed_vma
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hppa_field_adjust (sym_val, addend, r_field)
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bfd_signed_vma sym_val;
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bfd_vma sym_val;
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bfd_signed_vma addend;
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enum hppa_reloc_field_selector_type_alt r_field;
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{
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@ -491,10 +324,18 @@ hppa_field_adjust (sym_val, addend, r_field)
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switch (r_field)
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{
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case e_fsel:
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case e_nsel:
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/* F: No change. */
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break;
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case e_nsel:
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/* N: null selector. I don't really understand what this is all
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about, but HP's documentation says "this indicates that zero
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bits are to be used for the displacement on the instruction.
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This fixup is used to identify three-instruction sequences to
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access data (for importing shared library data)." */
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value = 0;
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break;
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case e_lsel:
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case e_nlsel:
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/* L: Select top 21 bits. */
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@ -558,123 +399,158 @@ hppa_field_adjust (sym_val, addend, r_field)
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/* PA-RISC OPCODES */
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#define get_opcode(insn) (((insn) >> 26) & 0x3f)
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/* FIXME: this list is incomplete. It should also be an enumerated
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type rather than #defines. */
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enum hppa_opcode_type
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{
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/* None of the opcodes in the first group generate relocs, so we
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aren't too concerned about them. */
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OP_SYSOP = 0x00,
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OP_MEMMNG = 0x01,
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OP_ALU = 0x02,
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OP_NDXMEM = 0x03,
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OP_SPOP = 0x04,
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OP_DIAG = 0x05,
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OP_FMPYADD = 0x06,
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OP_UNDEF07 = 0x07,
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OP_COPRW = 0x09,
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OP_COPRDW = 0x0b,
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OP_COPR = 0x0c,
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OP_FLOAT = 0x0e,
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OP_PRDSPEC = 0x0f,
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OP_UNDEF15 = 0x15,
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OP_UNDEF1d = 0x1d,
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OP_FMPYSUB = 0x26,
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OP_FPFUSED = 0x2e,
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OP_SHEXDP0 = 0x34,
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OP_SHEXDP1 = 0x35,
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OP_SHEXDP2 = 0x36,
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OP_UNDEF37 = 0x37,
|
||||
OP_SHEXDP3 = 0x3c,
|
||||
OP_SHEXDP4 = 0x3d,
|
||||
OP_MULTMED = 0x3e,
|
||||
OP_UNDEF3f = 0x3f,
|
||||
|
||||
#define LDO 0x0d
|
||||
#define LDB 0x10
|
||||
#define LDH 0x11
|
||||
#define LDW 0x12
|
||||
#define LDWM 0x13
|
||||
#define STB 0x18
|
||||
#define STH 0x19
|
||||
#define STW 0x1a
|
||||
#define STWM 0x1b
|
||||
#define COMICLR 0x24
|
||||
#define SUBI 0x25
|
||||
#define SUBIO 0x25
|
||||
#define ADDIT 0x2c
|
||||
#define ADDITO 0x2c
|
||||
#define ADDI 0x2d
|
||||
#define ADDIO 0x2d
|
||||
#define LDIL 0x08
|
||||
#define ADDIL 0x0a
|
||||
OP_LDIL = 0x08,
|
||||
OP_ADDIL = 0x0a,
|
||||
|
||||
#define MOVB 0x32
|
||||
#define MOVIB 0x33
|
||||
#define COMBT 0x20
|
||||
#define COMBF 0x22
|
||||
#define COMIBT 0x21
|
||||
#define COMIBF 0x23
|
||||
#define ADDBT 0x28
|
||||
#define ADDBF 0x2a
|
||||
#define ADDIBT 0x29
|
||||
#define ADDIBF 0x2b
|
||||
#define BVB 0x30
|
||||
#define BB 0x31
|
||||
OP_LDO = 0x0d,
|
||||
OP_LDB = 0x10,
|
||||
OP_LDH = 0x11,
|
||||
OP_LDW = 0x12,
|
||||
OP_LDWM = 0x13,
|
||||
OP_STB = 0x18,
|
||||
OP_STH = 0x19,
|
||||
OP_STW = 0x1a,
|
||||
OP_STWM = 0x1b,
|
||||
|
||||
#define BL 0x3a
|
||||
#define BLE 0x39
|
||||
#define BE 0x38
|
||||
OP_LDD = 0x14,
|
||||
OP_STD = 0x1c,
|
||||
|
||||
#define CMPBDT 0x27
|
||||
#define CMPBDF 0x2f
|
||||
#define CMPIBD 0x3b
|
||||
#define LDD 0x14
|
||||
#define STD 0x1c
|
||||
#define LDWL 0x17
|
||||
#define STWL 0x1f
|
||||
#define FLDW 0x16
|
||||
#define FSTW 0x1e
|
||||
OP_FLDW = 0x16,
|
||||
OP_LDWL = 0x17,
|
||||
OP_FSTW = 0x1e,
|
||||
OP_STWL = 0x1f,
|
||||
|
||||
/* Given a machine instruction, return its format.
|
||||
OP_COMBT = 0x20,
|
||||
OP_COMIBT = 0x21,
|
||||
OP_COMBF = 0x22,
|
||||
OP_COMIBF = 0x23,
|
||||
OP_CMPBDT = 0x27,
|
||||
OP_ADDBT = 0x28,
|
||||
OP_ADDIBT = 0x29,
|
||||
OP_ADDBF = 0x2a,
|
||||
OP_ADDIBF = 0x2b,
|
||||
OP_CMPBDF = 0x2f,
|
||||
OP_BVB = 0x30,
|
||||
OP_BB = 0x31,
|
||||
OP_MOVB = 0x32,
|
||||
OP_MOVIB = 0x33,
|
||||
OP_CMPIBD = 0x3b,
|
||||
|
||||
FIXME: opcodes which do not map to a known format
|
||||
should return an error of some sort. */
|
||||
OP_COMICLR = 0x24,
|
||||
OP_SUBI = 0x25,
|
||||
OP_ADDIT = 0x2c,
|
||||
OP_ADDI = 0x2d,
|
||||
|
||||
OP_BE = 0x38,
|
||||
OP_BLE = 0x39,
|
||||
OP_BL = 0x3a
|
||||
};
|
||||
|
||||
|
||||
/* Given a machine instruction, return its format. */
|
||||
|
||||
static INLINE int
|
||||
bfd_hppa_insn2fmt (insn)
|
||||
unsigned int insn;
|
||||
bfd_hppa_insn2fmt (abfd, insn)
|
||||
bfd *abfd;
|
||||
int insn;
|
||||
{
|
||||
unsigned char op = get_opcode (insn);
|
||||
enum hppa_opcode_type op = get_opcode (insn);
|
||||
|
||||
switch (op)
|
||||
{
|
||||
case ADDI:
|
||||
case ADDIT:
|
||||
case SUBI:
|
||||
case OP_COMICLR:
|
||||
case OP_SUBI:
|
||||
case OP_ADDIT:
|
||||
case OP_ADDI:
|
||||
return 11;
|
||||
|
||||
case MOVB:
|
||||
case MOVIB:
|
||||
case COMBT:
|
||||
case COMBF:
|
||||
case COMIBT:
|
||||
case COMIBF:
|
||||
case ADDBT:
|
||||
case ADDBF:
|
||||
case ADDIBT:
|
||||
case ADDIBF:
|
||||
case BVB:
|
||||
case BB:
|
||||
case CMPBDT:
|
||||
case CMPBDF:
|
||||
case CMPIBD:
|
||||
case OP_COMBT:
|
||||
case OP_COMIBT:
|
||||
case OP_COMBF:
|
||||
case OP_COMIBF:
|
||||
case OP_CMPBDT:
|
||||
case OP_ADDBT:
|
||||
case OP_ADDIBT:
|
||||
case OP_ADDBF:
|
||||
case OP_ADDIBF:
|
||||
case OP_CMPBDF:
|
||||
case OP_BVB:
|
||||
case OP_BB:
|
||||
case OP_MOVB:
|
||||
case OP_MOVIB:
|
||||
case OP_CMPIBD:
|
||||
return 12;
|
||||
|
||||
case LDO:
|
||||
case LDB:
|
||||
case LDH:
|
||||
case LDW:
|
||||
case LDWM:
|
||||
case STB:
|
||||
case STH:
|
||||
case STW:
|
||||
case STWM:
|
||||
case OP_LDO:
|
||||
case OP_LDB:
|
||||
case OP_LDH:
|
||||
case OP_LDW:
|
||||
case OP_LDWM:
|
||||
case OP_STB:
|
||||
case OP_STH:
|
||||
case OP_STW:
|
||||
case OP_STWM:
|
||||
if (abfd->arch_info->mach >= 25)
|
||||
return 16; /* Wide mode, format 16. */
|
||||
return 14;
|
||||
|
||||
case LDWL:
|
||||
case STWL:
|
||||
case FLDW:
|
||||
case FSTW:
|
||||
case OP_FLDW:
|
||||
case OP_LDWL:
|
||||
case OP_FSTW:
|
||||
case OP_STWL:
|
||||
/* This is a hack. Unfortunately, format 11 is already taken
|
||||
and we're using integers rather than an enum, so it's hard
|
||||
to describe the 11a format. */
|
||||
if (abfd->arch_info->mach >= 25)
|
||||
return -16; /* Wide mode, format 16a. */
|
||||
return -11;
|
||||
|
||||
case LDD:
|
||||
case STD:
|
||||
case OP_LDD:
|
||||
case OP_STD:
|
||||
if (abfd->arch_info->mach >= 25)
|
||||
return -10; /* Wide mode, format 10a. */
|
||||
return 10;
|
||||
|
||||
case BL:
|
||||
case BE:
|
||||
case BLE:
|
||||
if ((insn & 0x00008000) != 0)
|
||||
case OP_BL:
|
||||
if ((insn & 0x8000) != 0)
|
||||
return 22;
|
||||
/* fall thru */
|
||||
case OP_BE:
|
||||
case OP_BLE:
|
||||
return 17;
|
||||
|
||||
case LDIL:
|
||||
case ADDIL:
|
||||
case OP_LDIL:
|
||||
case OP_ADDIL:
|
||||
return 21;
|
||||
|
||||
default:
|
||||
|
|
@ -687,21 +563,52 @@ bfd_hppa_insn2fmt (insn)
|
|||
/* Insert VALUE into INSN using R_FORMAT to determine exactly what
|
||||
bits to change. */
|
||||
|
||||
static INLINE unsigned int
|
||||
hppa_rebuild_insn (abfd, insn, value, r_format)
|
||||
bfd *abfd ATTRIBUTE_UNUSED;
|
||||
unsigned int insn;
|
||||
unsigned int value;
|
||||
unsigned int r_format;
|
||||
static INLINE int
|
||||
hppa_rebuild_insn (insn, value, r_format)
|
||||
int insn;
|
||||
int value;
|
||||
int r_format;
|
||||
{
|
||||
switch (r_format)
|
||||
{
|
||||
case 11: return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
|
||||
case 12: return re_assemble_12 (insn & ~ 0x1ffd, value);
|
||||
case 14: return (insn & ~ 0x3fff) | low_sign_unext (value, 14);
|
||||
case 17: return re_assemble_17 (insn & ~ 0x1f1ffd, value);
|
||||
case 21: return re_assemble_21 (insn & ~ 0x1fffff, value);
|
||||
case 32: return value;
|
||||
case 11:
|
||||
return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
|
||||
|
||||
case 12:
|
||||
return (insn & ~ 0x1ffd) | re_assemble_12 (value);
|
||||
|
||||
|
||||
case 10:
|
||||
return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8);
|
||||
|
||||
case -11:
|
||||
return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4);
|
||||
|
||||
case 14:
|
||||
return (insn & ~ 0x3fff) | re_assemble_14 (value);
|
||||
|
||||
|
||||
case -10:
|
||||
return (insn & ~ 0xfff1) | re_assemble_16 (value & -8);
|
||||
|
||||
case -16:
|
||||
return (insn & ~ 0xfff9) | re_assemble_16 (value & -4);
|
||||
|
||||
case 16:
|
||||
return (insn & ~ 0xffff) | re_assemble_16 (value);
|
||||
|
||||
|
||||
case 17:
|
||||
return (insn & ~ 0x1f1ffd) | re_assemble_17 (value);
|
||||
|
||||
case 21:
|
||||
return (insn & ~ 0x1fffff) | re_assemble_21 (value);
|
||||
|
||||
case 22:
|
||||
return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value);
|
||||
|
||||
case 32:
|
||||
return value;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
|
|
@ -709,4 +616,4 @@ hppa_rebuild_insn (abfd, insn, value, r_format)
|
|||
return insn;
|
||||
}
|
||||
|
||||
#endif /* _HPPA_H */
|
||||
#endif /* _LIBHPPA_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue