Add Power 10 PLT instruction patterns
gdb/ChangeLog: 2021-06-07 Carl Love <cel@us.ibm.com> * ppc-tdep.h (ppc_insn_prefix_dform): Declare. * ppc64-tdep.c(insn_md, insn_x, insn_xo): New macros. (ppc64_plt_pcrel_entry_point, ppc64_pcrel_linkage1_target, ppc64_pcrel_linkage2_target): New functions. (ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12): New ppc instruction patterns. (ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12): New variables in define MAX expression. (ppc64_skip_trampoline_code_1): Handle ppc64_standard_linkage9, ppc64_standard_linkage10, ppc64_standard_linkage11, ppc64_standard_linkage12. * (ppc_insn_prefix_dform): New function.
This commit is contained in:
Carl Love
parent
f1854e35d8
commit
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4 changed files with 218 additions and 3 deletions
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@ -1,3 +1,20 @@
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2021-06-07 Carl Love <cel@us.ibm.com>
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* ppc-tdep.h (ppc_insn_prefix_dform): Declare.
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* ppc64-tdep.c(insn_md, insn_x, insn_xo): New macros.
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(ppc64_plt_pcrel_entry_point, ppc64_pcrel_linkage1_target,
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ppc64_pcrel_linkage2_target): New functions.
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(ppc64_standard_linkage9, ppc64_standard_linkage10,
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ppc64_standard_linkage11, ppc64_standard_linkage12): New ppc
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instruction patterns.
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(ppc64_standard_linkage9, ppc64_standard_linkage10,
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ppc64_standard_linkage11, ppc64_standard_linkage12): New variables
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in define MAX expression.
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(ppc64_skip_trampoline_code_1): Handle ppc64_standard_linkage9,
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ppc64_standard_linkage10, ppc64_standard_linkage11,
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ppc64_standard_linkage12.
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* (ppc_insn_prefix_dform): New function.
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2021-06-07 Simon Marchi <simon.marchi@polymtl.ca>
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PR gdb/27899
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@ -426,6 +426,8 @@ extern int ppc_insns_match_pattern (struct frame_info *frame, CORE_ADDR pc,
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extern CORE_ADDR ppc_insn_d_field (unsigned int insn);
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extern CORE_ADDR ppc_insn_ds_field (unsigned int insn);
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extern CORE_ADDR ppc_insn_prefix_dform (unsigned int insn1,
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unsigned int insn2);
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extern int ppc_process_record (struct gdbarch *gdbarch,
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struct regcache *regcache, CORE_ADDR addr);
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194
gdb/ppc64-tdep.c
194
gdb/ppc64-tdep.c
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@ -49,6 +49,38 @@
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| (((unsigned (spr)) & 0x3e0) << 6) \
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| (((unsigned (xo)) & 0x3ff) << 1))
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#define prefix(a, b, R, do) \
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(((0x1) << 26) \
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| (((unsigned (a)) & 0x3) << 24) \
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| (((unsigned (b)) & 0x1) << 23) \
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| (((unsigned (R)) & 0x1) << 20) \
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| ((unsigned (do)) & 0x3ffff))
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#define insn_md(opcd, ra, rs, sh, me, rc) \
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((((unsigned (opcd)) & 0x3f) << 26) \
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| (((unsigned (rs)) & 0x1f) << 21) \
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| (((unsigned (ra)) & 0x1f) << 16) \
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| (((unsigned (sh)) & 0x3e) << 11) \
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| (((unsigned (me)) & 0x3f) << 25) \
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| (((unsigned (sh)) & 0x1) << 1) \
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| ((unsigned (rc)) & 0x1))
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#define insn_x(opcd, rt, ra, rb, opc2) \
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((((unsigned (opcd)) & 0x3f) << 26) \
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| (((unsigned (rt)) & 0x1f) << 21) \
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| (((unsigned (ra)) & 0x1f) << 16) \
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| (((unsigned (rb)) & 0x3e) << 11) \
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| (((unsigned (opc2)) & 0x3FF) << 1))
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#define insn_xo(opcd, rt, ra, rb, oe, rc, opc2) \
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((((unsigned (opcd)) & 0x3f) << 26) \
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| (((unsigned (rt)) & 0x1f) << 21) \
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| (((unsigned (ra)) & 0x1f) << 16) \
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| (((unsigned (rb)) & 0x3e) << 11) \
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| (((unsigned (oe)) & 0x1) << 10) \
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| (((unsigned (opc2)) & 0x1FF) << 1) \
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| (((unsigned (rc)))))
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/* PLT_OFF is the TOC-relative offset of a 64-bit PowerPC PLT entry.
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Return the function's entry point. */
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@ -75,6 +107,18 @@ ppc64_plt_entry_point (struct frame_info *frame, CORE_ADDR plt_off)
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return read_memory_unsigned_integer (tocp + plt_off, 8, byte_order);
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}
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static CORE_ADDR
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ppc64_plt_pcrel_entry_point (struct frame_info *frame, CORE_ADDR plt_off,
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CORE_ADDR pc)
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{
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struct gdbarch *gdbarch = get_frame_arch (frame);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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/* Execution direction doesn't matter, entry is pc + plt_off either way.
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The first word of the PLT entry is the function entry point. */
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return read_memory_unsigned_integer (pc + plt_off, 8, byte_order);
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}
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/* Patterns for the standard linkage functions. These are built by
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build_plt_stub in bfd/elf64-ppc.c. */
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@ -342,6 +386,110 @@ static const struct ppc_insn_pattern ppc64_standard_linkage8[] =
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{ 0, 0, 0 }
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};
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/* Power 10 ELFv2 PLT call stubs */
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static const struct ppc_insn_pattern ppc64_standard_linkage9[] =
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{
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/* std %r2,0+40(%r1) <optional> */
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{ insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
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/* pld r12, <any> */
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{ prefix (-1, -1, 1, 0), prefix (0, 0, 1, 0), 0 },
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{ insn_d (-1, -1, -1, 0), insn_d (57, 12, 0, 0), 0 },
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/* mtctr r12 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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/* bctr */
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{ (unsigned) -1, 0x4e800420, 0 },
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{ 0, 0, 0 }
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};
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static const struct ppc_insn_pattern ppc64_standard_linkage10[] =
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{
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/* std %r2,0+40(%r1) <optional> */
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{ insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
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/* paddi r12,<any> */
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{ prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
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{ insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
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/* mtctr r12 <optional> */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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/* bctr */
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{ (unsigned) -1, 0x4e800420, 0 },
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{ 0, 0, 0 }
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};
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static const struct ppc_insn_pattern ppc64_standard_linkage11[] =
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{
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/* std %r2,0+40(%r1) <optional> */
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{ insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
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/* li %r11,0 <optional> */
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{ insn_d (-1, -1, -1, 0), insn_d (14, 11, 0, 0), 1 },
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/* sldi %r11,%r11,34 <eq to rldicr rx,ry,n, 63-n> <optional> */
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{ insn_md (-1, -1, -1, 0, 0, 1), insn_md (30, 11, 11, 34, 63-34, 0), 1 },
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/* paddi r12, <any> */
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{ prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
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{ insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
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/* ldx %r12,%r11,%r12 <optional> */
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{ (unsigned) -1, insn_x (31, 12, 11, 12, 21), 1 },
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/* add %r12,%r11,%r12 <optional> */
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{ (unsigned) -1, insn_xo (31, 12, 11, 12, 0, 0, 40), 1 },
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/* mtctr r12 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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/* bctr */ // 13, 14, 15, 16
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{ (unsigned) -1, 0x4e800420, 0 },
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{ 0, 0, 0 }
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};
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static const struct ppc_insn_pattern ppc64_standard_linkage12[] =
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{
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/* std %r2,0+40(%r1) <optional> */
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{ insn_ds (-1, -1, -1, 0, 1), insn_ds (62, 2, 1, 40, 0), 1 },
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/* lis %r11,xxx@ha <equivalent addis rx, 0, val> */
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/* addis r12, r2, <any> */
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{ insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
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/* ori %r11,%r11,xxx@l */
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{ insn_d (-1, -1, -1, 0), insn_d (24, 11, 11, 0), 0 },
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/* sldi %r11,%r11,34 <optional> */
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{ (unsigned) -1, insn_md (30, 11, 11, 34, 63-34, 0), 1 },
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/*paddi r12,<any> */
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{ prefix (-1, -1, 1, 0), prefix (2, 0, 1, 0), 0 },
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{ insn_d (-1, -1, -1, 0), insn_d (14, 12, 0, 0), 0 },
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/* sldi %r11,%r11,34 <optional> */
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{ (unsigned) -1, insn_md (30, 11, 11, 34, 63-34, 0), 1 },
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/* ldx %r12,%r11,%r12 <optional> */
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{ (unsigned) -1, insn_x (31, 12, 11, 12, 21), 1 },
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/* add %r12,%r11,%r12 <optional> */
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{ (unsigned) -1, insn_xo (31, 12, 11, 12, 0, 0, 40), 1 },
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/* mtctr r12 */
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{ insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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/* bctr */ // 17, 18, 19, 20
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{ (unsigned) -1, 0x4e800420, 0 },
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{ 0, 0, 0 }
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};
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/* When the dynamic linker is doing lazy symbol resolution, the first
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call to a function in another object will go like this:
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@ -432,6 +580,29 @@ ppc64_standard_linkage4_target (struct frame_info *frame, unsigned int *insn)
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return ppc64_plt_entry_point (frame, plt_off);
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}
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static CORE_ADDR
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ppc64_pcrel_linkage1_target (struct frame_info *frame, unsigned int *insn,
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CORE_ADDR pc)
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{
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/* insn[0] is for the std instruction. */
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CORE_ADDR plt_off = ppc_insn_prefix_dform (insn[1], insn[2]);
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return ppc64_plt_pcrel_entry_point (frame, plt_off, pc);
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}
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static CORE_ADDR
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ppc64_pcrel_linkage2_target (struct frame_info *frame, unsigned int *insn,
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CORE_ADDR pc)
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{
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CORE_ADDR plt_off;
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/* insn[0] is for the std instruction.
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insn[1] is for the li r11 instruction */
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plt_off = ppc_insn_prefix_dform (insn[2], insn[3]);
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return ppc64_plt_pcrel_entry_point (frame, plt_off, pc);
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}
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/* Given that we've begun executing a call trampoline at PC, return
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the entry point of the function the trampoline will go to.
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@ -447,10 +618,15 @@ ppc64_skip_trampoline_code_1 (struct frame_info *frame, CORE_ADDR pc)
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ARRAY_SIZE (ppc64_standard_linkage2)),
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MAX (ARRAY_SIZE (ppc64_standard_linkage3),
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ARRAY_SIZE (ppc64_standard_linkage4))),
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MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage5),
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MAX(MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage5),
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ARRAY_SIZE (ppc64_standard_linkage6)),
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MAX (ARRAY_SIZE (ppc64_standard_linkage7),
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ARRAY_SIZE (ppc64_standard_linkage8))))
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ARRAY_SIZE (ppc64_standard_linkage8))),
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MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage9),
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ARRAY_SIZE (ppc64_standard_linkage10)),
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MAX (ARRAY_SIZE (ppc64_standard_linkage11),
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ARRAY_SIZE (ppc64_standard_linkage12)))))
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- 1];
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CORE_ADDR target;
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int scan_limit, i;
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@ -463,7 +639,19 @@ ppc64_skip_trampoline_code_1 (struct frame_info *frame, CORE_ADDR pc)
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for (i = 0; i < scan_limit; i++)
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{
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if (i < ARRAY_SIZE (ppc64_standard_linkage8) - 1
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if (i < ARRAY_SIZE (ppc64_standard_linkage12) - 1
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&& ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage12, insns))
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pc = ppc64_pcrel_linkage1_target (frame, insns, pc);
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else if (i < ARRAY_SIZE (ppc64_standard_linkage11) - 1
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&& ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage11, insns))
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pc = ppc64_pcrel_linkage2_target (frame, insns, pc);
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else if (i < ARRAY_SIZE (ppc64_standard_linkage10) - 1
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&& ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage10, insns))
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pc = ppc64_pcrel_linkage1_target (frame, insns, pc);
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else if (i < ARRAY_SIZE (ppc64_standard_linkage9) - 1
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&& ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage9, insns))
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pc = ppc64_pcrel_linkage1_target (frame, insns, pc);
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else if (i < ARRAY_SIZE (ppc64_standard_linkage8) - 1
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&& ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage8, insns))
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pc = ppc64_standard_linkage4_target (frame, insns);
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else if (i < ARRAY_SIZE (ppc64_standard_linkage7) - 1
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@ -7371,6 +7371,14 @@ ppc_insn_ds_field (unsigned int insn)
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return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
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}
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CORE_ADDR
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ppc_insn_prefix_dform (unsigned int insn1, unsigned int insn2)
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{
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/* result is 34-bits */
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return (CORE_ADDR) ((((insn1 & 0x3ffff) ^ 0x20000) - 0x20000) << 16)
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| (CORE_ADDR)(insn2 & 0xffff);
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}
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/* Initialization code. */
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void _initialize_rs6000_tdep ();
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