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x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128

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These aren't useful, but can be encoded for their AVX forms and hence
should also be permitted for the APX surrogates. Extend the respective
conditional by a base opcode check, to restrict it to VROUND{P,S}{S,D}.
This commit is contained in:
Jan Beulich 2024-03-11 08:23:11 +01:00
parent 788b11d9c6
commit ec6b11e7ec
1 changed files with 3 additions and 1 deletions
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4
gas/config/tc-i386.c
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@ -8230,7 +8230,9 @@ check_VecOperands (const insn_template *t)
/* Check the special Imm4 cases; must be the first operand. */
if ((is_cpu (t, CpuXOP) && t->operands == 5)
|| (is_cpu (t, CpuAPX_F) && t->opcode_space == SPACE_0F3A))
|| (t->opcode_space == SPACE_0F3A
&& (t->base_opcode | 3) == 0x0b
&& is_cpu (t, CpuAPX_F)))
{
if (i.op[0].imms->X_op != O_constant
|| !fits_in_imm4 (i.op[0].imms->X_add_number))