* config/tc-mn10300.c (md_assemble): Simplify offset adjustment of
pc-relative relocations not placed at the end of the instruction.
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2 changed files with 13 additions and 21 deletions
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@ -1,3 +1,8 @@
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2001-04-14 Alexandre Oliva <aoliva@redhat.com>
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* config/tc-mn10300.c (md_assemble): Simplify offset adjustment of
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pc-relative relocations not placed at the end of the instruction.
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2001-04-13 Jim Wilson <wilson@redhat.com>
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* tc-ia64.c (is_conditional_branch): Return true for br, brl, and br.
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@ -937,7 +937,7 @@ md_assemble (str)
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struct mn10300_opcode *next_opcode;
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const unsigned char *opindex_ptr;
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int next_opindex, relaxable;
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unsigned long insn, extension, size = 0, real_size;
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unsigned long insn, extension, size = 0;
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char *f;
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int i;
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int match;
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@ -1513,8 +1513,6 @@ keep_going:
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if (opcode->format == FMT_D4)
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size = 6;
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real_size = size;
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if (relaxable && fc > 0)
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{
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int type;
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@ -1729,25 +1727,14 @@ keep_going:
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/* Is the reloc pc-relative? */
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pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
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/* Gross. This disgusting hack is to make sure we
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get the right offset for the 16/32 bit reloc in
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"call" instructions. Basically they're a pain
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because the reloc isn't at the end of the instruction. */
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if ((size == 5 || size == 7)
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&& (((insn >> 24) & 0xff) == 0xcd
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|| ((insn >> 24) & 0xff) == 0xdd))
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size -= 2;
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/* Similarly for certain bit instructions which don't
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hav their 32bit reloc at the tail of the instruction. */
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if (size == 7
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&& (((insn >> 16) & 0xffff) == 0xfe00
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|| ((insn >> 16) & 0xffff) == 0xfe01
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|| ((insn >> 16) & 0xffff) == 0xfe02))
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size -= 1;
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offset = size - reloc_size / 8;
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/* If the pcrel relocation isn't at the end of the insn,
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we have to adjust the offset for the relocation to be
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correct. */
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if (pcrel)
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offset -= operand->shift / 8;
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/* Choose a proper BFD relocation type. */
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if (pcrel)
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{
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@ -1791,7 +1778,7 @@ keep_going:
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}
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}
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dwarf2_emit_insn (real_size);
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dwarf2_emit_insn (size);
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}
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/* If while processing a fixup, a reloc really needs to be created
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