gas/
* config/tc-mips.c (is_delay_slot_valid): Don't accept macros in 16-bit delay slots. (macro_build_jalr): Emit 32-bit JALR if placed in a 32-bit delay slot. (macro) <M_JAL_2>: Likewise gas/testsuite/ * gas/mips/micromips-branch-delay.l: Update messages for 16-bit delay slot changes. * gas/mips/micromips-warn-branch-delay.d: New test. * gas/mips/micromips-warn-branch-delay.l: Stderr output for the new test. * gas/mips/micromips-warn-branch-delay-1.d: New test. * gas/mips/micromips-warn-branch-delay.s: New test source. * gas/mips/micromips-warn-branch-delay-1.s: New test source. * gas/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
parent
c2c9fdb45e
commit
e64af27846
10 changed files with 185 additions and 7 deletions
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@ -1,3 +1,11 @@
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2012-11-01 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (is_delay_slot_valid): Don't accept macros
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in 16-bit delay slots.
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(macro_build_jalr): Emit 32-bit JALR if placed in a 32-bit delay
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slot.
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(macro) <M_JAL_2>: Likewise
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2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
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* config/tc-microblaze.c: Check for weak symbols before
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@ -2301,7 +2301,18 @@ is_size_valid (const struct mips_opcode *mo)
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}
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/* Return TRUE if the microMIPS opcode MO is valid for the delay slot
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of the preceding instruction. Always TRUE in the standard MIPS mode. */
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of the preceding instruction. Always TRUE in the standard MIPS mode.
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We don't accept macros in 16-bit delay slots to avoid a case where
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a macro expansion fails because it relies on a preceding 32-bit real
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instruction to have matched and does not handle the operands correctly.
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The only macros that may expand to 16-bit instructions are JAL that
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cannot be placed in a delay slot anyway, and corner cases of BALIGN
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and BGT (that likewise cannot be placed in a delay slot) that decay to
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a NOP. In all these cases the macros precede any corresponding real
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instruction definitions in the opcode table, so they will match in the
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second pass where the size of the delay slot is ignored and therefore
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produce correct code. */
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static bfd_boolean
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is_delay_slot_valid (const struct mips_opcode *mo)
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@ -2310,7 +2321,8 @@ is_delay_slot_valid (const struct mips_opcode *mo)
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return TRUE;
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if (mo->pinfo == INSN_MACRO)
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return TRUE;
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return ((history[0].insn_mo->pinfo2 & INSN2_BRANCH_DELAY_16BIT) == 0
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? TRUE : FALSE);
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if ((history[0].insn_mo->pinfo2 & INSN2_BRANCH_DELAY_32BIT) != 0
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&& micromips_insn_length (mo) != 4)
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return FALSE;
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@ -5328,7 +5340,8 @@ macro_build_jalr (expressionS *ep, int cprestore)
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if (mips_opts.micromips)
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{
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jalr = mips_opts.noreorder && !cprestore ? "jalr" : "jalrs";
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if (MIPS_JALR_HINT_P (ep))
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if (MIPS_JALR_HINT_P (ep)
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|| (history[0].insn_mo->pinfo2 & INSN2_BRANCH_DELAY_32BIT))
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macro_build (NULL, jalr, "t,s", RA, PIC_CALL_REG);
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else
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macro_build (NULL, jalr, "mj", PIC_CALL_REG);
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@ -7768,7 +7781,9 @@ macro (struct mips_cl_insn *ip)
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if (mips_pic == NO_PIC)
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{
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s = jals ? "jalrs" : "jalr";
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if (mips_opts.micromips && dreg == RA)
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if (mips_opts.micromips
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&& dreg == RA
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&& !(history[0].insn_mo->pinfo2 & INSN2_BRANCH_DELAY_32BIT))
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macro_build (NULL, s, "mj", sreg);
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else
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macro_build (NULL, s, JALR_FMT, dreg, sreg);
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@ -7783,7 +7798,9 @@ macro (struct mips_cl_insn *ip)
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s = (mips_opts.micromips && (!mips_opts.noreorder || cprestore)
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? "jalrs" : "jalr");
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if (mips_opts.micromips && dreg == RA)
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if (mips_opts.micromips
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&& dreg == RA
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&& !(history[0].insn_mo->pinfo2 & INSN2_BRANCH_DELAY_32BIT))
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macro_build (NULL, s, "mj", sreg);
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else
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macro_build (NULL, s, JALR_FMT, dreg, sreg);
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@ -1,3 +1,16 @@
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2012-11-01 Chao-ying Fu <fu@mips.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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* gas/mips/micromips-branch-delay.l: Update messages for 16-bit
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delay slot changes.
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* gas/mips/micromips-warn-branch-delay.d: New test.
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* gas/mips/micromips-warn-branch-delay.l: Stderr output for the
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new test.
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* gas/mips/micromips-warn-branch-delay-1.d: New test.
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* gas/mips/micromips-warn-branch-delay.s: New test source.
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* gas/mips/micromips-warn-branch-delay-1.s: New test source.
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* gas/mips/mips.exp: Run the new tests.
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2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
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* gas/microblaze: New.
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@ -1,6 +1,6 @@
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.*: Assembler messages:
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.*:17: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
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.*:19: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
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.*:17: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:19: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:21: Warning: Macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
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.*:40: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:44: Warning: Wrong size instruction in a 16-bit branch delay slot
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41
gas/testsuite/gas/mips/micromips-warn-branch-delay-1.d
Normal file
41
gas/testsuite/gas/mips/micromips-warn-branch-delay-1.d
Normal file
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@ -0,0 +1,41 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: microMIPS fixed-size branch delay slots 1
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#as: -32 -mmicromips
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#source: micromips-warn-branch-delay-1.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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([0-9a-f]+) <[^>]*> 4220 fffe bltzals zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0c00 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4220 fffe bltzals zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0c00 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4220 fffe bltzals zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 45e2 jalrs v0
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4220 fffe bltzals zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0c00 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4020 fffe bltzal zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4020 fffe bltzal zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4020 fffe bltzal zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 03e2 4f3c jalrs v0
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[0-9a-f]+ <[^>]*> 0c00 nop
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([0-9a-f]+) <[^>]*> 4020 fffe bltzal zero,\1 <.*>
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[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
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[0-9a-f]+ <[^>]*> 0000 0000 nop
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[0-9a-f]+ <[^>]*> 0c00 nop
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\.\.\.
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43
gas/testsuite/gas/mips/micromips-warn-branch-delay-1.s
Normal file
43
gas/testsuite/gas/mips/micromips-warn-branch-delay-1.s
Normal file
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@ -0,0 +1,43 @@
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# Source code used to test correct macro expansion in microMIPS fixed-size
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# branch delay slots.
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.text
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.set dspr2
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.set noreorder
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.set noat
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test:
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bltzals $0, .
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nop
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nop
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bltzals $0, .
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bgt $2, 0x7fffffff, .
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nop
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bltzals $0, .
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jals $2
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nop
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bltzals $0, .
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balign $2, $2, 0
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nop
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bltzal $0, .
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nop
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nop
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bltzal $0, .
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bgt $2, 0x7fffffff, .
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nop
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bltzal $0, .
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jals $2
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nop
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bltzal $0, .
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balign $2, $2, 0
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nop
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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26
gas/testsuite/gas/mips/micromips-warn-branch-delay.d
Normal file
26
gas/testsuite/gas/mips/micromips-warn-branch-delay.d
Normal file
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@ -0,0 +1,26 @@
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#objdump: -dr --show-raw-insn
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#name: microMIPS fixed-size branch delay slots
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#as: -mmicromips
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#source: micromips-warn-branch-delay.s
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#stderr: micromips-warn-branch-delay.l
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <foo>:
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 0083 1250 and v0,v1,a0
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 6043 9000 swr v0,0\(v1\)
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 6043 8000 swl v0,0\(v1\)
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 0272 8210 mul s0,s2,s3
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 001f 8b90 sltu s1,ra,zero
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 0220 8910 add s1,zero,s1
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[ 0-9a-f]+: 45e2 jalrs v0
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[ 0-9a-f]+: 01b1 8990 sub s1,s1,t5
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#pass
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8
gas/testsuite/gas/mips/micromips-warn-branch-delay.l
Normal file
8
gas/testsuite/gas/mips/micromips-warn-branch-delay.l
Normal file
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@ -0,0 +1,8 @@
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.*: Assembler messages:
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.*:8: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:10: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:12: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:14: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:16: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:18: Warning: Wrong size instruction in a 16-bit branch delay slot
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.*:20: Warning: Wrong size instruction in a 16-bit branch delay slot
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20
gas/testsuite/gas/mips/micromips-warn-branch-delay.s
Normal file
20
gas/testsuite/gas/mips/micromips-warn-branch-delay.s
Normal file
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@ -0,0 +1,20 @@
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# Source file used to test microMIPS fixed-size branch delay slots.
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.text
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.set noreorder
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.set noat
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foo:
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jalrs $2
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and $2,$3,$4
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jalrs $2
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swr $2,0($3)
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jalrs $2
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swl $2,0($3)
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jalrs $2
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mul $16,$18,$19
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jalrs $2
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sltu $17,$31,$0
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jalrs $2
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add $17,$0,$17
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jalrs $2
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sub $17,$17,$13
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@ -1113,6 +1113,8 @@ if { [istarget mips*-*-vxworks*] } {
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run_dump_test "micromips-branch-relax"
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run_dump_test "micromips-branch-relax-pic"
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run_dump_test "micromips-branch-delay"
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run_dump_test "micromips-warn-branch-delay"
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run_dump_test "micromips-warn-branch-delay-1"
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}
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run_dump_test_arches "mcu" [mips_arch_list_matching mips32r2 \
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