Allow gencode.c to generate input to the igen generator.
This commit is contained in:
parent
eb2e3c85ca
commit
e63bc706fe
2 changed files with 489 additions and 201 deletions
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@ -1,3 +1,16 @@
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Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* Makefile.in (tmp.igen): Add target. Generate igen input from
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gencode file.
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* gencode.c (FEATURE_IGEN): Define.
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(main): Add --igen option. Generate output in igen format.
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(process_instructions): Format output according to igen option.
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(print_igen_insn_format): New function.
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(print_igen_insn_models): New function.
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(process_instructions): Only issue warnings and ignore
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instructions when no FEATURE_IGEN.
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Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
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@ -116,6 +116,7 @@
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#define FEATURE_WARN_MEM (1 << 27) /* 0 = nothing; 1 = generate warnings when memory problems are noticed */
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#define FEATURE_WARN_R31 (1 << 28) /* 0 = nothing; 1 = generate warnings if r31 used dangerously */
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#define FEATURE_WARN_RESULT (1 << 29) /* 0 = nothing; 1 = generate warnings when undefined results may occur */
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#define FEATURE_IGEN (1 << 20) /* 0 = nothing; 1 = generate igen formatted output file */
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/* We used to enable FEATURE_WARN_ZERO, but it is perfectly legitimate to
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have the zero register as a destination -- the zero register just doesn't
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@ -375,7 +376,9 @@ typedef enum {
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#define DOUBLEWORD (3) /* 64bit */
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#define SINGLE (4) /* single precision FP */
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#define DOUBLE (5) /* double precision FP */
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/* start-sanitize-r5900 */
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#define QUADWORD (6) /* 128bit */
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/* end-sanitize-r5900 */
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/* Shorthand to get the size field from the flags value: */
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#define GETDATASIZEINSN(i) (((i)->flags >> SIM_SH_SIZE) & SIM_MASK_SIZE)
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@ -965,6 +968,168 @@ static const struct instruction MIPS16_DECODE[] = {
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{"XOR", 1, "11101wwwyyy01110", RR, XOR, NONE }
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};
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/*---------------------------------------------------------------------------*/
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static void print_igen_insn_format PARAMS ((const char *bitmap,
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inst_type mark,
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int data_size,
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const char *options,
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const char *name));
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static void
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print_igen_insn_format (bitmap, mark, data_size, options, name)
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const char *bitmap;
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inst_type mark;
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int data_size;
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const char *options;
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const char *name;
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{
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const char *chp;
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char lch = *bitmap;
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for (chp = bitmap; *chp != '\0'; chp++)
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{
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if ((isdigit (lch) && !isdigit (*chp))
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|| (!isdigit (lch) && isdigit (*chp))
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|| (!isdigit (lch) && !isdigit (*chp) && lch != *chp))
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{
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lch = *chp;
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printf (",");
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}
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switch (*chp)
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{
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case '?':
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printf ("*");
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break;
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case '<':
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printf ("s"); /* good guess */
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break;
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default:
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printf ("%c", *chp);
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break;
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}
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}
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printf (":");
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switch (mark)
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{
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case NORMAL:
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printf ("NORMAL");
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break;
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case SPECIAL:
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printf ("SPECIAL");
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break;
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case REGIMM:
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printf ("REGIMM");
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break;
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case COP1:
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printf ("COP1");
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break;
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case COP1X:
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printf ("COP1X");
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break;
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case COP1S: /* These instructions live in the reserved FP format values: 0..15,18-19,22-31 */
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printf ("COP1S");
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break;
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case MMINORM:
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printf ("MMINORM");
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break;
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case MMI0:
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printf ("MMI0");
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break;
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case MMI1:
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printf ("MMI1");
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break;
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case MMI2:
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printf ("MMI2");
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break;
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case MMI3:
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printf ("MMI3");
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break;
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/* mips16 encoding types. */
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case I:
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printf ("I");
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break;
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case RI:
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printf ("RI");
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break;
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case RR:
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printf ("RR");
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break;
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case RRI:
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printf ("RRI");
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break;
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case RRR:
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printf ("RRR");
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break;
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case RRI_A:
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printf ("RRI_A");
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break;
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case ISHIFT:
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printf ("ISHIFT");
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break;
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case I8:
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printf ("I8");
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break;
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case I8_MOVR32:
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printf ("I8_MOVR32");
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break;
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case I8_MOV32R:
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printf ("I8_MOV32R");
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break;
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case I64:
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printf ("I64");
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break;
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case RI64:
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printf ("RI64");
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break;
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}
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printf (":");
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switch (data_size)
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{
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case DOUBLEWORD:
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printf ("64");
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break;
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/* start-sanitize-r5900 */
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case QUADWORD:
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printf ("128");
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break;
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/* end-sanitize-r5900 */
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default:
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printf ("32");
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}
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printf (":%s:%s\n", options, name);
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}
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static void print_igen_insn_models PARAMS ((unsigned int isa));
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static void
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print_igen_insn_models (isa)
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unsigned int isa;
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{
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/* common mips ISAs */
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switch ((isa & MASK_ISA))
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{
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case 1:
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printf ("*mipsI:\n");
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case 2:
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printf ("*mipsII:\n");
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case 3:
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printf ("*mipsIII:\n");
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}
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/* processor specific ISAs */
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if ((isa & ARCH_VR4100))
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printf ("*vr4100:\n");
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/* start-sanitize-r5900 */
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if ((isa & ARCH_R5900))
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printf ("*r5900:\n");
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/* end-sanitize-r5900 */
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if ((isa & ARCH_R3900))
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printf ("*r3900:\n");
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}
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/*---------------------------------------------------------------------------*/
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static int bitmap_val PARAMS ((const char *, int, int));
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static void build_mips16_operands PARAMS ((const char *));
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static void build_instruction
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@ -988,9 +1153,11 @@ name_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return "DOUBLEWORD";
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return "QUADWORD";
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1011,9 +1178,11 @@ letter_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return "D";
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return "Q";
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1035,9 +1204,11 @@ type_for_data_len( insn , is_signed )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return 0;
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return 0;
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1058,9 +1229,11 @@ max_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return 0;
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return 0;
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1081,9 +1254,11 @@ min_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return 0;
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return 0;
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1104,9 +1279,11 @@ umax_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return 0;
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return 0;
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1127,9 +1304,11 @@ bits_for_data_len( insn )
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else if (GETDATASIZEINSN(insn) == DOUBLEWORD)
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return "64";
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/* start-sanitize-r5900 */
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else if (GETDATASIZEINSN(insn) == QUADWORD)
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return "128";
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/* end-sanitize-r5900 */
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else
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return 0;
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}
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@ -1756,6 +1935,8 @@ process_instructions(doarch,features)
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if (doisa == 0)
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doisa = maxisa;
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if (!(features & FEATURE_IGEN))
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{
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printf("#if defined(SIM_MANIFESTS)\n");
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printf("#define MIPSISA (%d)\n",doisa);
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if (proc64)
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@ -1874,6 +2055,7 @@ process_instructions(doarch,features)
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printf("switch (num)\n") ;
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printf("{\n");
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}
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for (loop = 0; (loop < limit); loop++) {
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/* First check if the insn is in a requested isa# independent set,
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@ -1885,7 +2067,8 @@ process_instructions(doarch,features)
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if (((isa & doarch & MASK_ISA_INDEP)
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|| (((isa & MASK_ISA) <= doisa)
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&& (((isa & MASK_ISA_DEP) == 0) || ((isa & MASK_ISA_DEP) & doarch) != 0)))
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&& (!(MIPS_DECODE[loop].flags & FP) || ((MIPS_DECODE[loop].flags & FP) && dofp))) {
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&& (!(MIPS_DECODE[loop].flags & FP) || ((MIPS_DECODE[loop].flags & FP) && dofp))
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|| (features & FEATURE_IGEN)) {
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unsigned int onemask;
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unsigned int zeromask;
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unsigned int dontmask;
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@ -1895,7 +2078,8 @@ process_instructions(doarch,features)
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convert_bitmap(MIPS_DECODE[loop].bitmap,&onemask,&zeromask,&dontmask);
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if (!(MIPS_DECODE[loop].flags & COPROC)
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&& ((GETDATASIZEINSN(&MIPS_DECODE[loop]) == DOUBLEWORD) && !proc64)) {
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&& ((GETDATASIZEINSN(&MIPS_DECODE[loop]) == DOUBLEWORD) && !proc64)
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&& !(features & FEATURE_IGEN)) {
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fprintf(stderr,"DOUBLEWORD width specified for non 64-bit processor for instruction \"%s\"\n",MIPS_DECODE[loop].name);
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exit(4);
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}
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@ -1986,6 +2170,8 @@ process_instructions(doarch,features)
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exit(5) ;
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}
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if (!(features & FEATURE_IGEN))
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{
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printf("case %d : /* \"%s\" %s */\n",number,MIPS_DECODE[loop].name,MIPS_DECODE[loop].bitmap) ;
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#if defined(DEBUG)
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@ -2003,6 +2189,24 @@ process_instructions(doarch,features)
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}
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printf(" {\n") ;
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}
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else
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{
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/* start-sanitize-cygnus-never */
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/* If any sanitization occures, this line should be printed */
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if ((MIPS_DECODE[loop].isa & ARCH_R5900))
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printf ("// %s-%s-%s\n", "start", "sanitize", "r5900");
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/* end-sanitize-cygnus-never */
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printf ("\n");
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print_igen_insn_format (MIPS_DECODE[loop].bitmap,
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MIPS_DECODE[loop].mark, /* format-name */
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GETDATASIZEINSN (&MIPS_DECODE[loop]), /* filter-flags */
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"", /* options */
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MIPS_DECODE[loop].name);
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print_igen_insn_models (MIPS_DECODE[loop].isa);
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printf ("{\n") ;
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printf (" unsigned32 instruction = instruction_0;\n");
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}
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/* Get hold of the operands */
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/* NOTE: If we wanted to make the simulator code smaller, we
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@ -2022,15 +2226,33 @@ process_instructions(doarch,features)
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build_instruction (doisa, features, 0, &MIPS_DECODE[loop]);
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printf(" }\n") ;
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if (!(features & FEATURE_IGEN))
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{
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printf(" }\n") ;
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printf(" break ;\n") ;
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}
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else
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{
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printf ("}\n");
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printf ("\n");
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/* start-sanitize-cygnus-never */
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/* When sanitized, this output should never be produced */
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if ((MIPS_DECODE[loop].isa & ARCH_R5900))
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printf ("// %s-%s-%s\n", "end", "sanitize", "r5900");
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/* end-sanitize-cygnus-never */
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}
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}
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}
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if (!(features & FEATURE_IGEN))
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{
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printf("default : /* Unrecognised instruction */\n") ;
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printf(" SignalException(ReservedInstruction,instruction);\n") ;
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printf(" break ;\n") ;
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printf("}\n}\n") ;
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}
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/* Handle mips16 instructions. The switch table looks like this:
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0 - 31: I, RI, and RRI instructions by major.
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@ -2042,6 +2264,8 @@ process_instructions(doarch,features)
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82 - 89: I64 and RI64 instructions by funct + 82
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90 - 97: jalr (RR minor 0) by y + 90
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*/
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if (!(features & FEATURE_IGEN))
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{
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printf ("else {\n");
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printf ("static int extendval;\n");
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printf ("static int have_extendval;\n");
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@ -2058,6 +2282,7 @@ process_instructions(doarch,features)
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printf ("case 0x1f: num = 82 + ((instruction & 0x700) >> 8); break;\n");
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printf ("default: break;\n}\n");
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printf ("switch (num)\n{\n");
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}
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for (loop = 0; loop < sizeof MIPS16_DECODE / sizeof MIPS16_DECODE[0]; loop++)
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{
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@ -2108,10 +2333,25 @@ process_instructions(doarch,features)
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abort ();
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}
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if (!(features & FEATURE_IGEN))
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{
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printf ("case %d: /* \"%s\" %s */\n", num, MIPS16_DECODE[loop].name,
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bitmap);
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printf (" {\n");
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}
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else
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{
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printf ("\n");
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print_igen_insn_format (bitmap,
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MIPS16_DECODE[loop].mark, /* format-name */
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GETDATASIZEINSN (&MIPS16_DECODE[loop]), /* filter-flags */
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"", /* options */
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MIPS16_DECODE[loop].name);
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printf ("*mips16:\n");
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printf ("{\n");
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printf (" unsigned32 instruction = instruction_0;\n");
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}
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build_mips16_operands (bitmap);
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@ -2127,16 +2367,27 @@ process_instructions(doarch,features)
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}
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printf (" }\n");
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if (!(features & FEATURE_IGEN))
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{
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printf (" }\n") ;
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printf (" break ;\n") ;
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}
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else
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{
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printf ("}\n");
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printf ("\n");
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}
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}
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if (!(features & FEATURE_IGEN))
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{
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printf ("default : /* Unrecognised instruction */\n") ;
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printf (" SignalException(ReservedInstruction,instruction);\n") ;
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printf (" break ;\n") ;
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printf ("}\n}\n") ;
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printf("#endif /* simulator engine */\n");
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}
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return ;
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}
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@ -2643,11 +2894,13 @@ build_instruction (doisa, features, mips16, insn)
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datalen = 8;
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accesslength = "AccessLength_DOUBLEWORD";
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break ;
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/* start-sanitize-r5900 */
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case QUADWORD :
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datalen = 16;
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accesslength = "AccessLength_QUADWORD";
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break ;
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/* end-sanitize-r5900 */
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}
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if (insn->flags & REG)
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@ -2687,10 +2940,13 @@ build_instruction (doisa, features, mips16, insn)
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|
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switch (datalen) {
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case 8:
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if (!(features & FEATURE_IGEN))
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{
|
||||
if (!proc64) {
|
||||
fprintf(stderr,"DOUBLEWORD shifted memory transfers only valid for 64-bit processors \"%s\"\n",insn->name);
|
||||
exit(4);
|
||||
}
|
||||
}
|
||||
/* fall through to... */
|
||||
case 4:
|
||||
{
|
||||
|
@ -2786,6 +3042,8 @@ build_instruction (doisa, features, mips16, insn)
|
|||
exit(6);
|
||||
}
|
||||
} else { /* normal memory transfer */
|
||||
if (!(features & FEATURE_IGEN))
|
||||
{
|
||||
if (!(insn->flags & COPROC) && ((datalen == 8) || ((datalen == 4) & (insn->flags & UNSIGNED))) && !proc64) {
|
||||
fprintf(stderr,"Operation not available with 32bit wide memory access \"%s\"\n",insn->name);
|
||||
exit(4);
|
||||
|
@ -2795,6 +3053,7 @@ build_instruction (doisa, features, mips16, insn)
|
|||
will mean adding a run-time check into the code
|
||||
sequence. */
|
||||
}
|
||||
}
|
||||
|
||||
if (isload) {
|
||||
#if 1 /* see the comments attached to LOADDRMASK above */
|
||||
|
@ -2808,14 +3067,22 @@ build_instruction (doisa, features, mips16, insn)
|
|||
printf(" unsigned int byte UNUSED;\n");
|
||||
|
||||
/* TODO: This should really also check for 32bit world performing 32bit access */
|
||||
if (datalen < 8) /* not for DOUBLEWORD or QUADWORD*/
|
||||
if (datalen < 8)
|
||||
/* not for DOUBLEWORD */
|
||||
/* start-sanitize-r5900 */
|
||||
/* not for QUADWORD */
|
||||
/* end-sanitize-r5900 */
|
||||
printf(" paddr = ((paddr & ~mask) | ((paddr & mask) ^ (reverse << shift)));\n");
|
||||
|
||||
printf(" LoadMemory(&memval,&memval1,uncached,%s,paddr,vaddr,isDATA,isREAL);\n",accesslength);
|
||||
|
||||
/* The following will only make sense if the
|
||||
"LoadMemory" above returns a DOUBLEWORD entity */
|
||||
if (datalen < 8) { /* not for DOUBLEWORD or QUADWORD*/
|
||||
if (datalen < 8) {
|
||||
/* not for DOUBLEWORD */
|
||||
/* start-sanitize-r5900 */
|
||||
/* not for QUADWORD */
|
||||
/* end-sanitize-r5900 */
|
||||
int valmask;
|
||||
switch (datalen) {
|
||||
case 1:
|
||||
|
@ -2905,10 +3172,13 @@ build_instruction (doisa, features, mips16, insn)
|
|||
else
|
||||
printf(" memval = ((uword64) op2 << (8 * byte));\n");
|
||||
} else if (datalen <= 8) { /* SD and SCD */
|
||||
if (! (features & FEATURE_IGEN))
|
||||
{
|
||||
if (!(insn->flags & COPROC) && ((datalen == 8) || ((datalen == 4) & (insn->flags & UNSIGNED))) && !proc64) {
|
||||
fprintf(stderr,"Operation not available with 32bit wide memory access \"%s\"\n",insn->name);
|
||||
exit(4);
|
||||
}
|
||||
}
|
||||
if (insn->flags & COPROC)
|
||||
printf(" memval = (uword64)COP_SD(%s,%s);\n",
|
||||
((insn->flags & REG)
|
||||
|
@ -4226,6 +4496,7 @@ main(argc,argv)
|
|||
{"fast", 0,0,'f'},
|
||||
{"help", 0,0,'h'},
|
||||
{"warnings",0,0,'w'},
|
||||
{"igen", 0,0,'i'},
|
||||
{0, 0,0,0}
|
||||
};
|
||||
|
||||
|
@ -4242,6 +4513,10 @@ main(argc,argv)
|
|||
features |= FEATURE_FAST;
|
||||
break;
|
||||
|
||||
case 'i' : /* igen formatted output */
|
||||
features |= FEATURE_IGEN;
|
||||
break;
|
||||
|
||||
case 'w' : /* warnings */
|
||||
features |= FEATURE_WARNINGS;
|
||||
/* TODO: Future extension: Allow better control over the warnings generated:
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue