opcodes/or1k: Regenerate opcodes
This picks up changes for: - new orfpx64a32 spec additions - new unordered instructions - symbol and documentation updates opcodes/ChangeLog: * or1k-asm.c: Regenerated. * or1k-desc.c: Regenerated. * or1k-desc.h: Regenerated. * or1k-dis.c: Regenerated. * or1k-ibld.c: Regenerated. * or1k-opc.c: Regenerated. * or1k-opc.h: Regenerated. * or1k-opinst.c: Regenerated.
This commit is contained in:
parent
a2e4218f23
commit
e4c4ac46e8
9 changed files with 1232 additions and 310 deletions
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@ -32,6 +32,21 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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#include "libiberty.h"
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/* -- opc.c */
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/* Special check to ensure that instruction exists for given machine. */
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int
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or1k_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
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{
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int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
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/* No mach attribute? Assume it's supported for all machs. */
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if (machs == 0)
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return 1;
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return ((machs & cd->machs) != 0);
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}
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/* -- */
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/* The hash functions are recorded here to help keep assembler code out of
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the disassembler and vice versa. */
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@ -149,31 +164,59 @@ static const CGEN_IFMT ifmt_lf_add_s ATTRIBUTE_UNUSED = {
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};
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static const CGEN_IFMT ifmt_lf_add_d ATTRIBUTE_UNUSED = {
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32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R1) }, { F (F_R1) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_add_d32 ATTRIBUTE_UNUSED = {
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32, 32, 0xfc0000ff, { { F (F_OPCODE) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_itof_s ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_itof_d ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_itof_d32 ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_ftoi_s ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_ftoi_d ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R1) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_eq_s ATTRIBUTE_UNUSED = {
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static const CGEN_IFMT ifmt_lf_ftoi_d32 ATTRIBUTE_UNUSED = {
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32, 32, 0xfc00f9ff, { { F (F_OPCODE) }, { F (F_R3) }, { F (F_RDD32) }, { F (F_RAD32) }, { F (F_RESV_8_1) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_sfeq_s ATTRIBUTE_UNUSED = {
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32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_sfeq_d ATTRIBUTE_UNUSED = {
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32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_sfeq_d32 ATTRIBUTE_UNUSED = {
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32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_cust1_s ATTRIBUTE_UNUSED = {
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32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_cust1_d ATTRIBUTE_UNUSED = {
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32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R1) }, { F (F_R1) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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32, 32, 0xffe007ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_R2) }, { F (F_R3) }, { F (F_RESV_10_3) }, { F (F_OP_7_8) }, { 0 } }
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};
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static const CGEN_IFMT ifmt_lf_cust1_d32 ATTRIBUTE_UNUSED = {
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32, 32, 0xffe004ff, { { F (F_OPCODE) }, { F (F_RESV_25_5) }, { F (F_RESV_10_1) }, { F (F_RAD32) }, { F (F_RBD32) }, { F (F_OP_7_8) }, { 0 } }
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};
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#undef F
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@ -791,6 +834,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_add_d, { 0xc8000010 }
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},
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/* lf.add.d $rDD32F,$rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_add_d32, { 0xc8000010 }
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},
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/* lf.sub.s $rDSF,$rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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@ -803,6 +852,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_add_d, { 0xc8000011 }
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},
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/* lf.sub.d $rDD32F,$rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_add_d32, { 0xc8000011 }
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},
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/* lf.mul.s $rDSF,$rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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@ -815,6 +870,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_add_d, { 0xc8000012 }
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},
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/* lf.mul.d $rDD32F,$rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_add_d32, { 0xc8000012 }
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},
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/* lf.div.s $rDSF,$rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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@ -827,6 +888,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_add_d, { 0xc8000013 }
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},
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/* lf.div.d $rDD32F,$rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_add_d32, { 0xc8000013 }
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},
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/* lf.rem.s $rDSF,$rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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@ -839,17 +906,29 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_add_d, { 0xc8000016 }
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},
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/* lf.rem.d $rDD32F,$rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_add_d32, { 0xc8000016 }
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},
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/* lf.itof.s $rDSF,$rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDSF), ',', OP (RA), 0 } },
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& ifmt_lf_itof_s, { 0xc8000004 }
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},
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/* lf.itof.d $rDSF,$rA */
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/* lf.itof.d $rDDF,$rA */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDSF), ',', OP (RA), 0 } },
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& ifmt_lf_itof_s, { 0xc8000014 }
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{ { MNEM, ' ', OP (RDDF), ',', OP (RA), 0 } },
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& ifmt_lf_itof_d, { 0xc8000014 }
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},
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/* lf.itof.d $rDD32F,$rADI */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDD32F), ',', OP (RADI), 0 } },
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& ifmt_lf_itof_d32, { 0xc8000014 }
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},
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/* lf.ftoi.s $rD,$rASF */
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{
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@ -863,77 +942,245 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
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{ { MNEM, ' ', OP (RD), ',', OP (RADF), 0 } },
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& ifmt_lf_ftoi_d, { 0xc8000015 }
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},
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/* lf.ftoi.d $rDDI,$rAD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RDDI), ',', OP (RAD32F), 0 } },
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& ifmt_lf_ftoi_d32, { 0xc8000015 }
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},
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/* lf.sfeq.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc8000008 }
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& ifmt_lf_sfeq_s, { 0xc8000008 }
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},
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/* lf.sfeq.d $rASF,$rBSF */
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/* lf.sfeq.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc8000018 }
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc8000018 }
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},
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/* lf.sfeq.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc8000018 }
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},
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/* lf.sfne.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc8000009 }
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& ifmt_lf_sfeq_s, { 0xc8000009 }
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},
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/* lf.sfne.d $rASF,$rBSF */
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/* lf.sfne.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc8000019 }
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc8000019 }
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},
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/* lf.sfne.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc8000019 }
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},
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/* lf.sfge.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800000b }
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& ifmt_lf_sfeq_s, { 0xc800000b }
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},
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/* lf.sfge.d $rASF,$rBSF */
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/* lf.sfge.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800001b }
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc800001b }
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},
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/* lf.sfge.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc800001b }
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},
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/* lf.sfgt.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800000a }
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& ifmt_lf_sfeq_s, { 0xc800000a }
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},
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/* lf.sfgt.d $rASF,$rBSF */
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/* lf.sfgt.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800001a }
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc800001a }
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},
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/* lf.sfgt.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc800001a }
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},
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/* lf.sflt.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800000c }
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& ifmt_lf_sfeq_s, { 0xc800000c }
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},
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/* lf.sflt.d $rASF,$rBSF */
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/* lf.sflt.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800001c }
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc800001c }
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},
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/* lf.sflt.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc800001c }
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},
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/* lf.sfle.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800000d }
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& ifmt_lf_sfeq_s, { 0xc800000d }
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},
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/* lf.sfle.d $rASF,$rBSF */
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/* lf.sfle.d $rADF,$rBDF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
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& ifmt_lf_sfeq_d, { 0xc800001d }
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},
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/* lf.sfle.d $rAD32F,$rBD32F */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
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& ifmt_lf_sfeq_d32, { 0xc800001d }
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},
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/* lf.sfueq.s $rASF,$rBSF */
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{
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{ 0, 0, 0, 0 },
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{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
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& ifmt_lf_eq_s, { 0xc800001d }
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& ifmt_lf_sfeq_s, { 0xc8000028 }
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},
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||||
/* lf.sfueq.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc8000038 }
|
||||
},
|
||||
/* lf.sfueq.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc8000038 }
|
||||
},
|
||||
/* lf.sfune.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc8000029 }
|
||||
},
|
||||
/* lf.sfune.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc8000039 }
|
||||
},
|
||||
/* lf.sfune.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc8000039 }
|
||||
},
|
||||
/* lf.sfugt.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc800002a }
|
||||
},
|
||||
/* lf.sfugt.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc800003a }
|
||||
},
|
||||
/* lf.sfugt.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc800003a }
|
||||
},
|
||||
/* lf.sfuge.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc800002b }
|
||||
},
|
||||
/* lf.sfuge.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc800003b }
|
||||
},
|
||||
/* lf.sfuge.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc800003b }
|
||||
},
|
||||
/* lf.sfult.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc800002c }
|
||||
},
|
||||
/* lf.sfult.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc800003c }
|
||||
},
|
||||
/* lf.sfult.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc800003c }
|
||||
},
|
||||
/* lf.sfule.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc800002d }
|
||||
},
|
||||
/* lf.sfule.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc800003d }
|
||||
},
|
||||
/* lf.sfule.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc800003d }
|
||||
},
|
||||
/* lf.sfun.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RASF), ',', OP (RBSF), 0 } },
|
||||
& ifmt_lf_sfeq_s, { 0xc800002e }
|
||||
},
|
||||
/* lf.sfun.d $rADF,$rBDF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_sfeq_d, { 0xc800003e }
|
||||
},
|
||||
/* lf.sfun.d $rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_sfeq_d32, { 0xc800003e }
|
||||
},
|
||||
/* lf.madd.s $rDSF,$rASF,$rBSF */
|
||||
{
|
||||
|
@ -947,6 +1194,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, ' ', OP (RDDF), ',', OP (RADF), ',', OP (RBDF), 0 } },
|
||||
& ifmt_lf_add_d, { 0xc8000017 }
|
||||
},
|
||||
/* lf.madd.d $rDD32F,$rAD32F,$rBD32F */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, ' ', OP (RDD32F), ',', OP (RAD32F), ',', OP (RBD32F), 0 } },
|
||||
& ifmt_lf_add_d32, { 0xc8000017 }
|
||||
},
|
||||
/* lf.cust1.s $rASF,$rBSF */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
|
@ -959,6 +1212,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
|
|||
{ { MNEM, 0 } },
|
||||
& ifmt_lf_cust1_d, { 0xc80000e0 }
|
||||
},
|
||||
/* lf.cust1.d */
|
||||
{
|
||||
{ 0, 0, 0, 0 },
|
||||
{ { MNEM, 0 } },
|
||||
& ifmt_lf_cust1_d32, { 0xc80000e0 }
|
||||
},
|
||||
};
|
||||
|
||||
#undef A
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue