x86-64/gas: fix an asymmetry in suffix/register checking

Without this, constructs like "orw %rax, (%rax)" aren't being rejected
(other than any other wrong suffix/register combination).

gas/
2013-11-04  Jan Beulich <jbeulich@suse.com>

	* config/tc-i386.c (check_long_reg): Correct comment indentation.
	(check_qword_reg): Correct comment and its indentation.
	(check_word_reg): Extend comment and correct its indentation. Also
	check for 64-bit register.

gas/testsuite/
2013-11-04  Jan Beulich <jbeulich@suse.com>

	* gas/i386/x86-64-suffix-bad.[sl]: New.
	* gas/i386/i386.exp: Run new test.
This commit is contained in:
Jan Beulich 2013-11-04 16:05:39 +01:00 committed by Jan Beulich
parent 67c059c29e
commit e4630f71b2
6 changed files with 49 additions and 5 deletions

View file

@ -5418,7 +5418,7 @@ check_long_reg (void)
i.suffix);
return 0;
}
/* Warn if the e prefix on a general reg is missing. */
/* Warn if the e prefix on a general reg is missing. */
else if ((!quiet_warnings || flag_code == CODE_64BIT)
&& i.types[op].bitfield.reg16
&& (i.tm.operand_types[op].bitfield.reg32
@ -5440,7 +5440,7 @@ check_long_reg (void)
register_prefix, i.op[op].regs->reg_name, i.suffix);
#endif
}
/* Warn if the r prefix on a general reg is missing. */
/* Warn if the r prefix on a general reg is present. */
else if (i.types[op].bitfield.reg64
&& (i.tm.operand_types[op].bitfield.reg32
|| i.tm.operand_types[op].bitfield.acc))
@ -5483,7 +5483,7 @@ check_qword_reg (void)
i.suffix);
return 0;
}
/* Warn if the e prefix on a general reg is missing. */
/* Warn if the r prefix on a general reg is missing. */
else if ((i.types[op].bitfield.reg16
|| i.types[op].bitfield.reg32)
&& (i.tm.operand_types[op].bitfield.reg32
@ -5528,9 +5528,10 @@ check_word_reg (void)
i.suffix);
return 0;
}
/* Warn if the e prefix on a general reg is present. */
/* Warn if the e or r prefix on a general reg is present. */
else if ((!quiet_warnings || flag_code == CODE_64BIT)
&& i.types[op].bitfield.reg32
&& (i.types[op].bitfield.reg32
|| i.types[op].bitfield.reg64)
&& (i.tm.operand_types[op].bitfield.reg16
|| i.tm.operand_types[op].bitfield.acc))
{