gdb/
* regformats/reg-tilegx.dat (name): Change abi name to "tilegx". * regformats/reg-tilegx32.dat: New. gdbserver/ * Makefile.in (clean): Remove reg-tilegx.c, reg-tilegx32.c. (reg-tilegx32.c): New rule. * configure.srv (tilegx-*-linux*): Add reg-tilegx32.o to srv_regobj. * linux-tile-low.c (tile_arch_setup): New function. Invoke different register info initializer according to elf class. (init_registers_tilgx32): New function. The tilegx32 register info initializer. (tile_fill_gregset): Use "uint_reg_t" to represent register size. (tile_store_gregset): Likewise.
This commit is contained in:
parent
4fcd89fc75
commit
e1f58301dd
6 changed files with 48 additions and 6 deletions
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@ -1,3 +1,8 @@
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2013-02-27 Jiong Wang <jiwang@tilera.com>
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* regformats/reg-tilegx.dat (name): Change abi name to "tilegx".
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* regformats/reg-tilegx32.dat: New.
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2013-02-27 Jiong Wang <jiwang@tilera.com>
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* configure.tgt (tilegx-*-linux*): Enable gdbserver.
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@ -1,3 +1,15 @@
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2013-02-27 Jiong Wang <jiwang@tilera.com>
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* Makefile.in (clean): Remove reg-tilegx.c, reg-tilegx32.c.
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(reg-tilegx32.c): New rule.
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* configure.srv (tilegx-*-linux*): Add reg-tilegx32.o to srv_regobj.
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* linux-tile-low.c (tile_arch_setup): New function. Invoke
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different register info initializer according to elf class.
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(init_registers_tilgx32): New function. The tilegx32 register info
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initializer.
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(tile_fill_gregset): Use "uint_reg_t" to represent register size.
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(tile_store_gregset): Likewise.
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2013-02-27 Yao Qi <yao@codesourcery.com>
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* server.c (process_point_options): Print debug message when
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@ -320,6 +320,7 @@ clean:
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rm -f reg-arm.c reg-bfin.c i386.c reg-ia64.c reg-m32r.c reg-m68k.c
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rm -f reg-sh.c reg-sparc.c reg-spu.c amd64.c i386-linux.c
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rm -f reg-cris.c reg-crisv32.c amd64-linux.c reg-xtensa.c
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rm -f reg-tilegx.c reg-tilegx32.c
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rm -f arm-with-iwmmxt.c
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rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c
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rm -f mips-linux.c mips64-linux.c
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@ -694,6 +695,8 @@ reg-xtensa.c : $(srcdir)/../regformats/reg-xtensa.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-xtensa.dat reg-xtensa.c
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reg-tilegx.c : $(srcdir)/../regformats/reg-tilegx.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-tilegx.dat reg-tilegx.c
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reg-tilegx32.c : $(srcdir)/../regformats/reg-tilegx32.dat $(regdat_sh)
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$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-tilegx32.dat reg-tilegx32.c
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#
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# Dependency tracking. Most of this is conditional on GNU Make being
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@ -333,6 +333,7 @@ case "${target}" in
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srv_linux_regsets=yes
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;;
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tilegx-*-linux*) srv_regobj=reg-tilegx.o
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srv_regobj="${srv_regobj} reg-tilegx32.o"
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srv_tgtobj="linux-low.o linux-tile-low.o linux-osdata.o linux-procfs.o"
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srv_tgtobj="${srv_tgtobj} linux-ptrace.o"
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srv_linux_regsets=yes
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@ -20,10 +20,13 @@
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#include "server.h"
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#include "linux-low.h"
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#include <arch/abi.h>
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#include <sys/ptrace.h>
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/* Defined in auto-generated file reg-tile.c. */
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void init_registers_tile (void);
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/* Defined in auto-generated file reg-tilegx.c. */
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void init_registers_tilegx (void);
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/* Defined in auto-generated file reg-tilegx32.c. */
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void init_registers_tilegx32 (void);
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#define tile_num_regs 65
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for (i = 0; i < tile_num_regs; i++)
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if (tile_regmap[i] != -1)
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collect_register (regcache, i, ((unsigned int *) buf) + tile_regmap[i]);
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collect_register (regcache, i, ((uint_reg_t *) buf) + tile_regmap[i]);
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}
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static void
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for (i = 0; i < tile_num_regs; i++)
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if (tile_regmap[i] != -1)
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supply_register (regcache, i, ((unsigned long *) buf) + tile_regmap[i]);
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supply_register (regcache, i, ((uint_reg_t *) buf) + tile_regmap[i]);
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}
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struct regset_info target_regsets[] =
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{ 0, 0, 0, -1, -1, NULL, NULL }
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};
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static void
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tile_arch_setup (void)
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{
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int pid = pid_of (get_thread_lwp (current_inferior));
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unsigned int machine;
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int is_elf64 = linux_pid_exe_is_elf_64_file (pid, &machine);
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if (sizeof (void *) == 4)
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if (is_elf64 > 0)
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error (_("Can't debug 64-bit process with 32-bit GDBserver"));
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if (!is_elf64)
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init_registers_tilegx32();
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else
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init_registers_tilegx();
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}
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struct linux_target_ops the_low_target =
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{
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init_registers_tile,
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tile_arch_setup,
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tile_num_regs,
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tile_regmap,
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NULL,
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@ -1,4 +1,4 @@
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name:tile
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name:tilegx
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expedite:sp,lr,pc
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64:r0
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64:r1
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