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* config/tc-mips.c (mips_set_options): Add ase_mcu.
	(mips_opts): Initialise ase_mcu to -1.
	(ISA_SUPPORTS_MCU_ASE): New macro.
	(MIPS_CPU_ASE_MCU): Likewise.
	(is_opcode_valid): Handle MCU.
	(macro_build, macro): Likewise.
	(validate_mips_insn, validate_micromips_insn): Likewise.
	(mips_ip): Likewise.
	(options): Add OPTION_MCU and OPTION_NO_MCU.
	(md_longopts): Add mmcu and mno-mcu.
	(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
	(mips_after_parse_args): Handle MCU.
	(s_mipsset): Likewise.
	(md_show_usage): Handle MCU options.

	* doc/as.texinfo: Document -mmcu and -mno-mcu options.
	* doc/c-mips.texi: Likewise, and document ".set mcu" and
	".set nomcu" directives.

	gas/testsuite/
	* gas/mips/micromips@mcu.d: New test.
	* gas/mips/mcu.d: Likewise.
	* gas/mips/mcu.s: New test source.
	* gas/mips/mips.exp: Run the new tests.

	include/opcode/
	* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
	(INSN_ASE_MASK): Add the MCU bit.
	(INSN_MCU): New macro.
	(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.

	opcodes/
	* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
	and "mips64r2".
	(print_insn_args, print_insn_micromips): Handle MCU.
	* micromips-opc.c (MC): New macro.
	(micromips_opcodes): Add "aclr", "aset" and "iret".
	* mips-opc.c (MC): New macro.
	(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
This commit is contained in:
Maciej W. Rozycki 2011-08-09 15:20:03 +00:00
parent 2b0c8b40ed
commit dec0624dcd
15 changed files with 532 additions and 13 deletions
Download patch file Download diff file Expand all files Collapse all files

20
opcodes/mips-dis.c
View file

@ -564,7 +564,7 @@ const struct mips_arch_choice mips_arch_choices[] =
{ "mips32r2", 1, bfd_mach_mipsisa32r2, CPU_MIPS32R2,
(ISA_MIPS32R2 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
| INSN_MIPS3D | INSN_MT),
| INSN_MIPS3D | INSN_MT | INSN_MCU),
mips_cp0_names_mips3264r2,
mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
mips_hwr_names_mips3264r2 },
@ -578,7 +578,7 @@ const struct mips_arch_choice mips_arch_choices[] =
{ "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2,
(ISA_MIPS64R2 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
| INSN_DSP64 | INSN_MT | INSN_MDMX),
| INSN_DSP64 | INSN_MT | INSN_MDMX | INSN_MCU),
mips_cp0_names_mips3264r2,
mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
mips_hwr_names_mips3264r2 },
@ -1170,6 +1170,18 @@ print_insn_args (const char *d,
(*info->fprintf_func) (info->stream, "%d", delta);
break;
case '~':
delta = (l >> OP_SH_OFFSET12) & OP_MASK_OFFSET12;
if (delta & 0x800)
delta |= ~0x7ff;
(*info->fprintf_func) (info->stream, "%d", delta);
break;
case '\\':
(*info->fprintf_func) (info->stream, "0x%lx",
(l >> OP_SH_3BITPOS) & OP_MASK_3BITPOS);
break;
case '\'':
(*info->fprintf_func) (info->stream, "0x%lx",
(l >> OP_SH_RDDSP) & OP_MASK_RDDSP);
@ -2388,6 +2400,10 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
iprintf (is, "0x%lx", GET_OP (insn, SHAMT));
break;
case '\\':
iprintf (is, "0x%lx", GET_OP (insn, 3BITPOS));
break;
case '|':
iprintf (is, "0x%lx", GET_OP (insn, TRAP));
break;