Delete PowerPC macro insn support

Let's hope this stays dead, but it's here as a patch separate from
those that removed use of powerpc_macros just in case it needs to be
resurrected.

include/
	* opcode/ppc.h (struct powerpc_macro): Delete declaration.
	(powerpc_macros, powerpc_num_macros): Likewise..
opcodes/
	* ppc-opc.c (powerpc_macros, powerpc_num_macros): Delete.
gas/
	* config/tc-ppc.c (ppc_macro): Delete function.
	(ppc_macro_hash): Delete.
	(ppc_setup_opcodes, md_assemble): Delete macro support.
This commit is contained in:
Alan Modra 2022-03-16 10:08:46 +10:30
parent 8736318e4e
commit dc3ff92676
3 changed files with 3 additions and 155 deletions

View file

@ -85,7 +85,6 @@ static int set_target_endian = 0;
static bool reg_names_p = TARGET_REG_NAMES_P; static bool reg_names_p = TARGET_REG_NAMES_P;
static void ppc_macro (char *, const struct powerpc_macro *);
static void ppc_byte (int); static void ppc_byte (int);
#if defined (OBJ_XCOFF) || defined (OBJ_ELF) #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
@ -980,9 +979,6 @@ static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
/* Opcode hash table. */ /* Opcode hash table. */
static htab_t ppc_hash; static htab_t ppc_hash;
/* Macro hash table. */
static htab_t ppc_macro_hash;
#ifdef OBJ_ELF #ifdef OBJ_ELF
/* What type of shared library support to use. */ /* What type of shared library support to use. */
static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
@ -1617,22 +1613,18 @@ insn_validate (const struct powerpc_opcode *op)
return false; return false;
} }
/* Insert opcodes and macros into hash tables. Called at startup and /* Insert opcodes into hash tables. Called at startup and for
for .machine pseudo. */ .machine pseudo. */
static void static void
ppc_setup_opcodes (void) ppc_setup_opcodes (void)
{ {
const struct powerpc_opcode *op; const struct powerpc_opcode *op;
const struct powerpc_opcode *op_end; const struct powerpc_opcode *op_end;
const struct powerpc_macro *macro;
const struct powerpc_macro *macro_end;
bool bad_insn = false; bool bad_insn = false;
if (ppc_hash != NULL) if (ppc_hash != NULL)
htab_delete (ppc_hash); htab_delete (ppc_hash);
if (ppc_macro_hash != NULL)
htab_delete (ppc_macro_hash);
/* Insert the opcodes into a hash table. */ /* Insert the opcodes into a hash table. */
ppc_hash = str_htab_create (); ppc_hash = str_htab_create ();
@ -1839,19 +1831,6 @@ ppc_setup_opcodes (void)
str_hash_insert (ppc_hash, op->name, op, 0); str_hash_insert (ppc_hash, op->name, op, 0);
} }
/* Insert the macros into a hash table. */
ppc_macro_hash = str_htab_create ();
macro_end = powerpc_macros + powerpc_num_macros;
for (macro = powerpc_macros; macro < macro_end; macro++)
if (((macro->flags & ppc_cpu) != 0
|| (ppc_cpu & PPC_OPCODE_ANY) != 0)
&& str_hash_insert (ppc_macro_hash, macro->name, macro, 0) != NULL)
{
as_bad (_("duplicate %s"), macro->name);
bad_insn = true;
}
if (bad_insn) if (bad_insn)
abort (); abort ();
} }
@ -3292,15 +3271,7 @@ md_assemble (char *str)
opcode = (const struct powerpc_opcode *) str_hash_find (ppc_hash, str); opcode = (const struct powerpc_opcode *) str_hash_find (ppc_hash, str);
if (opcode == (const struct powerpc_opcode *) NULL) if (opcode == (const struct powerpc_opcode *) NULL)
{ {
const struct powerpc_macro *macro; as_bad (_("unrecognized opcode: `%s'"), str);
macro = (const struct powerpc_macro *) str_hash_find (ppc_macro_hash,
str);
if (macro == (const struct powerpc_macro *) NULL)
as_bad (_("unrecognized opcode: `%s'"), str);
else
ppc_macro (s, macro);
ppc_clear_labels (); ppc_clear_labels ();
return; return;
} }
@ -4133,85 +4104,6 @@ md_assemble (char *str)
fixP->fx_pcrel_adjust = fixups[i].opindex; fixP->fx_pcrel_adjust = fixups[i].opindex;
} }
} }
/* Handle a macro. Gather all the operands, transform them as
described by the macro, and call md_assemble recursively. All the
operands are separated by commas; we don't accept parentheses
around operands here. */
static void
ppc_macro (char *str, const struct powerpc_macro *macro)
{
char *operands[10];
unsigned int count;
char *s;
unsigned int len;
const char *format;
unsigned int arg;
char *send;
char *complete;
/* Gather the users operands into the operands array. */
count = 0;
s = str;
while (1)
{
if (count >= sizeof operands / sizeof operands[0])
break;
operands[count++] = s;
s = strchr (s, ',');
if (s == (char *) NULL)
break;
*s++ = '\0';
}
if (count != macro->operands)
{
as_bad (_("wrong number of operands"));
return;
}
/* Work out how large the string must be (the size is unbounded
because it includes user input). */
len = 0;
format = macro->format;
while (*format != '\0')
{
if (*format != '%')
{
++len;
++format;
}
else
{
arg = strtol (format + 1, &send, 10);
know (send != format && arg < count);
len += strlen (operands[arg]);
format = send;
}
}
/* Put the string together. */
complete = s = XNEWVEC (char, len + 1);
format = macro->format;
while (*format != '\0')
{
if (*format != '%')
*s++ = *format++;
else
{
arg = strtol (format + 1, &send, 10);
strcpy (s, operands[arg]);
s += strlen (s);
format = send;
}
}
*s = '\0';
/* Assemble the constructed instruction. */
md_assemble (complete);
free (complete);
}
#ifdef OBJ_ELF #ifdef OBJ_ELF
/* For ELF, add support for SHT_ORDERED. */ /* For ELF, add support for SHT_ORDERED. */

View file

@ -453,32 +453,6 @@ extern const unsigned int num_powerpc_operands;
#define PPC_OPERAND_FSL (0x800000) #define PPC_OPERAND_FSL (0x800000)
#define PPC_OPERAND_FCR (0x1000000) #define PPC_OPERAND_FCR (0x1000000)
#define PPC_OPERAND_UDI (0x2000000) #define PPC_OPERAND_UDI (0x2000000)
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an
array of struct powerpc_macro. */
struct powerpc_macro
{
/* The macro name. */
const char *name;
/* The number of operands the macro takes. */
unsigned int operands;
/* One bit flags for the opcode. These are used to indicate which
specific processors support the instructions. The values are the
same as those for the struct powerpc_opcode flags field. */
ppc_cpu_t flags;
/* A format string to turn the macro into a normal instruction.
Each %N in the string is replaced with operand number N (zero
based). */
const char *format;
};
extern const struct powerpc_macro powerpc_macros[];
extern const int powerpc_num_macros;
extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, ppc_cpu_t *, const char *); extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, ppc_cpu_t *, const char *);

View file

@ -10504,24 +10504,6 @@ const struct powerpc_opcode vle_opcodes[] = {
const unsigned int vle_num_opcodes = const unsigned int vle_num_opcodes =
sizeof (vle_opcodes) / sizeof (vle_opcodes[0]); sizeof (vle_opcodes) / sizeof (vle_opcodes[0]);
/* The macro table. This is only used by the assembler. */
/* The expressions of the form (-x ! 31) & (x | 31) have the value 0
when x=0; 32-x when x is between 1 and 31; are negative if x is
negative; and are 32 or more otherwise. This is what you want
when, for instance, you are emulating a right shift by a
rotate-left-and-mask, because the underlying instructions support
shifts of size 0 but not shifts of size 32. By comparison, when
extracting x bits from some word you want to use just 32-x, because
the underlying instructions don't support extracting 0 bits but do
support extracting the whole word (32 bits in this case). */
const struct powerpc_macro powerpc_macros[] = {
};
const int powerpc_num_macros =
sizeof (powerpc_macros) / sizeof (powerpc_macros[0]);
/* SPE v2 instruction set from SPE2PIM Rev. 2 08/2011 */ /* SPE v2 instruction set from SPE2PIM Rev. 2 08/2011 */
const struct powerpc_opcode spe2_opcodes[] = { const struct powerpc_opcode spe2_opcodes[] = {