* Contribute Hitachi SH5 simulator.

sim/testsuite/sim/sh64/ChangeLog

@@ -0,0 +1,21 @@
+2001-01-06  Ben Elliston  <bje@redhat.com>
+
+	* misc/fr-dr.s: New test.
+
+2001-01-03  Ben Elliston  <bje@redhat.com>
+
+	* interwork.exp: Match .s files only.
+
+2000-12-06  Ben Elliston  <bje@redhat.com>
+
+	* interwork.exp: New test case.
+
+2000-11-16  Ben Elliston  <bje@redhat.com>
+
+	* allinsn.exp: Rename from this ..
+	* compact.exp: .. to this.
+	* media.exp: New test case.
+
+2000-11-13  Ben Elliston  <bje@redhat.com>
+
+	* allinsn.exp: New test case.

sim/testsuite/sim/sh64/compact.exp

@@ -0,0 +1,19 @@
+# SHcompact testsuite.
+
+if [istarget sh64-*-*] {
+    # load support procs (none yet)
+    # load_lib cgen.exp
+
+    # all machines
+    set all_machs "sh5"
+
+    # The .cgs suffix is for "cgen .s".
+    foreach src [lsort [glob -nocomplain $srcdir/$subdir/compact/*.cgs]] {
+       # If we're only testing specific files and this isn't one of them,
+       # skip it.
+       if ![runtest_file_p $runtests $src] {
+  	  continue
+	}
+    run_sim_test $src $all_machs
+    }
+}

sim/testsuite/sim/sh64/compact/ChangeLog

@@ -0,0 +1,26 @@
+2002-01-09  Ben Elliston  <bje@redhat.com>
+
+	* macl.cgs: For good measure, clear the S bit at startup.
+
+2001-01-11  Ben Elliston  <bje@redhat.com>
+
+	* fmov.cgs (f13b): Compare R0 with R1, not R2, when testing that
+	the source register was correctly post-incremented.
+
+2000-12-01  Ben Elliston  <bje@redhat.com>
+
+	* *.cgs (ld): Link tests with -m shelf32.
+
+2000-11-24  Ben Elliston  <bje@redhat.com>
+
+	* fmov.cgs: New test case.
+	* ftrv.cgs: Populate the matrix with meaningful values.
+
+2000-11-22  Ben Elliston  <bje@redhat.com>
+
+	* *.cgs (as): Assemble tests with -isa=shcompact.
+
+2000-11-16  Ben Elliston  <bje@redhat.com>
+
+	* *.cgs: New test cases.
+

sim/testsuite/sim/sh64/compact/add.cgs

@@ -0,0 +1,55 @@
+# sh testcase for add $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+init:
+	# Initialise some registers with values which help us to verify
+	# that the correct source registers are used by the ADD instruction.
+	mov #0, r0
+	mov #1, r1
+	mov #2, r2
+	mov #3, r3
+	mov #5, r5
+	mov #15, r15
+
+add:	
+	# 0 + 0 = 0.
+	add r0, r0
+	assert r0, #0
+
+	# 0 + 1 = 1.
+	add r0, r1
+	assert r1, #1
+
+	# 1 + 2 = 3.
+	add r1, r2
+	assert r2, #3
+
+	# 3 + 5 = 8.
+	add r3, r5
+	assert r5, #8
+	
+	# 8 + 8 = 16.
+	add r5, r5
+	assert r5, #16
+
+	# 15 + 1 = 16.
+	add r15, r1
+	assert r1, #16
+
+neg:
+	mov #1, r0
+	neg r0, r0
+	mov #2, r1
+	add r0, r1
+	assert r1, #1
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/addc.cgs

@@ -0,0 +1,90 @@
+# sh testcase for addc $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	# Initialise some registers with values which help us to verify
+	# that the correct source registers are used by the ADDC instruction.
+
+	.macro init
+	mov #0, r0
+	mov #1, r1
+	mov #2, r2
+	mov #3, r3
+	mov #5, r5
+	mov #15, r15
+	.endm
+	
+	start
+
+	init
+add:
+	clrt
+	addc r0, r0
+	assert r0, #0
+	clrt
+	addc r0, r1
+	assert r1, #1
+	clrt
+	addc r1, r2
+	assert r2, #3
+	clrt
+	addc r3, r5
+	assert r5, #8
+	clrt
+	addc r5, r5
+	assert r5, #16
+	clrt
+	addc r15, r1
+	assert r1, #16
+
+	init
+addt:
+	sett
+	addc r0, r0
+	assert r0, #1
+	sett
+	addc r0, r1
+	assert r1, #3
+	sett
+	addc r1, r2
+	assert r2, #6
+	sett
+	addc r3, r5
+	assert r5, #9
+	sett
+	addc r5, r5
+	assert r5, #19
+	sett
+	addc r15, r1
+	assert r1, #19
+
+	bra next
+	nop
+
+wrong:
+	fail
+
+next:
+	init
+large:
+	clrt
+	mov #1, r0
+	neg r0, r0
+	mov #2, r1
+	addc r0, r1
+	assert r1, #1
+
+	init
+larget:
+	sett
+	mov #1, r0
+	neg r0, r0
+	mov #2, r1
+	addc r0, r1
+	assert r1, #2
+
+okay:	
+	pass

sim/testsuite/sim/sh64/compact/addi.cgs

@@ -0,0 +1,46 @@
+# sh testcase for add #$imm8, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+init:
+	# Initialise some registers with values which help us to verify
+	# that the correct source registers are used by the ADD instruction.
+	mov #0, r0
+	mov #1, r1
+	mov #2, r2
+	mov #3, r3
+	mov #5, r5
+	mov #15, r15
+
+addi:
+	# 0 + 0 = 0.
+	add #0, r0
+	assert r0, #0
+
+	# 0 + 1 = 1.
+	add #0, r1
+	assert r1, #1
+
+	# 2 + 2 = 4.
+	add #2, r2
+	assert r2, #4
+
+	# 120 + 5 = 125.
+	add #120, r5
+	assert r5, #125
+
+large:
+	mov #1, r0
+	neg r0, r0
+	add #2, r0
+	assert r0, #1
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/addv.cgs

@@ -0,0 +1,48 @@
+# sh testcase for addv $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+zero:
+	mov #0, r0
+	mov #0, r1
+	addv r0, r1
+	# Assert !T and #0.
+	bt wrong
+	assert r1, #0
+
+one:
+	mov #0, r0
+	mov #1, r1
+	addv r0, r1
+	# Assert !T and #1.
+	bt wrong
+	assert r1, #1
+
+large:
+	# Produce MAXINT in R0.
+	mov #0, r0
+	not r0, r0
+	shlr r0
+
+	# Put #3 into R1.
+	mov #3, r1
+
+	# Add them and overflow.
+	addv r0, r1
+
+	# Assert T and overflowed value.
+	bf wrong
+	mov #1, r7
+	rotr r7
+	add #2, r7
+	cmp/eq r1, r7
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/and.cgs

@@ -0,0 +1,33 @@
+# sh testcase for and $rm64, $rn64 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global and
+and:
+	mov #1, r1
+	mov #7, r2
+	rotr r2
+	rotr r2
+	and r1, r2
+
+	# R1 & R2 = 1.
+	assert r2, #1
+
+another:
+	mov #192, r1
+	mov #0, r2
+	and r1, r2
+
+	# R1 & R2 = 0.
+	assert r2, #0
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/andb.cgs

@@ -0,0 +1,24 @@
+# sh testcase for and.b #$imm8, @(r0, gbr) -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global orb
+init:
+	# Init GBR and R0.
+	mov #30, r0
+	ldc r0, gbr	
+	mov #40, r0
+
+orb:
+	and.b #255, @(r0, gbr)
+	and.b #170, @(r0, gbr)
+	and.b #255, @(r0, gbr)
+	and.b #0, @(r0, gbr)
+
+okay:
+	pass

sim/testsuite/sim/sh64/compact/andi.cgs

@@ -0,0 +1,43 @@
+# sh testcase for and #$imm8, r0 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global andi
+andi:
+	mov #0, r0
+	or #255, r0
+	and #0, r0
+	assert r0, #0
+
+large:
+	mov #0, r0
+	or #255, r0
+	shll8 r0
+	or #255, r0
+	shll8 r0
+	or #255, r0
+	shll8 r0
+	or #255, r0
+
+mask:
+	and #255, r0
+	mov r0, r1
+	mov #0, r0
+	or #255, r0
+	cmp/eq r0, r1
+	bf wrong
+
+mask0:
+	and #0, r0
+	assert r0, #0
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/bf.cgs

@@ -0,0 +1,24 @@
+# sh testcase for bf $disp8 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global taken
+taken:
+	clrt
+	bf ntaken
+	fail
+	.global ntaken
+ntaken:
+	sett
+	bf bad
+	pass
+bad:
+	fail
+	fail
+	fail
+	fail

sim/testsuite/sim/sh64/compact/bfs.cgs

@@ -0,0 +1,28 @@
+# sh testcase for bf/s $disp8 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global taken
+taken:
+	clrt
+	bf/s ntaken
+slot1:
+	nop
+	fail
+	.global ntaken
+ntaken:
+	sett
+	bf/s bad
+slot2:
+	nop
+	pass
+bad:
+	fail
+	fail
+	fail
+	fail

sim/testsuite/sim/sh64/compact/bra.cgs

@@ -0,0 +1,23 @@
+# sh testcase for bra $disp12 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global bra
+bra:
+	bra okay
+slot:
+	nop
+bad:
+	fail
+	fail
+	fail
+	.global okay
+okay:
+	pass
+	fail
+

sim/testsuite/sim/sh64/compact/braf.cgs

@@ -0,0 +1,24 @@
+# sh testcase for braf $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global braf
+braf:
+	mov #4, r0
+	braf r0
+slot:
+	nop
+bad:
+	fail
+	fail
+okay:
+	pass
+alsobad:
+	fail
+	fail
+	fail

sim/testsuite/sim/sh64/compact/brk.cgs

@@ -0,0 +1,18 @@
+# sh testcase for brk -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	.global brk
+brk:
+	# If we hit the breakpoint, the sim will stop.
+	pass
+
+	# FIXME: breakpoint instruction.
+	# The SH4 assembler doesn't know about "brk".
+	.word 0x003b
+bad:
+	fail

sim/testsuite/sim/sh64/compact/bsr.cgs

@@ -0,0 +1,21 @@
+# sh testcase for bsr $disp12 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global bsr
+bsr:
+	bsr okay
+slot:
+	nop
+bad:
+	fail
+	fail
+okay:
+	pass
+alsobad:
+	fail

sim/testsuite/sim/sh64/compact/bsrf.cgs

@@ -0,0 +1,22 @@
+# sh testcase for bsrf $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+bsrf:
+	mov #4, r0
+	bsrf r0
+slot:
+	nop
+bad:
+	fail
+	fail
+okay:
+	pass
+alsobad:
+	fail
+	fail

sim/testsuite/sim/sh64/compact/bt.cgs

@@ -0,0 +1,24 @@
+# sh testcase for bt $disp8
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global taken
+taken:
+	sett
+	bt ntaken
+	fail
+	.global ntaken
+ntaken:
+	clrt
+	bt bad
+	pass
+bad:
+	fail
+	fail
+	fail
+	fail

sim/testsuite/sim/sh64/compact/bts.cgs

@@ -0,0 +1,28 @@
+# sh testcase for bt/s $disp8 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global taken
+taken:
+	sett
+	bt/s ntaken
+slot1:
+	nop
+	fail
+	.global ntaken
+ntaken:
+	clrt
+	bt/s bad
+slot2:
+	nop
+	pass
+bad:
+	fail
+	fail
+	fail
+	fail

sim/testsuite/sim/sh64/compact/clrmac.cgs

@@ -0,0 +1,13 @@
+# sh testcase for clrmac -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global clrmac
+clrmac:
+	clrmac
+	pass

sim/testsuite/sim/sh64/compact/clrs.cgs

@@ -0,0 +1,14 @@
+# sh testcase for clrs -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global clrs
+clrs:
+	clrs
+	# Somehow ensure that S is set.
+	pass

sim/testsuite/sim/sh64/compact/clrt.cgs

@@ -0,0 +1,16 @@
+# sh testcase for clrt -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global clrt
+clrt:
+	clrt
+	bt wrong
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmpeq.cgs

@@ -0,0 +1,52 @@
+# sh testcase for cmp/eq $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zeroes:
+	mov #0, r1
+	mov #0, r2
+	cmp/eq r1, r2
+	bf wrong
+
+zero1:
+	mov #0, r1
+	mov #1, r2
+	cmp/eq r1, r2
+	bt wrong
+	
+zero2:
+	mov #0, r2
+	mov #1, r1
+	cmp/eq r2, r1
+	bt wrong
+	
+equal:
+	mov #192, r1
+	mov #192, r2
+	cmp/eq r1, r2
+	bf wrong
+	
+noteq:
+	mov #192, r1
+	mov #193, r2
+	cmp/eq r1, r2
+	bt wrong
+	
+large:
+	mov #1, r1
+	rotr r1
+	mov #1, r2
+	rotr r2
+	cmp/eq r1, r2
+	bf wrong
+	
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmpeqi.cgs

@@ -0,0 +1,39 @@
+# sh testcase for cmp/eq #$imm8, r0 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zeroes:
+	mov #0, r0
+	cmp/eq #0, r0
+	bf wrong
+	
+zero1:
+	mov #0, r0
+	cmp/eq #1, r0
+	bt wrong
+	
+zero2:
+	mov #1, r0
+	cmp/eq #0, r0
+	bt wrong
+	
+equal:
+	mov #192, r0
+	cmp/eq #192, r0
+	bf wrong
+	
+sign:
+	mov #255, r0
+	cmp/eq #255, r0
+	bf wrong
+	
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmpge.cgs

@@ -0,0 +1,69 @@
+# sh testcase for cmp/ge $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	mov #0, r1
+	cmp/ge r0, r1
+	bf wrong
+
+onezero:
+	mov #1, r0
+	mov #0, r1
+	cmp/ge r0, r1
+	bt wrong
+
+zeroone:
+	mov #0, r0
+	mov #1, r1
+	cmp/ge r0, r1
+	bf wrong
+
+equal:
+	mov #192, r0
+	mov #192, r1
+	cmp/ge r0, r1
+	bf wrong
+
+eqlarge:
+	mov #1, r0
+	rotr r0
+	add #85, r0
+	mov #1, r1
+	rotr r1
+	add #85, r1
+	cmp/ge r0, r1
+	bf wrong
+
+large2:
+	mov #1, r0
+	rotr r0
+	add #85, r0
+	mov #1, r1
+	rotr r1
+	add #84, r1
+	cmp/ge r0, r1
+	bt wrong
+
+large3:
+	mov #1, r0
+	rotr r0
+	add #84, r0
+	mov #1, r1
+	rotr r1
+	add #85, r1
+	cmp/ge r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/cmpgt.cgs

@@ -0,0 +1,69 @@
+# sh testcase for cmp/gt $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	mov #0, r1
+	cmp/gt r0, r1
+	bt wrong
+
+onezero:
+	mov #1, r0
+	mov #0, r1
+	cmp/gt r0, r1
+	bt wrong
+
+zeroone:
+	mov #0, r0
+	mov #1, r1
+	cmp/gt r0, r1
+	bf wrong
+	
+equal:
+	mov #192, r0
+	mov #192, r1
+	cmp/gt r0, r1
+	bt wrong
+
+eqlarge:
+	mov #1, r0
+	rotr r0
+	add #85, r0
+	mov #1, r1
+	rotr r1
+	add #85, r1
+	cmp/gt r0, r1
+	bt wrong
+	
+large2:
+	mov #1, r0
+	rotr r0
+	add #85, r0
+	mov #1, r1
+	rotr r1
+	add #84, r1
+	cmp/gt r0, r1
+	bt wrong
+
+large3:
+	mov #1, r0
+	rotr r0
+	add #84, r0
+	mov #1, r1
+	rotr r1
+	add #85, r1
+	cmp/gt r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/cmphi.cgs

@@ -0,0 +1,68 @@
+# sh testcase for cmp/hi $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	mov #0, r0
+	cmp/hi r0, r1
+	bt wrong
+
+equal:
+	mov #1, r0
+	rotr r0
+	add #3, r0
+
+	mov #1, r1
+	rotr r1
+	add #3, r1
+
+	cmp/hi r0, r1
+	bt wrong
+
+gt:
+	mov #10, r0
+	mov #12, r1
+	cmp/hi r0, r1
+	bf wrong
+
+lt:
+	mov #12, r0
+	mov #10, r1
+	cmp/hi r0, r1
+	bt wrong
+
+gtneg:
+	mov #1, r0
+	rotr r0
+	add #1, r0
+
+	mov #1, r1
+	rotr r1
+	add #3, r1
+
+	cmp/hi r0, r1
+	bf wrong
+
+ltneg:
+	mov #1, r0
+	rotr r0
+	add #3, r0
+	
+	mov #1, r1
+	rotr r1
+	add #1, r1
+
+	cmp/hi r0, r1
+	bt wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmphs.cgs

@@ -0,0 +1,59 @@
+# sh testcase for cmp/hs $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	mov #0, r0
+	cmp/hs r0, r1
+
+equal:
+	mov #1, r0
+	rotr r0
+	add #3, r0
+
+	mov #1, r1
+	rotr r1
+	add #3, r1
+
+	cmp/hs r0, r1
+
+gt:
+	mov #10, r0
+	mov #12, r1
+	cmp/hs r0, r1
+
+lt:
+	mov #12, r0
+	mov #10, r1
+	cmp/hs r0, r1
+
+gtneg:
+	mov #1, r0
+	rotr r0
+	add #1, r0
+
+	mov #1, r1
+	rotr r1
+	add #3, r1
+
+	cmp/hs r0, r1
+
+ltneg:
+	mov #1, r0
+	rotr r0
+	add #3, r0
+	
+	mov #1, r1
+	rotr r1
+	add #1, r1
+
+	cmp/hs r0, r1
+
+okay:
+	pass

sim/testsuite/sim/sh64/compact/cmppl.cgs

@@ -0,0 +1,37 @@
+# sh testcase for cmp/pl $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	cmp/pl r0
+	bt wrong
+
+plus:
+	mov #10, r0
+	cmp/pl r0
+	bf wrong
+
+minus:
+	mov #10, r0
+	neg r0, r0
+	cmp/pl r0
+	bt wrong
+
+large:
+	mov #10, r0
+	shll8 r0
+	add #123, r0
+	cmp/pl r0
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmppz.cgs

@@ -0,0 +1,37 @@
+# sh testcase for cmp/pz $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+zero:
+	mov #0, r0
+	cmp/pz r0
+	bf wrong
+
+plus:
+	mov #10, r0
+	cmp/pz r0
+	bf wrong
+
+minus:
+	mov #10, r0
+	neg r0, r0
+	cmp/pz r0
+	bt wrong
+
+large:
+	mov #10, r0
+	shll8 r0
+	add #123, r0
+	cmp/pz r0
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/cmpstr.cgs

@@ -0,0 +1,148 @@
+# sh testcase for cmp/str $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+.macro rot8
+	rotr r0
+	rotr r0
+	rotr r0
+	rotr r0
+	rotr r0
+	rotr r0
+	rotr r0
+	rotr r0
+.endm
+
+	start
+
+# Use multiple "wrong" labels because this program is quite long. It's
+# likely that some instructions will be too far away from the branch
+# target to use PC-relative branches.
+	
+match0:
+	# No bytes matching.
+	mov #1, r0
+	neg r0, r0
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	mov r0, r1
+	mov #1, r0
+	neg r0, r0
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	cmp/str r0, r1
+	bt wrong0
+
+	bra match1
+	nop
+wrong0:
+	fail
+
+match1:
+	# One byte matching.
+	mov #1, r0
+	neg r0, r0
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	mov r0, r1
+	mov #1, r0
+	neg r0, r0
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	cmp/str r0, r1
+	bf wrong1
+
+	bra match2
+	nop
+wrong1:
+	fail
+
+match2:
+	# Two bytes matching.
+	mov #1, r0
+	neg r0, r0
+	xor #170, r0
+	rot8
+	xor #170, r0
+	rot8
+	mov r0, r1
+	mov #1, r0
+	neg r0, r0
+	xor #85, r0
+	rot8
+	xor #85, r0
+	rot8
+	cmp/str r0, r1
+	bf wrong2
+
+	bra match3
+	nop
+wrong2:
+	fail
+	
+byte0:
+match3:
+	# One byte matching.
+	# This is also the test for byte 0.
+	mov #85, r0
+	mov #85, r1
+	cmp/str r0, r1
+	bf wrong3
+
+byte1:
+	# Match in byte position 1.
+	mov #85, r0
+	shll8 r0
+	mov #85, r1
+	shll8 r1
+	cmp/str r0, r1
+	bf wrong3
+
+byte2:
+	# Match in byte position 2.
+	mov #85, r0
+	shll16 r0
+	mov #85, r1
+	shll16 r1
+	cmp/str r0, r1
+	bf wrong3
+
+byte3:
+	# Match in byte position 3.
+	mov #85, r0
+	shll16 r0
+	shll8 r0
+	mov #85, r1
+	shll16 r1
+	shll8 r1
+	cmp/str r0, r1
+	bf wrong3
+
+okay:
+	pass
+wrong3:
+	fail
+	

sim/testsuite/sim/sh64/compact/div0s.cgs

@@ -0,0 +1,52 @@
+# sh testcase for div0s $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+init:
+	mov #0, r0
+	mov #3, r1
+	mov #4, r2
+	neg r1, r3
+	neg r2, r4
+
+perm1:
+	div0s r0, r0
+	bt wrong
+	div0s r0, r1
+	bt wrong
+	div0s r1, r0
+	bt wrong
+
+perm2:
+	div0s r0, r4
+	bf wrong
+	div0s r4, r0
+	bf wrong
+
+perm3:
+	div0s r1, r2
+	bt wrong
+	div0s r2, r1
+	bt wrong
+
+perm4:
+	div0s r3, r4
+	bt wrong
+	div0s r4, r3
+	bt wrong
+
+perm5:
+	div0s r1, r1
+	bt wrong
+	div0s r3, r3
+	bt wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/div0u.cgs

@@ -0,0 +1,21 @@
+# sh testcase for div0u -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global div0u
+div0u:
+	div0u
+	# Can't easily test Q and M (other than visually inspecting
+	# the simulator's trace output).
+	bt wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/div1.cgs

@@ -0,0 +1,52 @@
+# sh testcase for div1 $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #10, r0
+	mov #2, r1
+	div0s r0,r1
+
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+	div1 r0, r1
+
+	pass

sim/testsuite/sim/sh64/compact/dmulsl.cgs

@@ -0,0 +1,115 @@
+# sh testcase for dmuls.l $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	mov #0, r0
+	mov #0, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #0
+
+test2:	
+	mov #0, r0
+	mov #5, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #0
+
+test3:	
+	mov #5, r0
+	mov #0, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #0
+
+test4:	
+	mov #1, r0
+	mov #5, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #5
+
+test5:	
+	mov #5, r0
+	mov #1, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #5
+
+	bra test6
+	nop
+
+wrong:
+	fail
+
+test6:	
+	mov #2, r0
+	mov #2, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #4
+
+test7:	
+	mov #1, r0
+	neg r0, r0
+	mov #2, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+
+	mov #0, r8
+	not r8, r9
+	not r8, r10
+	shll r10
+	cmp/eq r3, r9
+	bf wrong
+	cmp/eq r4, r10
+	bf wrong
+
+test8:	
+	mov #1, r0
+	neg r0, r0
+	mov #1, r1
+	neg r1, r1
+	dmuls.l r0, r1
+	# check result
+	sts mach, r3
+	sts macl, r4
+	assert r3, #0
+	assert r4, #1
+
+test9:	
+	mov #1, r0
+	neg r0, r0
+	shlr r0
+	mov #1, r1
+	neg r1, r1
+	shlr r1
+	dmuls.l r0, r1
+	
+okay:	
+	pass

sim/testsuite/sim/sh64/compact/dmulul.cgs

@@ -0,0 +1,53 @@
+# sh testcase for dmulu.l $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	mov #0, r0
+	mov #0, r1
+	dmulu.l r0, r1
+
+	mov #0, r0
+	mov #5, r1
+	dmulu.l r0, r1
+
+	mov #5, r0
+	mov #0, r1
+	dmulu.l r0, r1
+
+	mov #1, r0
+	mov #5, r1
+	dmulu.l r0, r1
+
+	mov #5, r0
+	mov #1, r1
+	dmulu.l r0, r1
+
+	mov #2, r0
+	mov #2, r1
+	dmulu.l r0, r1
+
+	mov #1, r0
+	neg r0, r0
+	mov #2, r1
+	dmulu.l r0, r1
+
+	mov #1, r0
+	neg r0, r0
+	mov #1, r1
+	neg r1, r1
+	dmulu.l r0, r1
+
+	mov #1, r0
+	neg r0, r0
+	shlr r0
+	mov #1, r1
+	neg r1, r1
+	shlr r1
+	dmulu.l r0, r1
+
+	pass

sim/testsuite/sim/sh64/compact/dt.cgs

@@ -0,0 +1,42 @@
+# sh testcase for dt $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global dt
+dt:
+	mov #3, r0
+	dt r0
+	bt wrong
+	assert r0, #2
+
+	mov #1, r0
+	dt r0
+	bf wrong
+	assert r0, #0
+
+	mov #0, r0
+	dt r0
+	bt wrong
+	mov #0, r7
+	not r7, r7
+	cmp/eq r7, r0
+	bf wrong
+
+	mov #1, r0
+	neg r0, r0
+	dt r0
+	mov #1, r7
+	not r7, r7
+	cmp/eq r7, r0
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/extsb.cgs

@@ -0,0 +1,29 @@
+# sh testcase for exts.b $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global extsb
+extsb:
+	mov #42, r1
+	exts.b r1, r2
+	assert r2, #42
+signed:
+	mov #0, r0
+	or #255, r0
+	exts.b r0, r1
+	mov #0, r7
+	not r7, r7
+	cmp/eq r1, r7
+	bf wrong
+	
+okay:
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/extsw.cgs

@@ -0,0 +1,32 @@
+# sh testcase for exts.w $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global extsw
+extsw:
+	mov #42, r1
+	exts.w r1, r2
+	assert r2, #42
+	
+another:
+	mov #0, r0
+	or #255, r0
+	shll8 r0
+	exts.w r0, r1
+
+	mov #-1, r7
+	shll8 r7
+	cmp/eq r1, r7
+	bf wrong
+	
+okay:
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/extub.cgs

@@ -0,0 +1,31 @@
+# sh testcase for extu.b $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global extub
+extub:
+	mov #42, r1
+	extu.b r1, r2
+	assert r2, #42
+
+another:
+	mov #0, r0
+	or #255, r0
+	extu.b r0, r1
+
+	mov #0, r0
+	or #255, r0
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail
+

sim/testsuite/sim/sh64/compact/extuw.cgs

@@ -0,0 +1,31 @@
+# sh testcase for extu.w $rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global extuw
+extuw:
+	mov #42, r1
+	extu.w r1, r2
+	assert r2, #42
+	
+another:
+	mov #0, r0
+	or #255, r0
+	shll8 r0
+	extu.w r0, r1
+	mov #0, r0
+	or #255, r0
+	shll8 r0
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/fabs.cgs

@@ -0,0 +1,88 @@
+# sh testcase for fabs -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	_clrpr
+	# fabs(0.0) = 0.0.
+	fldi0 fr0
+	fabs fr0
+	fldi0 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# fabs(1.0) = 1.0.
+	fldi1 fr0
+	fabs fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# fabs(-1.0) = 1.0.
+	fldi1 fr0
+	fneg fr0
+	fabs fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+
+double:
+	# double precision tests.
+	# fabs(0.0) = 0.0.
+	fldi0 fr0
+	_s2d fr0, dr0
+	_setpr
+	fabs dr0
+	_clrpr
+	# check.
+	fldi0 fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bf wrong
+	_clrpr
+
+one:
+	# fabs(1.0) = 1.0.
+	fldi1 fr0
+	_s2d fr0, dr0
+	_setpr
+	fabs dr0
+	_clrpr
+	# check.
+	fldi1 fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bf wrong2
+	_clrpr
+
+minusone:
+	# fabs(-1.0) = 1.0.
+	fldi1 fr0
+	fneg fr0
+	_s2d fr0, dr0
+	_setpr
+	fabs dr0
+	_clrpr
+	# check.
+	fldi1 fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bf wrong2
+	_clrpr
+
+okay:
+	pass
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/fadd.cgs

@@ -0,0 +1,31 @@
+# sh testcase for fadd
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	_clrpr
+
+	fldi1 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+
+	fldi0 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+
+	fldi1 fr0
+	fldi0 fr1
+	fadd fr0, fr1
+
+	_setpr
+double:
+	fldi1 fr0
+	fldi1 fr1
+	_s2d fr0, dr4
+	_s2d fr1, dr6
+	fadd dr4, dr6
+
+	pass

sim/testsuite/sim/sh64/compact/fcmpeq.cgs

@@ -0,0 +1,88 @@
+# sh testcase for fcmpeq -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# 1.0 == 1.0.	
+	fldi1 fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# 0.0 != 1.0.
+	fldi0 fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bt wrong
+
+	# 1.0 != 0.0.
+	fldi1 fr0
+	fldi0 fr1
+	fcmp/eq fr0, fr1
+	bt wrong
+
+	# 2.0 != 1.0
+	fldi1 fr0
+	fadd fr0, fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bt wrong
+
+	bra double
+	# delay slot
+	nop
+
+wrong:
+	fail
+	
+double:
+	# 1.0 == 1.0
+	fldi1 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bf wrong
+	_clrpr
+
+	# 0.0 != 1.0
+	fldi0 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bt wrong
+	_clrpr
+
+	# 1.0 != 0.0
+	fldi1 fr0
+	fldi0 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bt wrong2
+	_clrpr
+
+	# 2.0 != 1.0
+	fldi1 fr0
+	fadd fr0, fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bt wrong2
+	_clrpr
+
+okay:
+	pass
+
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/fcmpgt.cgs

@@ -0,0 +1,95 @@
+# sh testcase for fcmpgt -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# 1.0 !> 1.0.
+	fldi1 fr0
+	fldi1 fr1
+	fcmp/gt fr0, fr1
+	bt wrong
+
+	# 0.0 !> 1.0.
+	fldi0 fr0
+	fldi1 fr1
+	fcmp/gt fr0, fr1
+	bf wrong
+
+	# 1.0 > 0.0.
+	fldi1 fr0
+	fldi0 fr1
+	fcmp/gt fr0, fr1
+	bt wrong
+
+	# 2.0 > 1.0
+	fldi1 fr0
+	fadd fr0, fr0
+	fldi1 fr1
+	fcmp/gt fr0, fr1
+	bt wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+
+double:
+	# double precision tests.
+	# 1.0 !> 1.0.
+	fldi1 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/gt dr0, dr2
+	bt wrong2
+	_clrpr
+
+	# 0.0 !> 1.0.
+	fldi0 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/gt dr0, dr2
+	bf wrong2
+	_clrpr
+
+	bra next
+	nop
+
+wrong2:
+	fail
+
+next:
+	# 1.0 > 0.0.
+	fldi1 fr0
+	fldi0 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/gt dr0, dr2
+	bt wrong2
+	_clrpr
+
+	# 2.0 > 1.0.
+	fldi1 fr0
+	fadd fr0, fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fcmp/gt dr0, dr2
+	bt wrong2
+	_clrpr
+
+okay:
+	pass
+
+wrong3:
+	fail

sim/testsuite/sim/sh64/compact/fcnvds.cgs

@@ -0,0 +1,13 @@
+# sh testcase for fcnvds -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	_setpr
+	fcnvds dr0, fpul
+	_clrpr
+okay:
+	pass

sim/testsuite/sim/sh64/compact/fcnvsd.cgs

@@ -0,0 +1,27 @@
+# sh testcase for fcnvsd -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	fldi1 fr0
+	flds fr0, fpul
+	_setpr
+	fcnvsd fpul, dr2
+	_clrpr
+
+	# Convert back.
+	_setpr
+	fcnvds dr2, fpul
+	_clrpr
+	fsts fpul, fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/fdiv.cgs

@@ -0,0 +1,83 @@
+# sh testcase for fdiv -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	_clrpr
+	
+	# 1.0 / 0.0 should be INF
+	# (and not crash the sim).
+	fldi0 fr0
+	fldi1 fr1
+	fdiv fr0, fr1
+
+	# 0.0 / 1.0 == 0.0.
+	fldi0 fr0
+	fldi1 fr1
+	fdiv fr1, fr0
+	fldi0 fr2
+	fcmp/eq fr0, fr2
+	bf wrong
+
+	# 2.0 / 1.0 == 2.0.
+	fldi1 fr1
+	fldi1 fr2
+	fadd fr2, fr2
+	fdiv fr1, fr2
+	# Load 2.0 into fr3.
+	fldi1 fr3
+	fadd fr3, fr3
+	fcmp/eq fr2, fr3
+	bf wrong
+
+	# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
+	fldi1 fr1
+	fldi1 fr2
+	fadd fr2, fr2
+	fdiv fr2, fr1
+	# fr1 should contain 0.5.
+	fadd fr1, fr1
+	# Load 1.0 into fr3.
+	fldi1 fr3
+	# Compare fr1 with fr3.
+	fcmp/eq fr1, fr3
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+	
+double:	
+	# double test
+	# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
+	fldi1 fr1
+	_s2d fr1, dr6
+	fldi1 fr2
+	fadd fr2, fr2
+	_s2d fr2, dr8
+	_setpr
+	fdiv dr8, dr6
+	# dr0 should contain 0.5.
+	# double it, expect 1.0.
+	fadd dr6, dr6
+	_clrpr
+foo:	
+	# Load 1.0 into dr4.
+	fldi1 fr1
+	_s2d fr1, dr10
+	# Compare dr0 with dr10.
+	_setpr
+	fcmp/eq dr6, dr10
+	bf wrong2
+	_clrpr
+	
+okay:
+	pass
+
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/fipr.cgs

@@ -0,0 +1,44 @@
+# sh testcase for fipr $fvm, $fvn
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+initv1:
+	fldi1 fr0
+	# Load 2 into fr2.
+	fldi1 fr1
+	fadd fr1, fr1
+	# Load 4 into fr2.
+	fldi1 fr2
+	fadd fr2, fr2
+	fadd fr2, fr2
+	fldi0 fr3
+
+initv2:
+	fldi1 fr8
+	fldi0 fr9
+	fldi1 fr10
+	fldi0 fr11
+
+	fipr fv0, fv8
+
+	# Result will be in fr11.
+	fldi1 fr0
+	fldi1 fr1
+	# Two.
+	fadd fr1, fr0
+	# Four.
+	fadd fr0, fr0
+	# Five.
+	fadd fr1, fr0
+	fcmp/eq fr0, fr11
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/fldi0.cgs

@@ -0,0 +1,17 @@
+# sh testcase for fldi0 $frn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	fldi0 fr0
+	fldi0 fr2
+	fldi0 fr4
+	fldi0 fr6
+	fldi0 fr8
+	fldi0 fr10
+	fldi0 fr12
+	fldi0 fr14
+	pass

sim/testsuite/sim/sh64/compact/fldi1.cgs

@@ -0,0 +1,17 @@
+# sh testcase for fldi1 $frn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	fldi1 fr1
+	fldi1 fr3
+	fldi1 fr5
+	fldi1 fr7
+	fldi1 fr9
+	fldi1 fr11
+	fldi1 fr13
+	fldi1 fr15
+	pass

sim/testsuite/sim/sh64/compact/flds.cgs

@@ -0,0 +1,26 @@
+# sh testcase for flds -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	fldi0 fr0
+	flds fr0, fpul
+	fsts fpul, fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+	
+	fldi1 fr0
+	flds fr0, fpul
+	fsts fpul, fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/float.cgs

@@ -0,0 +1,80 @@
+# sh testcase for float -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+pos:	
+	mov #3, r0
+	lds r0, fpul
+	float fpul, fr7
+
+	# Check the result.
+	fldi1 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+	fadd fr0, fr1
+	fcmp/eq fr1, fr7
+	bf wrong
+
+neg:	
+	mov #3, r0
+	neg r0, r0
+	lds r0, fpul
+	float fpul, fr7
+
+	# Check the result.
+	fldi1 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+	fadd fr0, fr1
+	fneg fr1
+	fcmp/eq fr1, fr7
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+	
+double:
+	mov #3, r0
+	lds r0, fpul
+	_setpr
+	float fpul, dr8
+	_clrpr
+	# check the result.
+	fldi1 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+	fadd fr0, fr1
+	_s2d fr1, dr2
+	fcmp/eq dr2, dr8
+	bf wrong
+
+dneg:
+	mov #3, r0
+	neg r0, r0
+	lds r0, fpul
+	_setpr
+	float fpul, dr8
+	_clrpr
+	# check the result.
+	fldi1 fr0
+	fldi1 fr1
+	fadd fr0, fr1
+	fadd fr0, fr1
+	fneg fr1
+	_s2d fr1, dr2
+	fcmp/eq dr2, dr8
+	bf wrong	
+
+okay:
+	pass
+
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/fmac.cgs

@@ -0,0 +1,78 @@
+# sh testcase for fmac -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# 0.0 * x + y = y.
+
+	fldi0 fr0
+	fldi1 fr1
+	fldi1 fr2
+	fmac fr0, fr1, fr2
+	# check result.
+	fldi1 fr0
+	fcmp/eq fr0, fr2
+	bf wrong
+
+	# x * y + 0.0 = x * y.
+
+	fldi1 fr0
+	fldi1 fr1
+	fldi0 fr2
+	# double it.
+	fadd fr1, fr2
+	fmac fr0, fr1, fr2
+	# check result.
+	fldi1 fr0
+	fadd fr0, fr0
+	fcmp/eq fr0, fr2
+	bf wrong
+	
+	# x * 0.0 + y = y.
+
+	fldi1 fr0
+	fldi0 fr1
+	fldi1 fr2
+	fadd fr2, fr2
+	fmac fr0, fr1, fr2
+	# check result.
+	fldi1 fr0
+	# double fr0.
+	fadd fr0, fr0
+	fcmp/eq fr0, fr2
+	bf wrong
+
+	# x * 0.0 + 0.0 = 0.0
+
+	fldi1 fr0
+	fadd fr0, fr0
+	fldi0 fr1
+	fldi0 fr2
+	fmac fr0, fr1, fr2
+	# check result.
+	fldi0 fr0
+	fcmp/eq fr0, fr2
+	bf wrong
+
+	# 0.0 * x + 0.0 = 0.0.
+
+	fldi0 fr0
+	fldi1 fr1
+	# double it.
+	fadd fr1, fr1
+	fldi0 fr2
+	fmac fr0, fr1, fr2
+	# check result.
+	fldi0 fr0
+	fcmp/eq fr0, fr2
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/fmov.cgs

@@ -0,0 +1,273 @@
+# sh testcase for all fmov instructions
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	.macro init
+	fldi0 fr0
+	fldi1 fr2
+	.endm
+
+	# Set the SZ (SiZe) bit in the fpscr.
+	.macro _setsz
+	sts fpscr, r7
+	mov #16, r8
+	shll16 r8
+	or r8, r7
+	lds r7, fpscr
+	.endm
+
+	# Clear the SZ bit.
+	.macro _clrsz
+	sts fpscr, r7
+	mov #16, r8
+	shll16 r8
+	not r8, r8
+	and r8, r7
+	lds r7, fpscr
+	.endm
+	start
+
+fmov1:  # Test fr -> fr.
+	init
+	_clrpr
+	_clrsz
+	fmov fr0, fr10
+	# Ensure fr0 and fr10 are now equal.
+	fcmp/eq fr0, fr10
+	bt fmov2
+	fail
+
+fmov2:  # Test dr -> dr.
+	init
+	_setpr
+	_setsz
+	fmov dr0, dr2
+	# Ensure dr0 and dr2 are now equal.
+	fcmp/eq dr0, dr2
+	bt fmov3
+	fail
+
+fmov3:  # Test dr -> xd and xd -> dr.
+	init
+	_setsz
+	fmov dr0, xd0
+	# Ensure dr0 and xd0 are now equal.
+	fmov xd0, dr2
+	fcmp/eq dr0, dr2
+	bt fmov4
+	fail
+
+fmov4:  # Test xd -> xd.
+	init
+	_setsz
+	_setpr
+	fmov dr0, xd0
+	fmov xd0, xd2
+	fmov xd2, dr2
+	# Ensure dr0 and dr2 are now equal.
+	fcmp/eq dr0, dr2
+	bt fmov5
+	fail
+
+fmov5:  # Test fr -> @rn and @rn -> fr.
+	init
+	_clrsz
+	_clrpr
+	mov #40, r0
+	shll8 r0
+	fmov fr0, @r0
+	fmov @r0, fr1
+	fcmp/eq fr0, fr1
+	bt fmov6
+	fail
+
+fmov6:  # Test dr -> @rn and @rn -> dr.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	fmov dr0, @r0
+	fmov @r0, dr2
+	fcmp/eq dr0, dr2
+	bt fmov7
+	fail
+
+fmov7:	# Test xd -> @rn and @rn -> xd.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	fmov dr0, xd0
+	fmov xd0, @r0
+	fmov @r0, xd2
+	fmov xd2, dr2
+	fcmp/eq dr0, dr2
+	bt fmov8
+	fail
+
+fmov8:	# Test fr -> @-rn.
+	init
+	_clrsz
+	_clrpr
+	mov #40, r0
+	shll8 r0
+	# Preserve.
+	mov r0, r1
+	fmov fr0, @-r0
+	fmov @r0, fr2
+	fcmp/eq fr0, fr2
+	bt f8b
+	fail
+f8b:	# check pre-dec.
+	add #4, r0
+	cmp/eq r0, r1
+	bt fmov9
+	fail
+
+fmov9:	# Test dr -> @-rn.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	# Preserve r0.
+	mov r0, r1
+	fmov dr0, @-r0
+	fmov @r0, dr2
+	fcmp/eq dr0, dr2
+	bt f9b
+	fail
+f9b:	# check pre-dec.
+	add #8, r0
+	cmp/eq r0, r1
+	bt fmov10
+	fail
+
+fmov10:	# Test xd -> @-rn.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	# Preserve r0.
+	mov r0, r1
+	fmov dr0, xd0
+	fmov xd0, @-r0
+	fmov @r0, xd2
+	fmov xd2, dr2
+	fcmp/eq dr0, dr2
+	bt f10b
+	fail
+f10b:   # check pre-dec.
+	add #8, r0
+	cmp/eq r0, r1
+	bt fmov11
+	fail
+
+fmov11:	# Test @rn+ -> fr.
+	init
+	_clrsz
+	_clrpr
+	mov #40, r0
+	shll8 r0
+	# Preserve r0.
+	mov r0, r1
+	fmov fr0, @r0
+	fmov @r0+, fr2
+	fcmp/eq fr0, fr2
+	bt f11b
+	fail
+f11b:   # check post-inc.
+	add #4, r1
+	cmp/eq r0, r1
+	bt fmov12
+	fail
+
+fmov12:	# Test @rn+ -> dr.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	# preserve r0.
+	mov r0, r1
+	fmov dr0, @r0
+	fmov @r0+, dr2
+	fcmp/eq dr0, dr2
+	bt f12b
+	fail
+f12b:   # check post-inc.
+	add #8, r1
+	cmp/eq r0, r1
+	bt fmov13
+	fail
+
+fmov13:	# Test @rn -> xd.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	# Preserve r0.
+	mov r0, r1
+	fmov dr0, xd0
+	fmov xd0, @r0
+	fmov @r0+, xd2
+	fmov xd2, dr2
+	fcmp/eq dr0, dr2
+	bt f13b
+	fail
+f13b:
+	add #8, r1
+	cmp/eq r0, r1
+	bt fmov14
+	fail
+
+fmov14:	# Test fr -> @(r0,rn), @(r0, rn) -> fr.
+	init
+	_clrsz
+	_clrpr
+	mov #40, r0
+	shll8 r0
+	mov #0, r1
+	fmov fr0, @(r0, r1)
+	fmov @(r0, r1), fr1
+	fcmp/eq fr0, fr1
+	bt fmov15
+	fail
+
+fmov15:	# Test dr -> @(r0, rn), @(r0, rn) -> dr.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	mov #0, r1
+	fmov dr0, @(r0, r1)
+	fmov @(r0, r1), dr2
+	fcmp/eq dr0, dr2
+	bt fmov16
+	fail
+
+fmov16:	# Test xd -> @(r0, rn), @(r0, rn) -> xd.
+	init
+	_setsz
+	_setpr
+	mov #40, r0
+	shll8 r0
+	mov #0, r1
+	fmov dr0, xd0
+	fmov xd0, @(r0, r1)
+	fmov @(r0, r1), xd2
+	fmov xd2, dr2
+	fcmp/eq dr0, dr2
+	bt okay
+	fail
+
+okay:
+	pass

sim/testsuite/sim/sh64/compact/fmul.cgs

@@ -0,0 +1,121 @@
+# sh testcase for fmul -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	.macro init
+	fldi0 fr0
+	fldi1 fr1
+	fldi1 fr2
+	fadd fr2, fr2
+	fldi0 fr7
+	fldi1 fr8
+	.endm
+
+	start
+
+	# 0.0 * 0.0 = 0.0.
+	init
+	fmul fr0, fr0
+	fcmp/eq fr7, fr0
+	bf wrong
+
+	# 0.0 * 1.0 = 0.0.
+	init
+	fmul fr1, fr0
+	fcmp/eq fr7, fr0
+	bf wrong
+
+	# 1.0 * 0.0 = 0.0.
+	init
+	fmul fr0, fr1
+	fcmp/eq fr7, fr1
+	bf wrong
+
+	# 1.0 * 1.0 = 1.0.
+	init
+	fmul fr1, fr1
+	fcmp/eq fr8, fr1
+	bf wrong
+
+	# 2.0 * 1.0 = 2.0.
+	init
+	fmul fr2, fr1
+	fcmp/eq fr2, fr1
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+	
+	.macro dinit
+	fldi0 fr0
+	fldi1 fr2
+	fldi1 fr4
+	fadd fr4, fr4
+	fldi0 fr8
+	fldi1 fr10
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_s2d fr4, dr4
+	_s2d fr8, dr8
+	_s2d fr10, dr10
+	.endm
+	
+double:
+	# 0.0 * 0.0 = 0.0.
+	dinit
+	_setpr
+	fmul dr0, dr0
+	fcmp/eq dr8, dr0
+	bf wrong
+	_clrpr
+
+	# 0.0 * 1.0 = 0.0.
+	dinit
+	_setpr
+	fmul dr2, dr0
+	fcmp/eq dr8, dr0
+	bf wrong2
+	_clrpr
+
+	# 1.0 * 0.0 = 0.0.
+	dinit
+	_setpr
+	fmul dr0, dr2
+	fcmp/eq dr8, dr2
+	bf wrong2
+	_clrpr
+
+	bra next
+	nop
+
+wrong2:
+	fail
+
+next:
+	# 1.0 * 1.0 = 1.0.
+	dinit
+	_setpr
+	fmul dr2, dr2
+	fcmp/eq dr10, dr2
+	bf wrong3
+	_clrpr
+
+	# 2.0 * 1.0 = 2.0.
+	dinit
+	_setpr
+	fmul dr4, dr2
+	fcmp/eq dr4, dr2
+	bf wrong3
+	_clrpr
+
+okay:
+	pass
+
+wrong3:	
+	fail

sim/testsuite/sim/sh64/compact/fneg.cgs

@@ -0,0 +1,83 @@
+# sh testcase for fneg -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# neg(0.0) = 0.0.
+	fldi0 fr0
+	fldi0 fr1
+	fneg fr0
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# neg(1.0) = fsub(0,1)
+	fldi1 fr0
+	fneg fr0
+	fldi0 fr1
+	fldi1 fr2
+	fsub fr2, fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+	
+	# neg(neg(1.0)) = 1.0.
+	fldi1 fr0
+	fldi1 fr1
+	fneg fr0
+	fneg fr0
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+
+double:
+	# neg(0.0) = 0.0.
+	fldi0 fr0
+	fldi0 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fneg dr0
+	fcmp/eq dr0, dr2
+	bf wrong2
+	_clrpr
+
+	# neg(1.0) = fsub(0,1)
+	fldi1 fr0
+	_s2d fr0, dr0
+	_setpr
+	fneg dr0
+	_clrpr
+	fldi0 fr2
+	fldi1 fr3
+	fsub fr3, fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq fr0, fr2
+	bf wrong2
+	_clrpr
+	
+	# neg(neg(1.0)) = 1.0.
+	fldi1 fr0
+	_s2d fr0, dr0
+	fldi1 fr2
+	_s2d fr2, dr2
+	_setpr
+	fneg dr0
+	fneg dr2
+	fcmp/eq dr0, dr2
+	bf wrong2
+	_clrpr
+		
+okay:
+	pass
+
+wrong2:	
+	fail

sim/testsuite/sim/sh64/compact/frchg.cgs

@@ -0,0 +1,13 @@
+# sh testcase for frchg
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	frchg
+	frchg
+	frchg
+	frchg
+	pass

sim/testsuite/sim/sh64/compact/fschg.cgs

@@ -0,0 +1,13 @@
+# sh testcase for fschg
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	fschg
+	fschg
+	fschg
+	fschg
+	pass

sim/testsuite/sim/sh64/compact/fsqrt.cgs

@@ -0,0 +1,93 @@
+# sh testcase for fsqrt -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# sqrt(0.0) = 0.0.
+	fldi0 fr0
+	fsqrt fr0
+	fldi0 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# sqrt(1.0) = 1.0.
+	fldi1 fr0
+	fsqrt fr0
+	fldi1 fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	# sqrt(4.0) = 2.0
+	fldi1 fr0
+	# Double it.
+	fadd fr0, fr0
+	# Double it again.
+	fadd fr0, fr0
+	fsqrt fr0
+	fldi1 fr1
+	# Double it.
+	fadd fr1, fr1
+	fcmp/eq fr0, fr1
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+
+double:
+	# sqrt(0.0) = 0.0.
+	fldi0 fr0
+	_s2d fr0, dr0
+	_setpr
+	fsqrt dr0
+	_clrpr
+	fldi0 fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq dr0, dr2
+	bf wrong2
+	_clrpr
+
+	# sqrt(1.0) = 1.0.
+	fldi1 fr0
+	_s2d fr0, dr0
+	_setpr
+	fsqrt dr0
+	_clrpr
+	fldi1 fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq fr0, fr2
+	bf wrong2
+	_clrpr
+
+	# sqrt(4.0) = 2.0.
+	fldi1 fr0
+	# Double it.
+	fadd fr0, fr0
+	# Double it again.
+	fadd fr0, fr0
+	_s2d fr0, dr0
+	_setpr
+	fsqrt dr0
+	_clrpr
+	fldi1 fr2
+	# Double it.
+	fadd fr2, fr2
+	_s2d fr2, dr2
+	_setpr
+	fcmp/eq fr0, fr2
+	bf wrong2
+	_clrpr
+
+okay:
+	pass
+
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/fsts.cgs

@@ -0,0 +1,11 @@
+# sh testcase for fsts fpul, $frn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	fsts fpul, fr0
+	fsts fpul, fr1
+	pass

sim/testsuite/sim/sh64/compact/fsub.cgs

@@ -0,0 +1,120 @@
+# sh testcase for fmul -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	# 0.0 - 0.0 = 0.0.
+	fldi0 fr0
+	fldi0 fr1
+	fsub fr0, fr1
+	fldi0 fr2
+	fcmp/eq fr1, fr2
+	bf wrong
+
+	# 1.0 - 0.0 = 1.0.
+	fldi0 fr0
+	fldi1 fr1
+	fsub fr0, fr1
+	fldi1 fr2
+	fcmp/eq fr1, fr2
+	bf wrong
+
+	# 1.0 - 1.0 = 0.0.
+	fldi1 fr0
+	fldi1 fr1
+	fsub fr0, fr1
+	fldi0 fr2
+	fcmp/eq fr1, fr2
+	bf wrong
+
+	# 0.0 - 1.0 = -1.0.
+	fldi1 fr0
+	fldi0 fr1
+	fsub fr0, fr1
+	fldi1 fr2
+	fneg fr2
+	fcmp/eq fr1, fr2
+	bf wrong
+
+	bra double	
+	nop
+
+wrong:
+	fail
+
+double:
+	# 0.0 - 0.0 = 0.0.
+	fldi0 fr0
+	fldi0 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fsub dr0, dr2
+	_clrpr
+	fldi0 fr4
+	_s2d fr4, dr4
+	_setpr
+	fcmp/eq dr2, dr4
+	bf wrong
+	_clrpr
+
+onezero:	
+	# 1.0 - 0.0 = 1.0.
+	fldi0 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fsub dr0, dr2
+	_clrpr
+	fldi1 fr4
+	_s2d fr4, dr4
+	_setpr
+	fcmp/eq dr2, dr4
+	bf wrong2
+	_clrpr
+
+oneone:	
+	# 1.0 - 1.0 = 0.0.
+	fldi1 fr0
+	fldi1 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fsub dr0, dr2
+	_clrpr
+	fldi0 fr4
+	_s2d fr4, dr4
+	_setpr
+	fcmp/eq dr2, dr4
+	bf wrong2
+	_clrpr
+
+	bra zeroone
+	nop
+
+wrong2:
+	fail
+
+zeroone:	
+	# 0.0 - 1.0 = -1.0.
+	fldi1 fr0
+	fldi0 fr2
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_setpr
+	fsub dr0, dr2
+	_clrpr
+	fldi1 fr4
+	fneg fr4
+	_s2d fr4, dr4
+	_setpr
+	fcmp/eq dr2, dr4
+	bf wrong2
+	_clrpr
+		
+okay:
+	pass

sim/testsuite/sim/sh64/compact/ftrc.cgs

@@ -0,0 +1,132 @@
+# sh testcase for ftrc -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# ftrc(0.0) = 0.
+	fldi0 fr0
+	ftrc fr0, fpul
+	# check results.
+	mov #0, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+	bf wrong
+	
+	# ftrc(1.5) = 1.
+	fldi1 fr0
+	fldi1 fr1
+	fldi1 fr2
+	# double it.
+	fadd fr2, fr2
+	# form the fraction.
+	fdiv fr2, fr1
+	fadd fr1, fr0
+	# now we've got 1.5 in fr0.
+	ftrc fr0, fpul
+	# check results.
+	mov #1, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+	bf wrong
+
+	# ftrc(-1.5) = -1.
+	fldi1 fr0
+	fneg fr0
+	fldi1 fr1
+	fldi1 fr2
+	# double it.
+	fadd fr2, fr2
+	# form the fraction.
+	fdiv fr2, fr1
+	fneg fr1
+	# -1 + -0.5 = -1.5.
+	fadd fr1, fr0
+	# now we've got 1.5 in fr0.
+	ftrc fr0, fpul
+	# check results.
+	mov #1, r0
+	neg r0, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+	bf wrong
+
+	bra double
+	nop
+
+wrong:
+	fail
+
+double:
+	# ftrc(0.0) = 0.
+	fldi0 fr0
+	_s2d fr0, dr0
+	_setpr
+	ftrc dr0, fpul
+	_clrpr
+	# check results.
+	mov #0, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+foo:	
+	bf wrong2
+
+	# ftrc(1.5) = 1.
+	fldi1 fr0
+	fldi1 fr2
+	fldi1 fr4
+	# double it.
+	fadd fr4, fr4
+	# form 0.5.
+	fdiv fr4, fr2
+	fadd fr2, fr0
+	# now we've got 1.5 in fr0, so do some single->double
+	# conversions and perform the ftrc.
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_s2d fr4, dr4
+	_setpr
+	ftrc dr0, fpul
+	_clrpr
+	
+	# check results.
+	mov #1, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+	bf wrong2
+
+	# ftrc(-1.5) = -1.
+	fldi1 fr0
+	fneg fr0
+	fldi1 fr2
+	fldi1 fr4
+	# double it.
+	fadd fr4, fr4
+	# form the fraction.
+	fdiv fr4, fr2
+	fneg fr2
+	# -1 + -0.5 = -1.5.
+	fadd fr2, fr0
+	# now we've got 1.5 in fr0, so do some single->double
+	# conversions and perform the ftrc.
+	_s2d fr0, dr0
+	_s2d fr2, dr2
+	_s2d fr4, dr4
+	_setpr
+	ftrc dr0, fpul
+	_clrpr
+	
+	# check results.
+	mov #1, r0
+	neg r0, r0
+	sts fpul, r1
+	cmp/eq r0, r1
+	bf wrong2
+
+okay:
+	pass
+wrong2:
+	fail

sim/testsuite/sim/sh64/compact/ftrv.cgs

@@ -0,0 +1,74 @@
+# sh testcase for ftrv xmtrx, $fvn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	# set the fr bit in the fpscr
+	.macro _setfr
+	sts fpscr, r7
+	mov #32, r8
+	shll16 r8
+	or r8, r7
+	lds r7, fpscr
+	.endm
+
+	# clear the fr bit
+	.macro _clrfr
+	sts fpscr, r7
+	mov #32, r8
+	shll16 r8
+	not r8, r8
+	and r8, r7
+	lds r7, fpscr
+	.endm
+
+	.macro incr old new
+	fldi1 \new
+	fadd \old, \new
+	.endm
+
+	start
+	_setfr
+popmtrx:
+	# 1.0.
+	fldi1 fr0
+	# 2.0.
+	fldi1 fr1
+	fadd fr1, fr1
+
+	incr fr1, fr2
+	incr fr2, fr3
+	incr fr3, fr4
+	incr fr4, fr5
+	incr fr5, fr6
+	incr fr6, fr7
+	incr fr7, fr8
+	incr fr8, fr9
+	incr fr9, fr10
+	incr fr10, fr11
+	incr fr11, fr12
+	incr fr12, fr13
+	incr fr13, fr14
+	incr fr14, fr15
+
+popvect:
+	# Swtich fp banks.
+	_clrfr
+	fldi1 fr4
+	fldi1 fr5
+	fadd fr5, fr5
+	fldi1 fr6
+	fadd fr5, fr6
+	fldi1 fr7
+	fadd fr6, fr7
+
+ftrv:
+	# fr[4,7] should contain the results:
+	# { 30, 70, 110, 150 }.
+	ftrv xmtrx, fv4
+
+okay:
+	pass
+

sim/testsuite/sim/sh64/compact/jmp.cgs

@@ -0,0 +1,29 @@
+# sh testcase for jmp @$rn
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global jmp
+jmp:
+	# Load 0x1010 into r0.
+	mov #1, r0
+	shll8 r0
+	shll2 r0
+	shll2 r0
+	add #16, r0
+	jmp @r0
+slot:
+	nop
+bad:
+	fail
+okay:
+	pass
+alsobad:
+	fail
+	fail
+	fail
+

sim/testsuite/sim/sh64/compact/jsr.cgs

@@ -0,0 +1,29 @@
+# sh testcase for jsr @$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global jsr
+jsr:
+	# Load 0x1010 into r0.
+	mov #1, r0
+	shll8 r0
+	shll2 r0
+	shll2 r0
+	add #16, r0
+	jsr @r0
+slot:	
+	nop
+bad:
+	fail
+okay:
+	pass
+alsobad:
+	fail
+	fail
+	fail
+

sim/testsuite/sim/sh64/compact/ldc-gbr.cgs

@@ -0,0 +1,22 @@
+# sh testcase for ldc $rn, gbr -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldc
+ldc:
+	mov #40, r0
+	shll8 r0
+	ldc r0, gbr
+	stc gbr, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs

@@ -0,0 +1,28 @@
+# sh testcase for ldc.l @${rn}+, gbr -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldcl
+ldcl:
+	mov #40, r0
+	shll8 r0
+	# Preserve address.
+	mov r0, r1
+	ldc.l @r0+, gbr
+
+	# Add 4 to saved address (r1).
+	# Then compare with r0.
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/lds-fpscr.cgs

@@ -0,0 +1,22 @@
+# sh testcase for lds $rn, fpscr -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global lds_fpscr
+lds_fpscr:
+	mov #0, r0
+	lds r0, fpscr
+readback:
+	sts fpscr, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/lds-fpul.cgs

@@ -0,0 +1,17 @@
+# sh testcase for lds $rn, fpul -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global lds_fpul
+lds_fpul:
+	mov #63, r0
+	shll8 r0
+	add #128, r0
+	shll16 r0
+	lds r0, fpul
+	pass

sim/testsuite/sim/sh64/compact/lds-mach.cgs

@@ -0,0 +1,23 @@
+# sh testcase for lds $rn, mach
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global lds_mach
+lds_mach:
+	mov #41, r0
+	shll8 r0
+	lds r0, mach
+readback:
+	sts mach, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/lds-macl.cgs

@@ -0,0 +1,23 @@
+# sh testcase for lds $rn, macl
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global lds_macl
+lds_macl:
+	mov #42, r0
+	shll8 r0
+	lds r0, macl
+readback:
+	sts macl, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/lds-pr.cgs

@@ -0,0 +1,23 @@
+# sh testcase for lds $rn, pr
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global lds_pr
+lds_pr:
+	mov #40, r0
+	shll8 r0
+	lds r0, pr
+readback:
+	sts pr, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs

@@ -0,0 +1,43 @@
+# sh testcase for lds.l @${rn}+, fpscr -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	mov #40, r0
+	shll8 r0
+	# save address for later examination.
+	mov r0, r1
+
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+	# Store it in memory.
+	mov.l r2, @r0
+
+	lds.l @r0+, fpscr
+
+check:
+	# Read it back.
+	sts fpscr, r3
+	cmp/eq r2, r3
+	bf wrong
+
+inc:
+	# Test for proper post-increment.
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail	

sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs

@@ -0,0 +1,27 @@
+# sh testcase for lds.l @${rn}+, fpul -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldsl_fpul
+ldsl_fpul:
+	mov #40, r0
+	shll8 r0
+	# remember the address.
+	mov r0, r1
+	lds.l @r0+, fpul
+
+	# ensure post increment occurred.
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:	
+	pass
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/ldsl-mach.cgs

@@ -0,0 +1,26 @@
+# sh testcase for lds.l @${rn}+, mach -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldsl_mach
+ldsl_mach:
+	mov #40, r0
+	shll8 r0
+	# save address for later examination.
+	mov r0, r1
+
+	lds.l @r0+, mach
+
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/ldsl-macl.cgs

@@ -0,0 +1,26 @@
+# sh testcase for lds.l @${rn}+, macl -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldsl_macl
+ldsl_macl:
+	mov #40, r0
+	shll8 r0
+	# save address for later examination.
+	mov r0, r1
+
+	lds.l @r0+, macl
+
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/ldsl-pr.cgs

@@ -0,0 +1,28 @@
+# sh testcase for lds.l @${rn}+, pr -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global ldsl_pr
+ldsl_pr:
+	mov #40, r0
+	shll8 r0
+	# Preserve address.
+	mov r0, r1
+	lds.l @r0+, pr
+
+	# Add 4 to saved address (r1).
+	# Then compare with r0.
+	add #4, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/macl.cgs

@@ -0,0 +1,76 @@
+# sh testcase for mac.l @${rm}+, @${rn}+
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	# force S-bit clear
+	clrs
+
+	# Store some magic numbers in memory.
+	mov #40, r1
+	shll8 r1
+	mov #85, r0
+	mov.l r0, @r1
+	# Keep for later.
+	mov r1, r10
+store2:
+	mov #40, r1
+	shll8 r1
+	add #12, r1
+	mov #17, r0
+	mov.l r0, @r1
+	# Keep for later.
+	mov r1, r11
+
+init:
+	# Set up addresses.
+	mov #40, r1
+	shll8 r1
+	mov #40, r2
+	shll8 r2
+	add #12, r2
+
+	# Prime {MACL, MACH} to #1.
+	mov #1, r3
+	dmulu.l r3, r3
+
+test:
+	mac.l @r1+, @r2+
+
+check:
+	# Check result.
+	sts mach, r5
+	assert r5, #0
+
+	mov #5, r0
+	shll8 r0
+	or #166, r0
+	sts macl, r6
+	cmp/eq r6, r0
+	bf wrong
+
+	# Ensure post-increment occurred.
+	add #4, r10
+	cmp/eq r10, r1
+	bf wrong
+
+	add #4, r11
+	cmp/eq r11, r2
+	bf wrong
+
+doubleinc:
+	mov #40, r0
+	shll8 r0
+	mov r0, r1
+	mac.l @r0+, @r0+
+	add #16, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/macw.cgs

@@ -0,0 +1,70 @@
+# sh testcase for mac.w @${rm}+, @${rn}+
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	# Store some magic numbers in memory.
+	mov #40, r1
+	shll8 r1
+	mov #85, r0
+	mov.l r0, @r1
+	# Keep for later.
+	mov r1, r10
+store2:
+	mov #40, r1
+	shll8 r1
+	add #12, r1
+	mov #17, r0
+	mov.l r0, @r1
+	# Keep for later.
+	mov r1, r11
+
+init:
+	# Set up addresses.
+	mov #40, r1
+	shll8 r1
+	mov #40, r2
+	shll8 r2
+	add #12, r2
+
+	# Prime {MACL, MACH} to #1.
+	mov #1, r3
+	dmulu.l r3, r3
+
+test:
+	mac.w @r1+, @r2+
+
+check:
+	# Check result.
+	sts mach, r5
+	assert r5, #0
+
+	sts macl, r6
+	assert r6, #1
+
+	# Ensure post-increment occurred.
+	add #2, r10
+	cmp/eq r10, r1
+	bf wrong
+
+	add #2, r11
+	cmp/eq r11, r2
+	bf wrong
+
+doubleinc:
+	mov #40, r0
+	shll8 r0
+	mov r0, r1
+	mac.w @r0+, @r0+
+	add #8, r1
+	cmp/eq r0, r1
+	bf wrong
+	
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/mov.cgs

@@ -0,0 +1,40 @@
+# sh testcase for mov $rm64, $rn64
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global mov
+mov:
+	mov #1, r0
+	rotr r0
+	mov #0, r15
+	mov #10, r0
+
+	mov r0, r1
+	mov r1, r2
+	mov r2, r3
+	mov r3, r4
+	mov r4, r5
+	mov r5, r6
+	mov r6, r7
+	mov r7, r8
+	mov r8, r9
+	mov r9, r10
+	mov r10, r11
+	mov r11, r12
+	mov r12, r13
+	mov r13, r14
+	mov r14, r15
+
+	cmp/eq r0, r15
+	bf wrong
+	
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/mova.cgs

@@ -0,0 +1,29 @@
+# sh testcase for mova @($imm8x4, pc), r0 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global mova
+mova:
+	mova @(40, pc), r0
+	mov #16, r1
+	shll8 r1
+	add #40, r1
+	cmp/eq r0, r1
+	bf wrong
+	mova @(12, pc), r0
+	mov #16, r1
+	shll8 r1
+	add #24, r1
+	cmp/eq r0, r1
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb1.cgs

@@ -0,0 +1,27 @@
+# sh testcase for mov.b $rm, @$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #55, r1
+	mov #40, r2
+	shll8 r2
+	mov.b r1, @r2
+
+	# Load it back into r3.
+	mov #40, r2
+	shll8 r2
+	mov.b @r2, r3
+
+	# Make sure r1 and r3 match.
+	cmp/eq r1, r3
+	bf wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb10.cgs

@@ -0,0 +1,25 @@
+# sh testcase for mov.b @($imm4, $rm), r0 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r1
+	shll8 r1
+	# Store something there first.
+	mov #0, r0
+	or #170, r0
+	mov r0, r7
+	mov.b r0, @(3, r1)
+	# Load it back.
+	mov.b @(3, r1), r0
+	and #255, r0
+	cmp/eq r0, r7
+	bf wrong
+
+okay:
+	pass
+wrong:	
+	fail

sim/testsuite/sim/sh64/compact/movb2.cgs

@@ -0,0 +1,34 @@
+# sh testcase for mov.b $rm, @-$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #40, r1
+	shll8 r1
+	mov #55, r2
+	
+	# Save ADDR, DATA.
+	mov r1, r7
+	mov r2, r8
+
+	# Do the move.
+	mov.b r2, @-r1
+	
+	# Load the value back into r3.
+	mov.b @r1, r3
+	cmp/eq r2, r3
+	bf wrong
+
+	# Ensure that r1 has been decremented.
+	mov #1, r0
+	sub r0, r7
+	cmp/eq r7, r1
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb3.cgs

@@ -0,0 +1,30 @@
+# sh testcase for mov.b $rm, @(r0,$rn) -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #40, r2
+	shll8 r2
+	mov #3, r1
+	mov #0, r0
+	or #170, r0
+	mov r0, r3
+	mov r2, r0
+	mov.b r3, @(r0, r1)
+
+	# Load the value back into a different register.
+	mov.b @(r0, r1), r4
+	# Check the lowest order byte matches the stored value.
+	mov r4, r0
+	and #255, r0
+	cmp/eq r0, r3
+	bf wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb4.cgs

@@ -0,0 +1,28 @@
+# sh testcase for mov.b r0, @($imm8, gbr) -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #0, r0
+	or #170, r0
+	mov r0, r3
+	mov #30, r2
+	ldc r2, gbr
+	mov.b r0, @(40, gbr)
+
+	# Load the value back into a different register.
+	mov.b @(40, gbr), r0
+	# Check the lowest order byte matches the stored value.
+	and #255, r0
+	cmp/eq r0, r3
+	bf wrong
+
+okay:	
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movb5.cgs

@@ -0,0 +1,25 @@
+# sh testcase for mov.b r0, @($imm4, rm) -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #0, r0
+	or #170, r0
+	mov r0, r3
+	mov #30, r2
+	mov.b r0, @(3, r2)
+
+	# Load the value back into a different register.
+	mov.b @(3, r2), r0
+	and #255, r0
+	cmp/eq r3, r0
+	bf wrong
+
+okay:	
+	pass
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movb6.cgs

@@ -0,0 +1,26 @@
+# sh testcase for mov.b @$rm, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r2
+	shll8 r2
+	# Store something first.
+	mov #0, r0
+	or #170, r0
+	mov r0, r7
+	mov.b r7, @r2
+	# Load it back.
+	mov.b @r2, r1
+	mov r1, r0
+	and #255, r0
+	cmp/eq r7, r0
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb7.cgs

@@ -0,0 +1,35 @@
+# sh testcase for mov.b @${rm}+, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r1
+	shll8 r1
+	# Store addr.
+	mov r1, r8
+
+	# Store something there first.
+	mov #0, r0
+	or #170, r0
+	mov r0, r7
+	mov.b r7, @r1
+	# Load it back.
+	mov.b @r1+, r2
+	mov r2, r0
+	and #255, r0
+	cmp/eq r7, r0
+	bf wrong
+
+	# Test address for post-incrementing.
+	add #1, r8
+	cmp/eq r8, r1
+	bf wrong
+
+okay:	
+	pass
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movb8.cgs

@@ -0,0 +1,27 @@
+# sh testcase for mov.b @(r0, $rm), $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r0
+	shll8 r0
+	mov #14, r1
+	# Store something there first.
+	mov #0, r0
+	or #170, r0
+	mov r0, r7
+	mov.b r7, @(r0, r1)
+	# Load it back.
+	mov.b @(r0, r1), r2
+	mov r2, r0
+	and #255, r0
+	cmp/eq r0, r7
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movb9.cgs

@@ -0,0 +1,27 @@
+# sh testcase for mov.b @($imm8, gbr), r0 -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r0
+	shll8 r0
+	ldc r0, gbr
+	# Store something there first.
+	mov #0, r0
+	or #170, r0
+	mov r0, r7
+	mov.b r0, @(3, gbr)
+	# Load it back.
+	mov.b @(3, gbr), r0
+	and #255, r0
+	cmp/eq r7, r0
+	bf wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movcal.cgs

@@ -0,0 +1,28 @@
+# sh testcase for movca.l r0, @$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global movcal
+movcal:
+	mov #1, r0
+	rotr r0
+	add #128, r0
+	mov #40, r1
+	shll8 r1
+	movca.l r0, @r1
+
+	# Load the word back in.
+	mov.l @r1, r3
+	cmp/eq r0, r3
+	bf wrong
+	
+okay:
+	pass
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movi.cgs

@@ -0,0 +1,39 @@
+# sh testcase for mov #$imm8, $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	.global movi
+movi:
+	mov #0, r0
+	cmp/eq #0, r0
+	bf wrong
+	
+	mov #1, r0
+	cmp/eq #1, r0
+	bf wrong
+	
+	mov #255, r0
+	cmp/eq #255, r0
+	bf wrong
+
+	mov #1, r15
+	mov #1, r0
+	cmp/eq r0, r15
+	bf wrong
+
+	mov #255, r15
+	mov r15, r0
+	cmp/eq r0, r15
+	bf wrong
+
+okay:
+	pass
+
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movl1.cgs

@@ -0,0 +1,31 @@
+# sh testcase for mov.l $rm, @$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r1
+	shll8 r1
+init:
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+
+	mov.l r2, @r1
+
+	# Load it back.
+	mov.l @r1, r3
+	cmp/eq r2, r3
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movl10.cgs

@@ -0,0 +1,34 @@
+# sh testcase for mov.l @($imm8x4, pc), $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+init:
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+
+	# Store to memory.
+	mov #16, r1
+	shll8 r1
+	add #32, r1
+	mov.l r2, @r1
+check:
+	# Read it back.
+	mov.l @(12, pc), r0
+	cmp/eq r2, r0
+	bf wrong
+	
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movl11.cgs

@@ -0,0 +1,32 @@
+# sh testcase for mov.l @($imm4x4, $rm), $rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+	mov #30, r0
+	shll8 r0
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+	# Store something first.
+	mov.l r2, @(12, r0)
+
+check:
+	# Read it back.
+	mov.l @(12, r0), r1
+	cmp/eq r2, r1
+	bf wrong
+	
+okay:
+	pass
+wrong:
+	fail
+	

sim/testsuite/sim/sh64/compact/movl2.cgs

@@ -0,0 +1,43 @@
+# sh testcase for mov.l $rm, @-$rn -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+	mov #30, r1
+	shll8 r1
+	# Save address.
+	mov r1, r7
+
+init:
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+	mov.l r2, @-r1
+
+check:
+	# Compare the value loaded into another reg.
+	mov.l @r1, r3
+	cmp/eq r2, r3
+	bf wrong
+	
+dec:
+	# Ensure address is decremented.
+	mov #4, r6
+	sub r6, r7
+	cmp/eq r1, r7
+	bf wrong
+
+okay:	
+	pass
+
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movl3.cgs

@@ -0,0 +1,36 @@
+# sh testcase for mov.l $rm, @(r0, $rn)
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+setaddr:
+	mov #0, r0
+	mov #30, r1
+	shll8 r1
+
+init:
+	# Build up a distinctive bit pattern.
+	mov #1, r2
+	shll8 r2
+	add #12, r2
+	shll8 r2
+	add #85, r2
+	shll8 r2
+	add #170, r2
+
+	mov.l r2, @(r0, r1)
+
+check:
+	# Load it back.
+	mov.l @(r0, r1), r3
+	cmp/eq r2, r3
+	bf wrong
+
+okay:
+	pass
+wrong:
+	fail

sim/testsuite/sim/sh64/compact/movl4.cgs

@@ -0,0 +1,38 @@
+# sh testcase for mov.l r0, @($imm8x4, gbr) -*- Asm -*-
+# mach: all
+# as: -isa=shcompact
+# ld: -m shelf32
+
+	.include "compact/testutils.inc"
+
+	start
+
+setaddr:
+	mov #30, r1
+	shll8 r1
+	ldc r1, gbr
+
+init:
+	# Build up a distinctive bit pattern.
+	mov #1, r0
+	shll8 r0
+	add #12, r0
+	shll8 r0
+	add #85, r0
+	shll8 r0
+	add #170, r0
+	# Preserve.
+	mov r0, r7
+
+	mov.l r0, @(4, gbr)
+check:
+	# Load it back.
+	mov.l @(4, gbr), r0
+	cmp/eq r0, r7
+	bf wrong
+
+okay:	
+	pass
+wrong:
+	fail
+