* opcodes disassembler extension
[includes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * dis-asm.h (disassemble_info): New field `insn_sets'. (INIT_DISASSEMBLE_INFO): Clear it. [opcodes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
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4 changed files with 16 additions and 1 deletions
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@ -73,6 +73,11 @@ typedef struct disassemble_info {
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unsigned long mach;
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/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
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enum bfd_endian endian;
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/* An arch/mach-specific bitmask of selected instruction subsets, mainly
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for processors with run-time-switchable instruction sets. The default,
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zero, means that there is no constraint. CGEN-based opcodes ports
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may use ISA_foo masks. */
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unsigned long insn_sets;
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/* Some targets need information about the current section to accurately
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display insns. If this is NULL, the target disassembler function
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@ -275,6 +280,7 @@ extern int generic_symbol_at_address
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(INFO).flavour = bfd_target_unknown_flavour, \
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(INFO).arch = bfd_arch_unknown, \
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(INFO).mach = 0, \
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(INFO).insn_sets = 0, \
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(INFO).endian = BFD_ENDIAN_UNKNOWN, \
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(INFO).octets_per_byte = 1, \
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INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
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