Initial creation of sourceware repository
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Stan Shebs
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356
sim/m32r/arch.c
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356
sim/m32r/arch.c
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/* Simulator support for m32r.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
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This file is part of the GNU Simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "sim-main.h"
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#include "bfd.h"
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const MACH *sim_machs[] =
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{
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#ifdef HAVE_CPU_M32RBF
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& m32r_mach,
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#endif
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0
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};
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/* Get the value of h-pc. */
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USI
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a_m32r_h_pc_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_pc_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-pc. */
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void
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a_m32r_h_pc_set (SIM_CPU *current_cpu, USI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_pc_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-gr. */
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SI
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a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_gr_get (current_cpu, regno);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-gr. */
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void
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a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_gr_set (current_cpu, regno, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-cr. */
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USI
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a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_cr_get (current_cpu, regno);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-cr. */
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void
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a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_cr_set (current_cpu, regno, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-accum. */
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DI
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a_m32r_h_accum_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_accum_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-accum. */
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void
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a_m32r_h_accum_set (SIM_CPU *current_cpu, DI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_accum_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-accums. */
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DI
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a_m32r_h_accums_get (SIM_CPU *current_cpu, UINT regno)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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default :
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abort ();
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}
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}
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/* Set a value for h-accums. */
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void
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a_m32r_h_accums_set (SIM_CPU *current_cpu, UINT regno, DI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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default :
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abort ();
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}
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}
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/* Get the value of h-cond. */
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BI
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a_m32r_h_cond_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_cond_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-cond. */
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void
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a_m32r_h_cond_set (SIM_CPU *current_cpu, BI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_cond_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-psw. */
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UQI
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a_m32r_h_psw_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_psw_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-psw. */
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void
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a_m32r_h_psw_set (SIM_CPU *current_cpu, UQI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_psw_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-bpsw. */
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UQI
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a_m32r_h_bpsw_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_bpsw_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-bpsw. */
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void
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a_m32r_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_bpsw_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-bbpsw. */
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UQI
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a_m32r_h_bbpsw_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_bbpsw_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-bbpsw. */
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void
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a_m32r_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_bbpsw_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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/* Get the value of h-lock. */
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BI
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a_m32r_h_lock_get (SIM_CPU *current_cpu)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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return m32rbf_h_lock_get (current_cpu);
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#endif
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default :
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abort ();
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}
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}
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/* Set a value for h-lock. */
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void
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a_m32r_h_lock_set (SIM_CPU *current_cpu, BI newval)
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{
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switch (STATE_ARCHITECTURE (CPU_STATE (current_cpu))->mach)
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{
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#ifdef HAVE_CPU_M32RBF
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case bfd_mach_m32r :
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m32rbf_h_lock_set (current_cpu, newval);
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break;
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#endif
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default :
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abort ();
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}
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}
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