Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.

opcodes	* arc-nps400-tbl.h: Add Ultra Ip and Miscellaneous instructions format.
	* arc-opc.c: Add defines. e.g. F_NJ, F_NM , F_NO_T, F_NPS_SR, F_NPS_M, F_NPS_CORE, F_NPS_ALL.
	(insert_nps_misc_imm_offset): New function.
	(extract_nps_misc imm_offset): New function.
	(arc_num_flag_operands): Add F_NJ, F_NM, F_NO_T.
	(arc_flag_special_cases): Add F_NJ, F_NM, F_NO_T.

include * opcode/arc.h (insn_class_t): Add ULTRAIP and MISC class.

gas     * testsuite/gas/arc/nps400-12.s: New file.
        * testsuite/gas/arc/nps400-12.d: New file.
This commit is contained in:
Rinat Zelig 2017-03-27 11:14:30 +01:00 committed by Nick Clifton
parent cf31b44f3c
commit c0c31e91ad
8 changed files with 759 additions and 356 deletions

View file

@ -68,6 +68,7 @@ typedef enum
LOGICAL,
LOOP,
MEMORY,
MISC,
MOVE,
MPY,
NET,
@ -77,6 +78,7 @@ typedef enum
PUSH,
STORE,
SUB,
ULTRAIP,
XY
} insn_class_t;
@ -141,7 +143,7 @@ typedef enum
struct arc_opcode
{
/* The opcode name. */
const char *name;
const char * name;
/* The opcode itself. Those bits which will be filled in with
operands are zeroes. */
@ -371,7 +373,7 @@ extern const unsigned arc_NToperand;
struct arc_flag_operand
{
/* The flag name. */
const char *name;
const char * name;
/* The flag code. */
unsigned code;
@ -453,13 +455,13 @@ struct arc_operand_operation
struct arc_pseudo_insn
{
/* Mnemonic for pseudo/alias insn. */
const char *mnemonic_p;
const char * mnemonic_p;
/* Mnemonic for real instruction. */
const char *mnemonic_r;
const char * mnemonic_r;
/* Flag that will have to be added (if any). */
const char *flag_r;
const char * flag_r;
/* Amount of operands. */
unsigned operand_cnt;
@ -486,7 +488,7 @@ struct arc_aux_reg
insn_subclass_t subclass;
/* Register name. */
const char *name;
const char * name;
/* Size of the string. */
size_t length;