Convert amd64-linux target descriptions
This patch changes amd64-linux target descriptions so that they can be dynamically generated in both GDB and GDBserver. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * Makefile.in (arch-amd64.o): New rule. * configure.srv: Append arch-amd64.o. * linux-amd64-ipa.c: Include common/x86-xstate.h. (get_ipa_tdesc): Call amd64_linux_read_description. (initialize_low_tracepoint): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-low.c (x86_linux_read_description): Call amd64_linux_read_description. (x86_get_ipa_tdesc_idx): Call amd64_get_ipa_tdesc_idx. (initialize_low_arch): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc-selftest.c: Declare init_registers_amd64_XXX and tdesc_amd64_XXX. [__x86_64__] (amd64_tdesc_test): New function. (initialize_low_tdesc) [__x86_64__]: Call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc.c: Include arch/amd64.h. (xcr0_to_tdesc_idx): New function. (i386_linux_read_description): New function. (amd64_get_ipa_tdesc_idx): New function. * linux-x86-tdesc.h (amd64_get_ipa_tdesc_idx): Declare. (amd64_get_ipa_tdesc): Declare. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * amd64-linux-tdep.c: Include arch/amd64.h. Don't include features/i386/*.c. (amd64_linux_read_description): Call amd64_create_target_description. * arch/amd64.c: New file. * arch/amd64.h: New file. * configure.tgt (x86_64-*-linux*): Append amd64.o. * Makefile.in (ALL_64_TARGET_OBS): Append amd64.o.
This commit is contained in:
Yao Qi
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6c73f67f9c
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b4570e4b30
14 changed files with 378 additions and 213 deletions
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@ -22,6 +22,51 @@
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#include "linux-x86-tdesc.h"
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#include "arch/i386.h"
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#include "common/x86-xstate.h"
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#ifdef __x86_64__
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#include "arch/amd64.h"
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#endif
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/* Return the right x86_linux_tdesc index for a given XCR0. Return
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X86_TDESC_LAST if can't find a match. */
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static enum x86_linux_tdesc
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xcr0_to_tdesc_idx (uint64_t xcr0, bool is_x32)
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{
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if (xcr0 & X86_XSTATE_PKRU)
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{
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if (is_x32)
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{
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/* No x32 MPX and PKU, fall back to avx_avx512. */
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return X86_TDESC_AVX_AVX512;
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}
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else
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return X86_TDESC_AVX_MPX_AVX512_PKU;
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}
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else if (xcr0 & X86_XSTATE_AVX512)
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return X86_TDESC_AVX_AVX512;
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else if ((xcr0 & X86_XSTATE_AVX_MPX_MASK) == X86_XSTATE_AVX_MPX_MASK)
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{
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if (is_x32) /* No MPX on x32. */
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return X86_TDESC_AVX;
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else
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return X86_TDESC_AVX_MPX;
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}
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else if (xcr0 & X86_XSTATE_MPX)
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{
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if (is_x32) /* No MPX on x32. */
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return X86_TDESC_AVX;
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else
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return X86_TDESC_MPX;
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}
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else if (xcr0 & X86_XSTATE_AVX)
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return X86_TDESC_AVX;
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else if (xcr0 & X86_XSTATE_SSE)
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return X86_TDESC_SSE;
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else if (xcr0 & X86_XSTATE_X87)
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return X86_TDESC_MMX;
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else
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return X86_TDESC_LAST;
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}
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static struct target_desc *i386_tdescs[X86_TDESC_LAST] = { };
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@ -32,26 +77,13 @@ static struct target_desc *i386_tdescs[X86_TDESC_LAST] = { };
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const struct target_desc *
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i386_linux_read_description (uint64_t xcr0)
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{
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struct target_desc **tdesc = NULL;
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enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, false);
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if (xcr0 & X86_XSTATE_PKRU)
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tdesc = &i386_tdescs[X86_TDESC_AVX_MPX_AVX512_PKU];
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else if (xcr0 & X86_XSTATE_AVX512)
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tdesc = &i386_tdescs[X86_TDESC_AVX_AVX512];
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else if ((xcr0 & X86_XSTATE_AVX_MPX_MASK) == X86_XSTATE_AVX_MPX_MASK)
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tdesc = &i386_tdescs[X86_TDESC_AVX_MPX];
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else if (xcr0 & X86_XSTATE_MPX)
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tdesc = &i386_tdescs[X86_TDESC_MPX];
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else if (xcr0 & X86_XSTATE_AVX)
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tdesc = &i386_tdescs[X86_TDESC_AVX];
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else if (xcr0 & X86_XSTATE_SSE)
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tdesc = &i386_tdescs[X86_TDESC_SSE];
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else if (xcr0 & X86_XSTATE_X87)
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tdesc = &i386_tdescs[X86_TDESC_MMX];
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if (tdesc == NULL)
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if (idx == X86_TDESC_LAST)
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return NULL;
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struct target_desc **tdesc = &i386_tdescs[idx];
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if (*tdesc == NULL)
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{
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*tdesc = i386_create_target_description (xcr0);
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@ -68,7 +100,44 @@ i386_linux_read_description (uint64_t xcr0)
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}
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#endif
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#ifdef __x86_64__
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static target_desc *amd64_tdescs[X86_TDESC_LAST] = { };
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static target_desc *x32_tdescs[X86_TDESC_LAST] = { };
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const struct target_desc *
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amd64_linux_read_description (uint64_t xcr0, bool is_x32)
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{
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enum x86_linux_tdesc idx = xcr0_to_tdesc_idx (xcr0, is_x32);
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if (idx == X86_TDESC_LAST)
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return NULL;
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struct target_desc **tdesc = NULL;
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if (is_x32)
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tdesc = &x32_tdescs[idx];
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else
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tdesc = &amd64_tdescs[idx];
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if (*tdesc == NULL)
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{
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*tdesc = amd64_create_target_description (xcr0, is_x32);
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init_target_desc (*tdesc);
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#ifndef IN_PROCESS_AGENT
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static const char *expedite_regs_amd64[] = { "rbp", "rsp", "rip", NULL };
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(*tdesc)->expedite_regs = expedite_regs_amd64;
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#endif
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}
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return *tdesc;
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}
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#endif
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#ifndef IN_PROCESS_AGENT
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int
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i386_get_ipa_tdesc_idx (const struct target_desc *tdesc)
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{
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@ -82,4 +151,23 @@ i386_get_ipa_tdesc_idx (const struct target_desc *tdesc)
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return X86_TDESC_MMX;
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}
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#if defined __x86_64__
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int
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amd64_get_ipa_tdesc_idx (const struct target_desc *tdesc)
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{
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for (int i = 0; i < X86_TDESC_LAST; i++)
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{
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if (tdesc == amd64_tdescs[i])
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return i;
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}
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for (int i = 0; i < X86_TDESC_LAST; i++)
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{
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if (tdesc == x32_tdescs[i])
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return i;
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}
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return X86_TDESC_SSE;
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}
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#endif
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#endif
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