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include/opcode/

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* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
        * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
        * ia64-opc-m.c: Add ld8.mov.
        * ia64-asmtab.c: Regenerate.
gas/
        * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
        * gas/ia64/ldxmov-1.[ds]: New.
        * gas/ia64/ldxmov-2.[ls]: New.
        * gas/ia64/ia64.exp: Run them.
This commit is contained in:
Richard Henderson 2002-12-03 18:15:48 +00:00
parent 144da3c187
commit a823923bf6
15 changed files with 3453 additions and 3369 deletions
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4
bfd/ChangeLog
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@ -1,3 +1,7 @@
2002-12-03 Richard Henderson <rth@redhat.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
2002-12-01 Stephane Carrez <stcarrez@nerim.fr>
Fix PR savannah/1417:

3
bfd/cpu-ia64-opc.c
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@ -586,4 +586,7 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
"a branch target" },
{ REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */
"a branch target" },
{ ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */
"ldxmov target" },
};

4
gas/ChangeLog
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@ -1,3 +1,7 @@
2002-12-03 Richard Henderson <rth@redhat.com>
* config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
2002-12-03 Alan Modra <amodra@bigpond.net.au>
* config/tc-w65.c (s_longa): Prototype. Make static, specify int arg.

9
gas/config/tc-ia64.c
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@ -5523,6 +5523,15 @@ operand_match (idesc, index, e)
}
break;
case IA64_OPND_LDXMOV:
fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fix->code = BFD_RELOC_IA64_LDXMOV;
fix->opnd = idesc->operands[index];
fix->expr = *e;
fix->is_pcrel = 0;
++CURR_SLOT.num_fixups;
return OPERAND_MATCH;
default:
break;
}

6
gas/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2002-12-03 Richard Henderson <rth@redhat.com>
* gas/ia64/ldxmov-1.[ds]: New.
* gas/ia64/ldxmov-2.[ls]: New.
* gas/ia64/ia64.exp: Run them.
2002-12-03 Alan Modra <amodra@bigpond.net.au>
* gas/arm/adrl.s: Test behaviour against globals too.

2
gas/testsuite/gas/ia64/ia64.exp
View file

@ -36,4 +36,6 @@ if [istarget "ia64-*"] then {
run_dump_test "dv-safe"
run_dump_test "dv-srlz"
run_dump_test "tls"
run_dump_test "ldxmov-1"
run_list_test "ldxmov-2" ""
}

18
gas/testsuite/gas/ia64/ldxmov-1.d Normal file
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@ -0,0 +1,18 @@
#objdump: -dr
#name: ia64 ldxmov-1
.*: file format elf64-ia64-little
Disassembly of section \.text:
0*0000000 <\.text>:
0: 18 10 00 06 18 10 \[MMB\] ld8 r2=\[r3\]
0: LDXMOV foo
1: LDXMOV \.data
6: 40 00 14 30 20 00 ld8 r4=\[r5\]
c: 00 00 00 20 nop\.b 0x0
10: 19 30 00 0e 18 10 \[MMB\] ld8 r6=\[r7\]
10: LDXMOV foo\+0x64
11: LDXMOV \.data\+0x64
16: 80 00 24 30 20 00 ld8 r8=\[r9\]
1c: 00 00 00 20 nop.b 0x0;;

8
gas/testsuite/gas/ia64/ldxmov-1.s Normal file
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@ -0,0 +1,8 @@
.text
ld8.mov r2 = [r3], foo#
ld8.mov r4 = [r5], bar#
ld8.mov r6 = [r7], foo# + 100
ld8.mov r8 = [r9], bar# + 100
.data
bar:

5
gas/testsuite/gas/ia64/ldxmov-2.l Normal file
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@ -0,0 +1,5 @@
.*: Assembler messages:
.*:5: Warning: Use of 'ld8.mov' violates RAW dependency .*number is 2
.*:4: Warning: This is the location of the conflicting usage
.*:8: Warning: Use of 'mov' violates RAW dependency .*number is 2
.*:7: Warning: This is the location of the conflicting usage

8
gas/testsuite/gas/ia64/ldxmov-2.s Normal file
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@ -0,0 +1,8 @@
.text
.explicit
mov r2 = r0
ld8.mov r3 = [r2], foo#
;;
ld8.mov r2 = [r0], foo#
mov r3 = r2

4
include/opcode/ChangeLog
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@ -1,3 +1,7 @@
2002-12-03 Richard Henderson <rth@redhat.com>
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
2002-12-03 Alan Modra <amodra@bigpond.net.au>
* cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.

1
include/opcode/ia64.h
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@ -133,6 +133,7 @@ enum ia64_opnd
IA64_OPND_TGT25b, /* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
IA64_OPND_TGT25c, /* signed 25-bit (ip + 16*bits 13-32, 36) */
IA64_OPND_TGT64, /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
IA64_OPND_LDXMOV, /* any symbol, generates R_IA64_LDXMOV. */
IA64_OPND_COUNT /* # of operand types (MUST BE LAST!) */
};

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2002-12-03 Richard Henderson <rth@redhat.com>
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
2002-12-02 Alan Modra <amodra@bigpond.net.au>
* arm-dis.c (print_insn_arm): Constify "insn". Formatting.

6741
opcodes/ia64-asmtab.c
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File diff suppressed because it is too large Load diff

4
opcodes/ia64-opc-m.c
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@ -265,6 +265,10 @@ struct ia64_opcode ia64_opcodes_m[] =
{"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY},
{"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY},
/* Pseudo-op that generates ldxmov relocation. */
{"ld8.mov", M, OpMXX6aHint (4, 0, 0, 0x03, 0),
{R1, MR3, IA64_OPND_LDXMOV}, EMPTY},
/* Integer load w/increment by register. */
#define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL
{"ld1", LDINCREG (0x00, 0)},