[MIPS/GAS] Add Loongson EXT2 Instructions support.

bfd/
	* elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.

binutils/
	* readelf.c (print_mips_ases): Add Loongson EXT2 extension.

gas/
	* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
	OPTION_NO_LOONGSON_EXT2.
	(md_longopts): Likewise.
	(mips_ases): Define availability for EXT.
	(mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to
	AFL_ASE_LOONGSON_EXT2.
	(md_show_usage): Add help for -mloongson-ext2 and
	-mno-loongson-ext2.
	* doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2.
	* doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2,
	.set loongson-ext2 and .set noloongson-ext2.
	* testsuite/gas/mips/loongson-ext2.d: New test.
	* testsuite/gas/mips/loongson-ext2.s: New test.
	* testsuite/gas/mips/mips.exp: Run loongson-ext2 test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
	* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.

opcodes/
	* mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext
	option.
	(print_mips_disassembler_options): Document -M loongson-ext.
	* mips-opc.c (LEXT2): New macro.
	(mips_opcodes): Add cto, ctz, dcto, dctz instructions.

bfd/ChangeLog

@@ -1,3 +1,7 @@
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
 	 * elfxx-mips.c (infer_mips_abiflags): Use ases instead of

bfd/elfxx-mips.c

@@ -15681,6 +15681,8 @@ print_mips_ases (FILE *file, unsigned int mask)
     fputs ("\n\tLoongson CAM ASE", file);
   if (mask & AFL_ASE_LOONGSON_EXT)
     fputs ("\n\tLoongson EXT ASE", file);
+  if (mask & AFL_ASE_LOONGSON_EXT2)
+    fputs ("\n\tLoongson EXT2 ASE", file);
   if (mask == 0)
     fprintf (file, "\n\t%s", _("None"));
   else if ((mask & ~AFL_ASE_MASK) != 0)

binutils/ChangeLog

@@ -1,3 +1,7 @@
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* readelf.c (print_mips_ases): Add Loongson EXT2 extension.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
 	 * readelf.c (print_mips_ases): Add Loongson EXT extension.

binutils/readelf.c

@@ -15655,6 +15655,8 @@ print_mips_ases (unsigned int mask)
     fputs ("\n\tLoongson CAM ASE", stdout);
   if (mask & AFL_ASE_LOONGSON_EXT)
     fputs ("\n\tLoongson EXT ASE", stdout);
+  if (mask & AFL_ASE_LOONGSON_EXT2)
+    fputs ("\n\tLoongson EXT2 ASE", stdout);
   if (mask == 0)
     fprintf (stdout, "\n\t%s", _("None"));
   else if ((mask & ~AFL_ASE_MASK) != 0)

gas/ChangeLog

@@ -1,3 +1,21 @@
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
+	* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
+	OPTION_NO_LOONGSON_EXT2.
+	(md_longopts): Likewise.
+	(mips_ases): Define availability for EXT.
+	(mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to
+	AFL_ASE_LOONGSON_EXT2.
+	(md_show_usage): Add help for -mloongson-ext2 and
+	-mno-loongson-ext2.
+	* doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2.
+	* doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2,
+	.set loongson-ext2 and .set noloongson-ext2.
+	* testsuite/gas/mips/loongson-ext2.d: New test.
+	* testsuite/gas/mips/loongson-ext2.s: New test.
+	* testsuite/gas/mips/mips.exp: Run loongson-ext2 test.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
 	 * NEWS: Mention Loongson EXTensions (EXT) support.

gas/NEWS

@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
+
 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 
 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.

gas/config/tc-mips.c

@@ -1535,6 +1535,8 @@ enum options
     OPTION_NO_LOONGSON_CAM,
     OPTION_LOONGSON_EXT,
     OPTION_NO_LOONGSON_EXT,
+    OPTION_LOONGSON_EXT2,
+    OPTION_NO_LOONGSON_EXT2,
     OPTION_END_OF_ENUM
   };
 
@@ -1601,6 +1603,8 @@ struct option md_longopts[] =
   {"mno-loongson-cam", no_argument, NULL, OPTION_NO_LOONGSON_CAM},
   {"mloongson-ext", no_argument, NULL, OPTION_LOONGSON_EXT},
   {"mno-loongson-ext", no_argument, NULL, OPTION_NO_LOONGSON_EXT},
+  {"mloongson-ext2", no_argument, NULL, OPTION_LOONGSON_EXT2},
+  {"mno-loongson-ext2", no_argument, NULL, OPTION_NO_LOONGSON_EXT2},
 
   /* Old-style architecture options.  Don't add more of these.  */
   {"m4650", no_argument, NULL, OPTION_M4650},
@@ -1813,6 +1817,11 @@ static const struct mips_ase mips_ases[] = {
     OPTION_LOONGSON_EXT, OPTION_NO_LOONGSON_EXT,
     0, 0, -1, -1,
     -1 },
+
+  { "loongson-ext2", ASE_LOONGSON_EXT | ASE_LOONGSON_EXT2, 0,
+    OPTION_LOONGSON_EXT2, OPTION_NO_LOONGSON_EXT2,
+    0, 0, -1, -1,
+    -1 },
 };
 
 /* The set of ASEs that require -mfp64.  */
@@ -1820,7 +1829,8 @@ static const struct mips_ase mips_ases[] = {
 
 /* Groups of ASE_* flags that represent different revisions of an ASE.  */
 static const unsigned int mips_ase_groups[] = {
-  ASE_DSP | ASE_DSPR2 | ASE_DSPR3
+  ASE_DSP | ASE_DSPR2 | ASE_DSPR3, 
+  ASE_LOONGSON_EXT | ASE_LOONGSON_EXT2 
 };
 
 /* Pseudo-op table.
@@ -19050,6 +19060,8 @@ mips_convert_ase_flags (int ase)
     ext_ases |= AFL_ASE_LOONGSON_CAM;
   if (ase & ASE_LOONGSON_EXT)
     ext_ases |= AFL_ASE_LOONGSON_EXT;
+  if (ase & ASE_LOONGSON_EXT2)
+    ext_ases |= AFL_ASE_LOONGSON_EXT2;
 
   return ext_ases;
 }
@@ -20080,6 +20092,9 @@ MIPS options:\n\
 -mloongson-ext		generate Loongson EXTensions (EXT) instructions\n\
 -mno-loongson-ext	do not generate Loongson EXTensions Instructions\n"));
   fprintf (stream, _("\
+-mloongson-ext2		generate Loongson EXTensions R2 (EXT2) instructions\n\
+-mno-loongson-ext2	do not generate Loongson EXTensions R2 Instructions\n"));
+  fprintf (stream, _("\
 -minsn32		only generate 32-bit microMIPS instructions\n\
 -mno-insn32		generate all microMIPS instructions\n"));
   fprintf (stream, _("\

gas/doc/as.texi

@@ -447,6 +447,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{-mloongson-mmi}] [@b{-mno-loongson-mmi}]
    [@b{-mloongson-cam}] [@b{-mno-loongson-cam}]
    [@b{-mloongson-ext}] [@b{-mno-loongson-ext}]
+   [@b{-mloongson-ext2}] [@b{-mno-loongson-ext2}]
    [@b{-minsn32}] [@b{-mno-insn32}]
    [@b{-mfix7000}] [@b{-mno-fix7000}]
    [@b{-mfix-rm7000}] [@b{-mno-fix-rm7000}]
@@ -1587,6 +1588,13 @@ Generate code for the Loongson EXTensions (EXT) instructions.
 This tells the assembler to accept Loongson EXT instructions.
 @samp{-mno-loongson-ext} turns off this option.
 
+@item -mloongson-ext2
+@itemx -mno-loongson-ext2
+Generate code for the Loongson EXTensions R2 (EXT2) instructions.
+This option implies @samp{-mloongson-ext}.
+This tells the assembler to accept Loongson EXT2 instructions.
+@samp{-mno-loongson-ext2} turns off this option.
+
 @item -minsn32
 @itemx -mno-insn32
 Only use 32-bit instruction encodings when generating code for the

gas/doc/c-mips.texi

@@ -267,6 +267,13 @@ Application Specific Extension.  This tells the assembler to accept EXT
 instructions.
 @samp{-mno-loongson-ext} turns off this option.
 
+@item -mloongson-ext2
+@itemx -mno-loongson-ext2
+Generate code for the Loongson EXTensions R2 (EXT2) instructions
+Application Specific Extension.  This tells the assembler to accept EXT2
+instructions.
+@samp{-mno-loongson-ext2} turns off this option.
+
 @item -minsn32
 @itemx -mno-insn32
 Only use 32-bit instruction encodings when generating code for the
@@ -1182,6 +1189,15 @@ instructions from the Loongson EXT from that point on in the assembly.
 The @code{.set noloongson-ext} directive prevents Loongson EXT instructions
 from being accepted.
 
+@cindex Loongson EXTensions R2 (EXT2) instructions generation override
+@kindex @code{.set loongson-ext2}
+@kindex @code{.set noloongson-ext2}
+The directive @code{.set loongson-ext2} makes the assembler accept
+instructions from the Loongson EXT2 from that point on in the assembly.
+This directive implies @code{.set loognson-ext}.
+The @code{.set noloongson-ext2} directive prevents Loongson EXT2 instructions
+from being accepted.
+
 Traditional MIPS assemblers do not support these directives.
 
 @node MIPS Floating-Point

gas/testsuite/gas/mips/loongson-ext2.d

@@ -0,0 +1,28 @@
+#as: -mloongson-ext2 -mabi=64
+#objdump: -M reg-names=numeric -M loongson-ext2 -dp
+#name: Loongson EXT2 tests
+
+.*:     file format .*
+
+private flags = .*
+
+MIPS ABI Flags Version: 0
+ISA: .*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: .*
+FP ABI: .*
+ISA Extension: None
+ASEs:
+	Loongson EXT ASE
+	Loongson EXT2 ASE
+FLAGS 1: .*
+FLAGS 2: .*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.text>:
+.*:	70801062 	cto	\$2,\$4
+.*:	70801022 	ctz	\$2,\$4
+.*:	708010e2 	dcto	\$2,\$4
+.*:	708010a2 	dctz	\$2,\$4

gas/testsuite/gas/mips/loongson-ext2.s

@@ -0,0 +1,7 @@
+	.text
+	.set noreorder
+
+	cto	$2,$4
+	ctz	$2,$4
+	dcto	$2,$4
+	dctz	$2,$4

gas/testsuite/gas/mips/mips.exp

@@ -1395,6 +1395,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "loongson-3a-mmi"
 
     run_dump_test "loongson-cam"
+    run_dump_test "loongson-ext2"
 
     if { $has_newabi } {
 	run_dump_test_arches "octeon"	[mips_arch_list_matching octeon]

include/ChangeLog

@@ -1,3 +1,9 @@
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
+	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
+	* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
 	 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.

include/elf/mips.h

@@ -1241,7 +1241,8 @@ extern void bfd_mips_elf_swap_abiflags_v0_out
 #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE.  */
 #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE.  */
 #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions.  */
-#define AFL_ASE_MASK         0x001effff /* All ASEs.  */
+#define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions.  */
+#define AFL_ASE_MASK         0x003effff /* All ASEs.  */
 
 /* Values for the isa_ext word of an ABI flags structure.  */
 

include/opcode/mips.h

@@ -1308,6 +1308,8 @@ static const unsigned int mips_isa_table[] = {
 #define ASE_LOONGSON_CAM	0x00400000
 /* Loongson EXTensions (EXT) instructions.  */
 #define ASE_LOONGSON_EXT	0x00800000
+/* Loongson EXTensions R2 (EXT2) instructions.  */
+#define ASE_LOONGSON_EXT2	0x01000000
 
 /* MIPS ISA defines, use instead of hardcoding ISA level.  */
 

opcodes/ChangeLog

@@ -1,3 +1,11 @@
+2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext
+	option.
+	(print_mips_disassembler_options): Document -M loongson-ext.
+	* mips-opc.c (LEXT2): New macro.
+	(mips_opcodes): Add cto, ctz, dcto, dctz instructions.
+
 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 
 	 * mips-dis.c (mips_arch_choices): Add EXT to loongson3a

opcodes/mips-dis.c

@@ -948,6 +948,13 @@ parse_mips_ase_option (const char *option)
       return TRUE;
     }
   
+  /* Put here for match ext2 frist */
+  if (CONST_STRNEQ (option, "loongson-ext2"))
+    {
+      mips_ase |= ASE_LOONGSON_EXT2;
+      return TRUE;
+    }
+
   if (CONST_STRNEQ (option, "loongson-ext"))
     {
       mips_ase |= ASE_LOONGSON_EXT;
@@ -2613,6 +2620,10 @@ static struct
 		  N_("Recognize the Loongson EXTensions (EXT) "
 		     " instructions.\n"),
 		  MIPS_OPTION_ARG_NONE },
+  { "loongson-ext2",
+		  N_("Recognize the Loongson EXTensions R2 (EXT2) "
+		     " instructions.\n"),
+		  MIPS_OPTION_ARG_NONE },
   { "gpr-names=", N_("Print GPR names according to specified ABI.\n\
                   Default: based on binary being disassembled.\n"),
 		  MIPS_OPTION_ARG_ABI },

opcodes/mips-opc.c

@@ -420,6 +420,9 @@ decode_mips_operand (const char *p)
 /* Loongson EXTensions (EXT) instructions support.  */
 #define LEXT	ASE_LOONGSON_EXT
 
+/* Loongson EXTensions R2 (EXT2) instructions support.  */
+#define LEXT2	ASE_LOONGSON_EXT2
+
 /* The order of overloaded instructions matters.  Label arguments and
    register arguments look the same. Instructions that can have either
    for arguments must apear in the correct order in this table for the
@@ -518,6 +521,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"gssq",		"+z,t,+c(b)",	0xe8000020, 0xfc008020,	RD_1|RD_2|RD_4|SM,	0,		0,		LEXT,	0 },
 {"gslqc1",		"+Z,T,+c(b)",	0xc8008020, 0xfc008020,	WR_1|WR_2|RD_4|LM,	0,		0,		LEXT,	0 },
 {"gssqc1",		"+Z,T,+c(b)",	0xe8008020, 0xfc008020,	RD_1|RD_2|RD_4|SM,	0,		0,		LEXT,	0 },
+{"cto",			"d,s",		0x70000062, 0xfc1f07ff,	WR_1|RD_2,		0,		0,		LEXT2,	0 },
+{"ctz",			"d,s",		0x70000022, 0xfc1f07ff,	WR_1|RD_2,		0,		0,		LEXT2,	0 },
+{"dcto",		"d,s",		0x700000e2, 0xfc1f07ff,	WR_1|RD_2,		0,		0,		LEXT2,	0 },
+{"dctz",		"d,s",		0x700000a2, 0xfc1f07ff,	WR_1|RD_2,		0,		0,		LEXT2,	0 },
 
 /* R5900 VU0 Macromode instructions. */
 {"vabs",		"+7+K,+6+K",	  0x4a0001fd, 0xfe0007ff,	CP,		VU0CH,		VU0,		0,	0 },