[cpu]
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, indexld, indexls): .w variants have `1' bit. (rot32.b): QI, not SI. (rot32.w): HI, not SI. (xchg16): HI for .w variant. [opcodes] * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
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10 changed files with 1614 additions and 716 deletions
174
cpu/m32c.cpu
174
cpu/m32c.cpu
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@ -6702,59 +6702,91 @@
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;-------------------------------------------------------------
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; lde dsp24,dst -- for m16c
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; TODO abs20[a0], [a0a1] for dsp24
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;-------------------------------------------------------------
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(define-pmacro (lde-defn mach dstgroup dsp mode wstr op encoding sem)
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(dni (.sym op mach wstr -dst-dspsp- dstgroup)
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(.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
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((machine mach))
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(.str op wstr " ${" dsp "},${dst" mach "-" dstgroup "-" mode "}")
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encoding
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(sem mode (.sym dst mach - dstgroup - mode) dsp)
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())
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)
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(define-pmacro (lde-dst mode wstr wbit op opc1 opc2 opc3 sem)
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(define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
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(begin
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(lde-defn 16 basic Dsp-16-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20)
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sem)
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(lde-defn 16 16-16 Dsp-32-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20)
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sem)
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(lde-defn 16 16-8 Dsp-24-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20)
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sem)
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(dni (.sym lde wstr - dstgroup -u20)
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(.str "lde" wstr "-" dstgroup "-u20")
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((machine 16))
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(.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
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(.sym dst16- dstgroup - mode) srcdisp)
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(nop)
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())
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(dni (.sym lde wstr - dstgroup -u20a0)
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(.str "lde" wstr "-" dstgroup "-u20a0")
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((machine 16))
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(.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
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(.sym dst16- dstgroup - mode) srcdisp)
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(nop)
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())
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(dni (.sym lde wstr - dstgroup -a1a0)
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(.str "lde" wstr "-" dstgroup "-a1a0")
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((machine 16))
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(.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
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(.sym dst16- dstgroup - mode))
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(nop)
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())
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)
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)
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(define-pmacro (lde-dst mode wstr wbit)
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(begin
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; like: QI .b 0
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(lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
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(lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
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(lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
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)
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)
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;-------------------------------------------------------------
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; ste src,dsp24 -- for m16c
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; TODO abs20[a0], [a0a1] for dsp24
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; ste dst,dsp24 -- for m16c
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;-------------------------------------------------------------
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(define-pmacro (ste-defn mach dstgroup dsp mode wstr op encoding sem)
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(dni (.sym op mach wstr -dst-dspsp- dstgroup)
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(.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
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((machine mach))
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(.str op wstr " ${dst" mach "-" dstgroup "-" mode "},${" dsp "}")
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encoding
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(sem mode (.sym dst mach - dstgroup - mode) dsp)
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())
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)
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(define-pmacro (ste-dst mode wstr wbit op opc1 opc2 opc3 sem)
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(define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
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(begin
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(ste-defn 16 basic Dsp-16-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-u20)
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sem)
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(ste-defn 16 16-16 Dsp-32-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-u20)
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sem)
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(ste-defn 16 16-8 Dsp-24-u20 mode wstr op
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(+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-u20)
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sem)
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(dni (.sym ste wstr - dstgroup -u20)
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(.str "ste" wstr "-" dstgroup "-u20")
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((machine 16))
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(.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
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(.sym dst16- dstgroup - mode) srcdisp)
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(nop)
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())
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(dni (.sym ste wstr - dstgroup -u20a0)
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(.str "ste" wstr "-" dstgroup "-u20a0")
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((machine 16))
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(.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
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(.sym dst16- dstgroup - mode) srcdisp)
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(nop)
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())
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(dni (.sym ste wstr - dstgroup -a1a0)
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(.str "ste" wstr "-" dstgroup "-a1a0")
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((machine 16))
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(.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
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(+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
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(.sym dst16- dstgroup - mode))
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(nop)
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())
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)
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)
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(define-pmacro (ste-dst mode wstr wbit)
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(begin
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; like: QI .b 0
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(ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
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(ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
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(ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
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)
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)
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@ -7905,31 +7937,31 @@
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; indexb src (index byte)
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(unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
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(unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
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(unary32-defn HI .w 1 indexb #x8 1 #x3 indexb-sem)
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; indexbd src (index byte dest)
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(unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
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(unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
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(unary32-defn HI .w 1 indexbd #xA 1 3 indexbd-sem)
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; indexbs src (index byte src)
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(unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
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(unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
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(unary32-defn HI .w 1 indexbs #xC 1 3 indexbs-sem)
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; indexl src (index long)
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(unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
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(unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
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(unary32-defn HI .w 1 indexl 9 3 3 indexl-sem)
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; indexld src (index long dest)
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(unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
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(unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
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(unary32-defn HI .w 1 indexld #xB 3 3 indexld-sem)
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; indexls src (index long src)
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(unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
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(unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
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(unary32-defn HI .w 1 indexls 9 1 3 indexls-sem)
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; indexw src (index word)
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(unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
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(unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
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(unary32-defn HI .w 1 indexw 8 3 3 indexw-sem)
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; indexwd src (index word dest)
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(unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
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(unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
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(unary32-defn HI .w 1 indexwd #xA 3 3 indexwd-sem)
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; indexws (index word src)
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(unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
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(unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
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(unary32-defn HI .w 1 indexws #xC 3 3 indexws-sem)
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;-------------------------------------------------------------
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; jcc - jump on condition
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; ste - store to extra far data area (m16)
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;-------------------------------------------------------------
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; A special variant of mem16 for lde and ste
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(define-pmacro (extra-mem16 mode address)
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(mem mode (and #xfffff address)))
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(lde-dst QI .b 0)
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(lde-dst HI .w 1)
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(define-pmacro (lde-sem mode src1 dst)
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(set mode src1 (extra-mem16 mode dst))
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)
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(lde-dst QI .b 0 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem)
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(lde-dst HI .w 1 lde (f-0-4 #x7) (f-4-3 2) (f-8-4 #x8) lde-sem)
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(define-pmacro (ste-sem mode src1 dst)
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(set (extra-mem16 mode dst) src1)
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)
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(ste-dst QI .b 0 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem)
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(ste-dst HI .w 1 ste (f-0-4 #x7) (f-4-3 2) (f-8-4 #x0) ste-sem)
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(ste-dst QI .b 0)
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(ste-dst HI .w 1)
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;-------------------------------------------------------------
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; ldipl - load interrupt permission level
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; rot.BW src,dst
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(dni rot16.b-dst "rot r1h,dest" ((machine 16))
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("rot.b r1h,${dst16-16-HI}")
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(+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-HI)
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(rot-2-sem QI dst16-16-HI)
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("rot.b r1h,${dst16-16-QI}")
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(+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
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(rot-2-sem QI dst16-16-QI)
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())
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(dni rot16.w-dst "rot r1h,dest" ((machine 16))
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("rot.w r1h,${dst16-16-HI}")
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())
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(dni rot32.b-dst "rot r1h,dest" ((machine 32))
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("rot.b r1h,${dst32-16-Unprefixed-SI}")
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(+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
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(rot-2-sem QI dst32-16-Unprefixed-SI)
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("rot.b r1h,${dst32-16-Unprefixed-QI}")
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(+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
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(rot-2-sem QI dst32-16-Unprefixed-QI)
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())
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(dni rot32.w-dst "rot r1h,dest" ((machine 32))
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("rot.w r1h,${dst32-16-Unprefixed-SI}")
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(+ (f-0-4 #xA) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
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(rot-2-sem HI dst32-16-Unprefixed-SI)
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("rot.w r1h,${dst32-16-Unprefixed-HI}")
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(+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
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(rot-2-sem HI dst32-16-Unprefixed-HI)
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())
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;-------------------------------------------------------------
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@ -10215,7 +10237,7 @@
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(xchg16-defn QI b 0 1 r0h)
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(xchg16-defn QI b 0 2 r1l)
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(xchg16-defn QI b 0 3 r1h)
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(xchg16-defn QI w 1 0 r0)
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(xchg16-defn HI w 1 0 r0)
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(xchg16-defn HI w 1 1 r1)
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(xchg16-defn HI w 1 2 r2)
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(xchg16-defn HI w 1 3 r3)
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