gas: default TC_VALIDATE_FIX_SUB to 0
gas/write.c provides a fallback TC_VALIDATE_FIX_SUB define that can be a problem for some targets, the problem being that a non-zero definition of TC_VALIDATE_FIX_SUB says that some uses of fx_subsy are OK, in effect that the target will handle fx_subsy in md_apply_fix and/or tc_gen_reloc. A lot of targets don't have the necessary md_apply_fix and tc_gen_reloc support. So a safer default is to disallow fx_subsy by default. I've had a good look over target usage of fx_subsy, and think I've caught all the cases where targets need TC_VALIDATE_FIX_SUB. Possible failures would be limited to alpha, microblaze, ppc and s390 (the targets that define UNDEFINED_DIFFERENCE_OK), or targets that generate fixups with BFD_RELOC_GPREL32/16 and use a syntax explicitly showing a difference expression. * write.c (TC_VALIDATE_FIX_SUB): Default to 0. * config/tc-hppa.h (TC_VALIDATE_FIX_SUB): Define. * config/tc-microblaze.h (TC_VALIDATE_FIX_SUB): Define. * config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define for ECOFF. * config/tc-ppc.h (TC_VALIDATE_FIX_SUB): Don't define for ELF. Do define for XCOFF.
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6 changed files with 27 additions and 13 deletions
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@ -1,3 +1,12 @@
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2021-07-14 Alan Modra <amodra@gmail.com>
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* write.c (TC_VALIDATE_FIX_SUB): Default to 0.
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* config/tc-hppa.h (TC_VALIDATE_FIX_SUB): Define.
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* config/tc-microblaze.h (TC_VALIDATE_FIX_SUB): Define.
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* config/tc-alpha.h (TC_VALIDATE_FIX_SUB): Define for ECOFF.
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* config/tc-ppc.h (TC_VALIDATE_FIX_SUB): Don't define for ELF.
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Do define for XCOFF.
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2021-07-14 Clément Chigot <clement.chigot@atos.net>
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* config/tc-ppc.c (ppc_change_debug_section): Update to
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@ -470,7 +479,7 @@
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* testsuite/gas/mips/mips2@cp3m.d: New test.
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* testsuite/gas/mips/r3000@cp3m.d: New test.
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* testsuite/gas/mips/r3900@cp3m.d: New test.
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* testsuite/gas/mips/mips2@cp3d.d: New test.
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* testsuite/gas/mips/mips2@cp3d.d: New test.
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* testsuite/gas/mips/cp0b.l: New test stderr output.
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* testsuite/gas/mips/cp0bl.l: New test stderr output.
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* testsuite/gas/mips/cp0c.l: New test stderr output.
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@ -116,6 +116,11 @@ extern void alpha_handle_align (struct frag *);
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#ifdef OBJ_ECOFF
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#define tc_frob_file_before_adjust() alpha_frob_file_before_adjust ()
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extern void alpha_frob_file_before_adjust (void);
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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((md_register_arithmetic || (SEG) != reg_section) \
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&& ((FIX)->fx_r_type == BFD_RELOC_GPREL32 \
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|| (FIX)->fx_r_type == BFD_RELOC_GPREL16))
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#endif
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#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs. */
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@ -127,6 +127,10 @@ int hppa_fix_adjustable (struct fix *);
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/* Values passed to md_apply_fix don't include the symbol value. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* The PA needs this for PIC code generation. */
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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(md_register_arithmetic || (SEG) != reg_section)
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#ifdef OBJ_SOM
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/* If a symbol is imported, but never used, then the symbol should
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*not* end up in the symbol table. Likewise for absolute symbols
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@ -51,6 +51,9 @@ extern bfd_reloc_code_real_type parse_cons_expression_microblaze
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|| (FIX)->fx_r_type == BFD_RELOC_MICROBLAZE_64_GOTOFF \
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|| (FIX)->fx_r_type == BFD_RELOC_MICROBLAZE_32_GOTOFF)
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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(md_register_arithmetic || (SEG) != reg_section)
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#define tc_fix_adjustable(X) tc_microblaze_fix_adjustable(X)
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extern int tc_microblaze_fix_adjustable (struct fix *);
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@ -285,8 +285,6 @@ extern int ppc_force_relocation (struct fix *);
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|| (FIX)->fx_r_type == BFD_RELOC_PPC64_D34 \
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|| (FIX)->fx_r_type == BFD_RELOC_PPC64_D28))
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 0
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#endif /* OBJ_ELF */
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#define RELOC_EXPANSION_POSSIBLE
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@ -303,6 +301,10 @@ extern int ppc_force_relocation (struct fix *);
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/* XCOFF allows undefined differences which will be encoded with
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R_NEG relocations. */
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#define UNDEFINED_DIFFERENCE_OK
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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(md_register_arithmetic || (SEG) != reg_section)
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#endif /* OBJ_XCOFF */
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/* Various frobbings of labels and their addresses. */
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11
gas/write.c
11
gas/write.c
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@ -69,16 +69,7 @@
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#endif
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#ifndef TC_VALIDATE_FIX_SUB
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#ifdef UNDEFINED_DIFFERENCE_OK
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/* The PA needs this for PIC code generation. */
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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(md_register_arithmetic || (SEG) != reg_section)
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#else
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
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((md_register_arithmetic || (SEG) != reg_section) \
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&& ((FIX)->fx_r_type == BFD_RELOC_GPREL32 \
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|| (FIX)->fx_r_type == BFD_RELOC_GPREL16))
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#endif
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 0
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#endif
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#ifndef TC_LINKRELAX_FIXUP
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