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sim: bfin: fix brace style

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This commit is contained in:
Mike Frysinger 2011-03-15 20:44:11 +00:00
parent 227d265839
commit 990d19fd6d
58 changed files with 342 additions and 161 deletions
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20
sim/bfin/ChangeLog
View file

@ -1,3 +1,23 @@
2011-03-15 Mike Frysinger <vapier@gentoo.org>
* bfroms/bf50x-0.0.h, bfroms/bf51x-0.0.h, bfroms/bf51x-0.1.h,
bfroms/bf51x-0.2.h, bfroms/bf526-0.0.h, bfroms/bf526-0.1.h,
bfroms/bf527-0.0.h, bfroms/bf527-0.1.h, bfroms/bf527-0.2.h,
bfroms/bf533-0.1.h, bfroms/bf533-0.2.h, bfroms/bf533-0.3.h,
bfroms/bf537-0.0.h, bfroms/bf537-0.1.h, bfroms/bf537-0.3.h,
bfroms/bf538-0.0.h, bfroms/bf54x-0.0.h, bfroms/bf54x-0.1.h,
bfroms/bf54x-0.2.h, bfroms/bf54x_l1-0.0.h, bfroms/bf54x_l1-0.1.h,
bfroms/bf54x_l1-0.2.h, bfroms/bf561-0.5.h, bfroms/bf59x-0.0.h,
bfroms/bf59x_l1-0.1.h, dv-bfin_cec.c, dv-bfin_ctimer.c,
dv-bfin_dma.c, dv-bfin_dmac.c, dv-bfin_ebiu_amc.c,
dv-bfin_ebiu_ddrc.c, dv-bfin_ebiu_sdc.c, dv-bfin_emac.c,
dv-bfin_eppi.c, dv-bfin_evt.c, dv-bfin_gptimer.c, dv-bfin_jtag.c,
dv-bfin_mmu.c, dv-bfin_nfc.c, dv-bfin_otp.c, dv-bfin_pll.c,
dv-bfin_ppi.c, dv-bfin_rtc.c, dv-bfin_sic.c, dv-bfin_spi.c,
dv-bfin_trace.c, dv-bfin_twi.c, dv-bfin_uart.c, dv-bfin_uart2.c,
dv-bfin_wdog.c, dv-bfin_wp.c, dv-eth_phy.c, gui.c,
linux-fixed-code.h, linux-targ-map.h, machs.c, Makefile.in: Fix style.
2011-03-15 Robin Getz <robin.getz@analog.com> 2011-03-15 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds

3
sim/bfin/Makefile.in
View file

@ -53,7 +53,8 @@ $(srcdir)/linux-fixed-code.h: $(srcdir)/linux-fixed-code.s Makefile.in
$(AS_FOR_TARGET) $< -o linux-fixed-code.o $(AS_FOR_TARGET) $< -o linux-fixed-code.o
( set -e; \ ( set -e; \
echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
echo "static const unsigned char bfin_linux_fixed_code[] = {"; \ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
echo "{"; \
$(OBJDUMP_FOR_TARGET) -d -z linux-fixed-code.o > $@.dis; \ $(OBJDUMP_FOR_TARGET) -d -z linux-fixed-code.o > $@.dis; \
sed -n $@.dis \ sed -n $@.dis \
-e 's:^[^ ]* :0x:' \ -e 's:^[^ ]* :0x:' \

3
sim/bfin/bfroms/bf50x-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf50x_0_0[] = { static const char bfrom_bf50x_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf51x-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf51x_0_0[] = { static const char bfrom_bf51x_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf51x-0.1.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf51x_0_1[] = { static const char bfrom_bf51x_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf51x-0.2.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf51x_0_2[] = { static const char bfrom_bf51x_0_2[] =
{
}; };

3
sim/bfin/bfroms/bf526-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf526_0_0[] = { static const char bfrom_bf526_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf526-0.1.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf526_0_1[] = { static const char bfrom_bf526_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf527-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf527_0_0[] = { static const char bfrom_bf527_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf527-0.1.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf527_0_1[] = { static const char bfrom_bf527_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf527-0.2.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf527_0_2[] = { static const char bfrom_bf527_0_2[] =
{
}; };

3
sim/bfin/bfroms/bf533-0.1.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf533_0_1[] = { static const char bfrom_bf533_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf533-0.2.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf533_0_2[] = { static const char bfrom_bf533_0_2[] =
{
}; };

3
sim/bfin/bfroms/bf533-0.3.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf533_0_3[] = { static const char bfrom_bf533_0_3[] =
{
}; };

3
sim/bfin/bfroms/bf537-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf537_0_0[] = { static const char bfrom_bf537_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf537-0.1.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf537_0_1[] = { static const char bfrom_bf537_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf537-0.3.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf537_0_3[] = { static const char bfrom_bf537_0_3[] =
{
}; };

3
sim/bfin/bfroms/bf538-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf538_0_0[] = { static const char bfrom_bf538_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf54x-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_0_0[] = { static const char bfrom_bf54x_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf54x-0.1.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_0_1[] = { static const char bfrom_bf54x_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf54x-0.2.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_0_2[] = { static const char bfrom_bf54x_0_2[] =
{
}; };

3
sim/bfin/bfroms/bf54x_l1-0.0.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_l1_0_0[] = { static const char bfrom_bf54x_l1_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf54x_l1-0.1.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_l1_0_1[] = { static const char bfrom_bf54x_l1_0_1[] =
{
}; };

3
sim/bfin/bfroms/bf54x_l1-0.2.h
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@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf54x_l1_0_2[] = { static const char bfrom_bf54x_l1_0_2[] =
{
}; };

3
sim/bfin/bfroms/bf561-0.5.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf561_0_5[] = { static const char bfrom_bf561_0_5[] =
{
}; };

3
sim/bfin/bfroms/bf59x-0.0.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf59x_0_0[] = { static const char bfrom_bf59x_0_0[] =
{
}; };

3
sim/bfin/bfroms/bf59x_l1-0.1.h
View file

@ -1,3 +1,4 @@
/* DO NOT EDIT: Autogenerated. */ /* DO NOT EDIT: Autogenerated. */
static const char bfrom_bf59x_l1_0_1[] = { static const char bfrom_bf59x_l1_0_1[] =
{
}; };

9
sim/bfin/dv-bfin_cec.c
View file

@ -39,7 +39,8 @@ struct bfin_cec
#define mmr_base() offsetof(struct bfin_cec, evt_override) #define mmr_base() offsetof(struct bfin_cec, evt_override)
#define mmr_offset(mmr) (offsetof(struct bfin_cec, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_cec, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"EVT_OVERRIDE", "IMASK", "IPEND", "ILAT", "IPRIO", "EVT_OVERRIDE", "IMASK", "IPEND", "ILAT", "IPRIO",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -127,7 +128,8 @@ bfin_cec_io_read_buffer (struct hw *me, void *dest,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_cec_ports[] = { static const struct hw_port_descriptor bfin_cec_ports[] =
{
{ "emu", IVG_EMU, 0, input_port, }, { "emu", IVG_EMU, 0, input_port, },
{ "rst", IVG_RST, 0, input_port, }, { "rst", IVG_RST, 0, input_port, },
{ "nmi", IVG_NMI, 0, input_port, }, { "nmi", IVG_NMI, 0, input_port, },
@ -210,7 +212,8 @@ const struct hw_descriptor dv_bfin_cec_descriptor[] = {
{NULL, NULL}, {NULL, NULL},
}; };
static const char * const excp_decoded[] = { static const char * const excp_decoded[] =
{
[VEC_SYS ] = "Custom exception 0 (system call)", [VEC_SYS ] = "Custom exception 0 (system call)",
[VEC_EXCPT01 ] = "Custom exception 1 (software breakpoint)", [VEC_EXCPT01 ] = "Custom exception 1 (software breakpoint)",
[VEC_EXCPT02 ] = "Custom exception 2 (KGDB hook)", [VEC_EXCPT02 ] = "Custom exception 2 (KGDB hook)",

6
sim/bfin/dv-bfin_ctimer.c
View file

@ -37,7 +37,8 @@ struct bfin_ctimer
#define mmr_base() offsetof(struct bfin_ctimer, tcntl) #define mmr_base() offsetof(struct bfin_ctimer, tcntl)
#define mmr_offset(mmr) (offsetof(struct bfin_ctimer, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_ctimer, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"TCNTL", "TPERIOD", "TSCALE", "TCOUNT", "TCNTL", "TPERIOD", "TSCALE", "TCOUNT",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -211,7 +212,8 @@ bfin_ctimer_io_read_buffer (struct hw *me, void *dest,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_ctimer_ports[] = { static const struct hw_port_descriptor bfin_ctimer_ports[] =
{
{ "ivtmr", IVG_IVTMR, 0, output_port, }, { "ivtmr", IVG_IVTMR, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

6
sim/bfin/dv-bfin_dma.c
View file

@ -68,7 +68,8 @@ struct bfin_dma
#define mmr_base() offsetof(struct bfin_dma, next_desc_ptr) #define mmr_base() offsetof(struct bfin_dma, next_desc_ptr)
#define mmr_offset(mmr) (offsetof(struct bfin_dma, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_dma, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"NEXT_DESC_PTR", "START_ADDR", "CONFIG", "<INV>", "X_COUNT", "X_MODIFY", "NEXT_DESC_PTR", "START_ADDR", "CONFIG", "<INV>", "X_COUNT", "X_MODIFY",
"Y_COUNT", "Y_MODIFY", "CURR_DESC_PTR", "CURR_ADDR", "IRQ_STATUS", "Y_COUNT", "Y_MODIFY", "CURR_DESC_PTR", "CURR_ADDR", "IRQ_STATUS",
"PERIPHERAL_MAP", "CURR_X_COUNT", "<INV>", "CURR_Y_COUNT", "<INV>", "PERIPHERAL_MAP", "CURR_X_COUNT", "<INV>", "CURR_Y_COUNT", "<INV>",
@ -494,7 +495,8 @@ bfin_dma_dma_write_buffer (struct hw *me, const void *source,
return ret; return ret;
} }
static const struct hw_port_descriptor bfin_dma_ports[] = { static const struct hw_port_descriptor bfin_dma_ports[] =
{
{ "di", 0, 0, output_port, }, /* DMA Interrupt */ { "di", 0, 0, output_port, }, /* DMA Interrupt */
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

72
sim/bfin/dv-bfin_dmac.c
View file

@ -84,13 +84,15 @@ bfin_dmac_default_pmap (struct hw *dma)
return CTYPE; /* MDMA */ return CTYPE; /* MDMA */
} }
static const char *bfin_dmac_50x_pmap[] = { static const char *bfin_dmac_50x_pmap[] =
{
"ppi@0", "rsi", "sport@0", "sport@0", "sport@1", "sport@1", "ppi@0", "rsi", "sport@0", "sport@0", "sport@1", "sport@1",
"spi@0", "spi@1", "uart2@0", "uart2@0", "uart2@1", "uart2@1", "spi@0", "spi@1", "uart2@0", "uart2@0", "uart2@1", "uart2@1",
}; };
/* XXX: Need to figure out how to handle portmuxed DMA channels. */ /* XXX: Need to figure out how to handle portmuxed DMA channels. */
static const struct hw_port_descriptor bfin_dmac_50x_ports[] = { static const struct hw_port_descriptor bfin_dmac_50x_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "rsi", 1, 0, input_port, }, { "rsi", 1, 0, input_port, },
{ "sport@0_rx", 2, 0, input_port, }, { "sport@0_rx", 2, 0, input_port, },
@ -106,13 +108,15 @@ static const struct hw_port_descriptor bfin_dmac_50x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac_51x_pmap[] = { static const char *bfin_dmac_51x_pmap[] =
{
"ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1", "ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1",
"sport@1", "spi@0", "uart@0", "uart@0", "uart@1", "uart@1", "sport@1", "spi@0", "uart@0", "uart@0", "uart@1", "uart@1",
}; };
/* XXX: Need to figure out how to handle portmuxed DMA channels. */ /* XXX: Need to figure out how to handle portmuxed DMA channels. */
static const struct hw_port_descriptor bfin_dmac_51x_ports[] = { static const struct hw_port_descriptor bfin_dmac_51x_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "emac_rx", 1, 0, input_port, }, { "emac_rx", 1, 0, input_port, },
{ "emac_tx", 2, 0, input_port, }, { "emac_tx", 2, 0, input_port, },
@ -130,14 +134,16 @@ static const struct hw_port_descriptor bfin_dmac_51x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac_52x_pmap[] = { static const char *bfin_dmac_52x_pmap[] =
{
"ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1", "ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1",
"sport@1", "spi", "uart@0", "uart@0", "uart@1", "uart@1", "sport@1", "spi", "uart@0", "uart@0", "uart@1", "uart@1",
}; };
/* XXX: Need to figure out how to handle portmuxed DMA channels /* XXX: Need to figure out how to handle portmuxed DMA channels
like PPI/NFC here which share DMA0. */ like PPI/NFC here which share DMA0. */
static const struct hw_port_descriptor bfin_dmac_52x_ports[] = { static const struct hw_port_descriptor bfin_dmac_52x_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
/*{ "nfc", 0, 0, input_port, },*/ /*{ "nfc", 0, 0, input_port, },*/
{ "emac_rx", 1, 0, input_port, }, { "emac_rx", 1, 0, input_port, },
@ -156,12 +162,14 @@ static const struct hw_port_descriptor bfin_dmac_52x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac_533_pmap[] = { static const char *bfin_dmac_533_pmap[] =
{
"ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi", "ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi",
"uart@0", "uart@0", "uart@0", "uart@0",
}; };
static const struct hw_port_descriptor bfin_dmac_533_ports[] = { static const struct hw_port_descriptor bfin_dmac_533_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "sport@0_tx", 1, 0, input_port, }, { "sport@0_tx", 1, 0, input_port, },
{ "sport@0_rx", 2, 0, input_port, }, { "sport@0_rx", 2, 0, input_port, },
@ -173,12 +181,14 @@ static const struct hw_port_descriptor bfin_dmac_533_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac_537_pmap[] = { static const char *bfin_dmac_537_pmap[] =
{
"ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1", "ppi@0", "emac", "emac", "sport@0", "sport@0", "sport@1",
"sport@1", "spi", "uart@0", "uart@0", "uart@1", "uart@1", "sport@1", "spi", "uart@0", "uart@0", "uart@1", "uart@1",
}; };
static const struct hw_port_descriptor bfin_dmac_537_ports[] = { static const struct hw_port_descriptor bfin_dmac_537_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "emac_rx", 1, 0, input_port, }, { "emac_rx", 1, 0, input_port, },
{ "emac_tx", 2, 0, input_port, }, { "emac_tx", 2, 0, input_port, },
@ -194,12 +204,14 @@ static const struct hw_port_descriptor bfin_dmac_537_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac0_538_pmap[] = { static const char *bfin_dmac0_538_pmap[] =
{
"ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi@0", "ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi@0",
"uart@0", "uart@0", "uart@0", "uart@0",
}; };
static const struct hw_port_descriptor bfin_dmac0_538_ports[] = { static const struct hw_port_descriptor bfin_dmac0_538_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "sport@0_rx", 1, 0, input_port, }, { "sport@0_rx", 1, 0, input_port, },
{ "sport@0_tx", 2, 0, input_port, }, { "sport@0_tx", 2, 0, input_port, },
@ -211,12 +223,14 @@ static const struct hw_port_descriptor bfin_dmac0_538_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac1_538_pmap[] = { static const char *bfin_dmac1_538_pmap[] =
{
"sport@2", "sport@2", "sport@3", "sport@3", NULL, NULL, "sport@2", "sport@2", "sport@3", "sport@3", NULL, NULL,
"spi@1", "spi@2", "uart@1", "uart@1", "uart@2", "uart@2", "spi@1", "spi@2", "uart@1", "uart@1", "uart@2", "uart@2",
}; };
static const struct hw_port_descriptor bfin_dmac1_538_ports[] = { static const struct hw_port_descriptor bfin_dmac1_538_ports[] =
{
{ "sport@2_rx", 0, 0, input_port, }, { "sport@2_rx", 0, 0, input_port, },
{ "sport@2_tx", 1, 0, input_port, }, { "sport@2_tx", 1, 0, input_port, },
{ "sport@3_rx", 2, 0, input_port, }, { "sport@3_rx", 2, 0, input_port, },
@ -230,12 +244,14 @@ static const struct hw_port_descriptor bfin_dmac1_538_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac0_54x_pmap[] = { static const char *bfin_dmac0_54x_pmap[] =
{
"sport@0", "sport@0", "sport@1", "sport@1", "spi@0", "spi@1", "sport@0", "sport@0", "sport@1", "sport@1", "spi@0", "spi@1",
"uart2@0", "uart2@0", "uart2@1", "uart2@1", "atapi", "atapi", "uart2@0", "uart2@0", "uart2@1", "uart2@1", "atapi", "atapi",
}; };
static const struct hw_port_descriptor bfin_dmac0_54x_ports[] = { static const struct hw_port_descriptor bfin_dmac0_54x_ports[] =
{
{ "sport@0_rx", 0, 0, input_port, }, { "sport@0_rx", 0, 0, input_port, },
{ "sport@0_tx", 1, 0, input_port, }, { "sport@0_tx", 1, 0, input_port, },
{ "sport@1_rx", 2, 0, input_port, }, { "sport@1_rx", 2, 0, input_port, },
@ -251,13 +267,15 @@ static const struct hw_port_descriptor bfin_dmac0_54x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac1_54x_pmap[] = { static const char *bfin_dmac1_54x_pmap[] =
{
"eppi@0", "eppi@1", "eppi@2", "pixc", "pixc", "pixc", "eppi@0", "eppi@1", "eppi@2", "pixc", "pixc", "pixc",
"sport@2", "sport@2", "sport@3", "sport@3", "sdh", "sport@2", "sport@2", "sport@3", "sport@3", "sdh",
"spi@2", "uart2@2", "uart2@2", "uart2@3", "uart2@3", "spi@2", "uart2@2", "uart2@2", "uart2@3", "uart2@3",
}; };
static const struct hw_port_descriptor bfin_dmac1_54x_ports[] = { static const struct hw_port_descriptor bfin_dmac1_54x_ports[] =
{
{ "eppi@0", 0, 0, input_port, }, { "eppi@0", 0, 0, input_port, },
{ "eppi@1", 1, 0, input_port, }, { "eppi@1", 1, 0, input_port, },
{ "eppi@2", 2, 0, input_port, }, { "eppi@2", 2, 0, input_port, },
@ -278,11 +296,13 @@ static const struct hw_port_descriptor bfin_dmac1_54x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac0_561_pmap[] = { static const char *bfin_dmac0_561_pmap[] =
{
"sport@0", "sport@0", "sport@1", "sport@1", "spi", "uart@0", "uart@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi", "uart@0", "uart@0",
}; };
static const struct hw_port_descriptor bfin_dmac0_561_ports[] = { static const struct hw_port_descriptor bfin_dmac0_561_ports[] =
{
{ "sport@0_rx", 0, 0, input_port, }, { "sport@0_rx", 0, 0, input_port, },
{ "sport@0_tx", 1, 0, input_port, }, { "sport@0_tx", 1, 0, input_port, },
{ "sport@1_rx", 2, 0, input_port, }, { "sport@1_rx", 2, 0, input_port, },
@ -293,22 +313,26 @@ static const struct hw_port_descriptor bfin_dmac0_561_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac1_561_pmap[] = { static const char *bfin_dmac1_561_pmap[] =
{
"ppi@0", "ppi@1", "ppi@0", "ppi@1",
}; };
static const struct hw_port_descriptor bfin_dmac1_561_ports[] = { static const struct hw_port_descriptor bfin_dmac1_561_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "ppi@1", 1, 0, input_port, }, { "ppi@1", 1, 0, input_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const char *bfin_dmac_59x_pmap[] = { static const char *bfin_dmac_59x_pmap[] =
{
"ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi@0", "ppi@0", "sport@0", "sport@0", "sport@1", "sport@1", "spi@0",
"spi@1", "uart@0", "uart@0", "spi@1", "uart@0", "uart@0",
}; };
static const struct hw_port_descriptor bfin_dmac_59x_ports[] = { static const struct hw_port_descriptor bfin_dmac_59x_ports[] =
{
{ "ppi@0", 0, 0, input_port, }, { "ppi@0", 0, 0, input_port, },
{ "sport@0_tx", 1, 0, input_port, }, { "sport@0_tx", 1, 0, input_port, },
{ "sport@0_rx", 2, 0, input_port, }, { "sport@0_rx", 2, 0, input_port, },

9
sim/bfin/dv-bfin_ebiu_amc.c
View file

@ -58,14 +58,17 @@ struct bfin_ebiu_amc
#define mmr_offset(mmr) (offsetof(struct bfin_ebiu_amc, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_amc, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const bf50x_mmr_names[] = { static const char * const bf50x_mmr_names[] =
{
"EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1", "EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1",
[mmr_idx (bf50x.mode)] = "EBIU_MODE", "EBIU_FCTL", [mmr_idx (bf50x.mode)] = "EBIU_MODE", "EBIU_FCTL",
}; };
static const char * const bf53x_mmr_names[] = { static const char * const bf53x_mmr_names[] =
{
"EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1", "EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1",
}; };
static const char * const bf54x_mmr_names[] = { static const char * const bf54x_mmr_names[] =
{
"EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1", "EBIU_AMGCTL", "EBIU_AMBCTL0", "EBIU_AMBCTL1",
"EBIU_MSBCTL", "EBIU_ARBSTAT", "EBIU_MODE", "EBIU_FCTL", "EBIU_MSBCTL", "EBIU_ARBSTAT", "EBIU_MODE", "EBIU_FCTL",
}; };

3
sim/bfin/dv-bfin_ebiu_ddrc.c
View file

@ -44,7 +44,8 @@ struct bfin_ebiu_ddrc
#define mmr_base() offsetof(struct bfin_ebiu_ddrc, ddrctl0) #define mmr_base() offsetof(struct bfin_ebiu_ddrc, ddrctl0)
#define mmr_offset(mmr) (offsetof(struct bfin_ebiu_ddrc, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_ddrc, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"EBIU_DDRCTL0", "EBIU_DDRCTL1", "EBIU_DDRCTL2", "EBIU_DDRCTL3", "EBIU_DDRQUE", "EBIU_DDRCTL0", "EBIU_DDRCTL1", "EBIU_DDRCTL2", "EBIU_DDRCTL3", "EBIU_DDRQUE",
"EBIU_ERRADD", "EBIU_ERRMST", "EBIU_RSTCTL", "EBIU_DDRBRC0", "EBIU_DDRBRC1", "EBIU_ERRADD", "EBIU_ERRMST", "EBIU_RSTCTL", "EBIU_DDRBRC0", "EBIU_DDRBRC1",
"EBIU_DDRBRC2", "EBIU_DDRBRC3", "EBIU_DDRBRC4", "EBIU_DDRBRC5", "EBIU_DDRBRC2", "EBIU_DDRBRC3", "EBIU_DDRBRC4", "EBIU_DDRBRC5",

3
sim/bfin/dv-bfin_ebiu_sdc.c
View file

@ -39,7 +39,8 @@ struct bfin_ebiu_sdc
#define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl) #define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl)
#define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT", "EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]

6
sim/bfin/dv-bfin_emac.c
View file

@ -93,7 +93,8 @@ struct bfin_emac
#define mmr_offset(mmr) (offsetof(struct bfin_emac, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_emac, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[BFIN_MMR_EMAC_SIZE / 4] = { static const char * const mmr_names[BFIN_MMR_EMAC_SIZE / 4] =
{
"EMAC_OPMODE", "EMAC_ADDRLO", "EMAC_ADDRHI", "EMAC_HASHLO", "EMAC_HASHHI", "EMAC_OPMODE", "EMAC_ADDRLO", "EMAC_ADDRHI", "EMAC_HASHLO", "EMAC_HASHHI",
"EMAC_STAADD", "EMAC_STADAT", "EMAC_FLC", "EMAC_VLAN1", "EMAC_VLAN2", NULL, "EMAC_STAADD", "EMAC_STADAT", "EMAC_FLC", "EMAC_VLAN1", "EMAC_VLAN2", NULL,
"EMAC_WKUP_CTL", "EMAC_WKUP_FFMSK0", "EMAC_WKUP_FFMSK1", "EMAC_WKUP_FFMSK2", "EMAC_WKUP_CTL", "EMAC_WKUP_FFMSK0", "EMAC_WKUP_FFMSK1", "EMAC_WKUP_FFMSK2",
@ -488,7 +489,8 @@ bfin_emac_dma_write_buffer (struct hw *me, const void *source,
return ret; return ret;
} }
static const struct hw_port_descriptor bfin_emac_ports[] = { static const struct hw_port_descriptor bfin_emac_ports[] =
{
{ "tx", DV_PORT_TX, 0, output_port, }, { "tx", DV_PORT_TX, 0, output_port, },
{ "rx", DV_PORT_RX, 0, output_port, }, { "rx", DV_PORT_RX, 0, output_port, },
{ "stat", DV_PORT_STAT, 0, output_port, }, { "stat", DV_PORT_STAT, 0, output_port, },

6
sim/bfin/dv-bfin_eppi.c
View file

@ -57,7 +57,8 @@ struct bfin_eppi
#define mmr_base() offsetof(struct bfin_eppi, status) #define mmr_base() offsetof(struct bfin_eppi, status)
#define mmr_offset(mmr) (offsetof(struct bfin_eppi, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_eppi, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"EPPI_STATUS", "EPPI_HCOUNT", "EPPI_HDELAY", "EPPI_VCOUNT", "EPPI_VDELAY", "EPPI_STATUS", "EPPI_HCOUNT", "EPPI_HDELAY", "EPPI_VCOUNT", "EPPI_VDELAY",
"EPPI_FRAME", "EPPI_LINE", "EPPI_CLKDIV", "EPPI_CONTROL", "EPPI_FS1W_HBL", "EPPI_FRAME", "EPPI_LINE", "EPPI_CLKDIV", "EPPI_CONTROL", "EPPI_FS1W_HBL",
"EPPI_FS1P_AVPL", "EPPI_FS2W_LVB", "EPPI_FS2P_LAVF", "EPPI_CLIP", "EPPI_ERR", "EPPI_FS1P_AVPL", "EPPI_FS2W_LVB", "EPPI_FS2P_LAVF", "EPPI_CLIP", "EPPI_ERR",
@ -207,7 +208,8 @@ bfin_eppi_dma_write_buffer (struct hw *me, const void *source,
return bfin_gui_update (eppi->gui_state, source, nr_bytes); return bfin_gui_update (eppi->gui_state, source, nr_bytes);
} }
static const struct hw_port_descriptor bfin_eppi_ports[] = { static const struct hw_port_descriptor bfin_eppi_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

3
sim/bfin/dv-bfin_evt.c
View file

@ -35,7 +35,8 @@ struct bfin_evt
#define mmr_base() offsetof(struct bfin_evt, evt[0]) #define mmr_base() offsetof(struct bfin_evt, evt[0])
#define mmr_offset(mmr) (offsetof(struct bfin_evt, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_evt, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"EVT0", "EVT1", "EVT2", "EVT3", "EVT4", "EVT5", "EVT6", "EVT7", "EVT8", "EVT0", "EVT1", "EVT2", "EVT3", "EVT4", "EVT5", "EVT6", "EVT7", "EVT8",
"EVT9", "EVT10", "EVT11", "EVT12", "EVT13", "EVT14", "EVT15", "EVT9", "EVT10", "EVT11", "EVT12", "EVT13", "EVT14", "EVT15",
}; };

6
sim/bfin/dv-bfin_gptimer.c
View file

@ -44,7 +44,8 @@ struct bfin_gptimer
#define mmr_base() offsetof(struct bfin_gptimer, config) #define mmr_base() offsetof(struct bfin_gptimer, config)
#define mmr_offset(mmr) (offsetof(struct bfin_gptimer, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_gptimer, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"TIMER_CONFIG", "TIMER_COUNTER", "TIMER_PERIOD", "TIMER_WIDTH", "TIMER_CONFIG", "TIMER_COUNTER", "TIMER_PERIOD", "TIMER_WIDTH",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -129,7 +130,8 @@ bfin_gptimer_io_read_buffer (struct hw *me, void *dest, int space,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_gptimer_ports[] = { static const struct hw_port_descriptor bfin_gptimer_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

3
sim/bfin/dv-bfin_jtag.c
View file

@ -39,7 +39,8 @@ struct bfin_jtag
#define mmr_base() offsetof(struct bfin_jtag, dspid) #define mmr_base() offsetof(struct bfin_jtag, dspid)
#define mmr_offset(mmr) (offsetof(struct bfin_jtag, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_jtag, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"DSPID", NULL, "DBGSTAT", "DSPID", NULL, "DBGSTAT",
}; };
#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>") #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")

3
sim/bfin/dv-bfin_mmu.c
View file

@ -63,7 +63,8 @@ struct bfin_mmu
#define mmr_offset(mmr) (offsetof(struct bfin_mmu, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_mmu, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[BFIN_COREMMR_MMU_SIZE / 4] = { static const char * const mmr_names[BFIN_COREMMR_MMU_SIZE / 4] =
{
"SRAM_BASE_ADDRESS", "DMEM_CONTROL", "DCPLB_FAULT_STATUS", "DCPLB_FAULT_ADDR", "SRAM_BASE_ADDRESS", "DMEM_CONTROL", "DCPLB_FAULT_STATUS", "DCPLB_FAULT_ADDR",
[mmr_idx (dcplb_addr[0])] = "DCPLB_ADDR0", [mmr_idx (dcplb_addr[0])] = "DCPLB_ADDR0",
"DCPLB_ADDR1", "DCPLB_ADDR2", "DCPLB_ADDR3", "DCPLB_ADDR4", "DCPLB_ADDR5", "DCPLB_ADDR1", "DCPLB_ADDR2", "DCPLB_ADDR3", "DCPLB_ADDR4", "DCPLB_ADDR5",

6
sim/bfin/dv-bfin_nfc.c
View file

@ -60,7 +60,8 @@ struct bfin_nfc
#define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_nfc, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1", "NFC_CTL", "NFC_STAT", "NFC_IRQSTAT", "NFC_IRQMASK", "NFC_ECC0", "NFC_ECC1",
"NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ", "NFC_ECC2", "NFC_ECC3", "NFC_COUNT", "NFC_RST", "NFC_PGCTL", "NFC_READ",
[mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD", [mmr_idx (addr)] = "NFC_ADDR", "NFC_CMD", "NFC_DATA_WR", "NFC_DATA_RD",
@ -179,7 +180,8 @@ bfin_nfc_dma_write_buffer (struct hw *me, const void *source,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_nfc_ports[] = { static const struct hw_port_descriptor bfin_nfc_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

3
sim/bfin/dv-bfin_otp.c
View file

@ -52,7 +52,8 @@ struct bfin_otp
#define mmr_offset(mmr) (offsetof(struct bfin_otp, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_otp, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"OTP_CONTROL", "OTP_BEN", "OTP_STATUS", "OTP_TIMING", "OTP_CONTROL", "OTP_BEN", "OTP_STATUS", "OTP_TIMING",
[mmr_idx (data0)] = "OTP_DATA0", "OTP_DATA1", "OTP_DATA2", "OTP_DATA3", [mmr_idx (data0)] = "OTP_DATA0", "OTP_DATA1", "OTP_DATA2", "OTP_DATA3",
}; };

6
sim/bfin/dv-bfin_pll.c
View file

@ -42,7 +42,8 @@ struct bfin_pll
#define mmr_base() offsetof(struct bfin_pll, pll_ctl) #define mmr_base() offsetof(struct bfin_pll, pll_ctl)
#define mmr_offset(mmr) (offsetof(struct bfin_pll, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_pll, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"PLL_CTL", "PLL_DIV", "VR_CTL", "PLL_STAT", "PLL_LOCKCNT", "CHIPID", "PLL_CTL", "PLL_DIV", "VR_CTL", "PLL_STAT", "PLL_LOCKCNT", "CHIPID",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -117,7 +118,8 @@ bfin_pll_io_read_buffer (struct hw *me, void *dest,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_pll_ports[] = { static const struct hw_port_descriptor bfin_pll_ports[] =
{
{ "pll", 0, 0, output_port, }, { "pll", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

6
sim/bfin/dv-bfin_ppi.c
View file

@ -53,7 +53,8 @@ struct bfin_ppi
#define mmr_base() offsetof(struct bfin_ppi, control) #define mmr_base() offsetof(struct bfin_ppi, control)
#define mmr_offset(mmr) (offsetof(struct bfin_ppi, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_ppi, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"PPI_CONTROL", "PPI_STATUS", "PPI_COUNT", "PPI_DELAY", "PPI_FRAME", "PPI_CONTROL", "PPI_STATUS", "PPI_COUNT", "PPI_DELAY", "PPI_FRAME",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -167,7 +168,8 @@ bfin_ppi_dma_write_buffer (struct hw *me, const void *source,
return bfin_gui_update (ppi->gui_state, source, nr_bytes); return bfin_gui_update (ppi->gui_state, source, nr_bytes);
} }
static const struct hw_port_descriptor bfin_ppi_ports[] = { static const struct hw_port_descriptor bfin_ppi_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

6
sim/bfin/dv-bfin_rtc.c
View file

@ -44,7 +44,8 @@ struct bfin_rtc
#define mmr_base() offsetof(struct bfin_rtc, stat) #define mmr_base() offsetof(struct bfin_rtc, stat)
#define mmr_offset(mmr) (offsetof(struct bfin_rtc, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_rtc, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"RTC_STAT", "RTC_ICTL", "RTC_ISTAT", "RTC_SWCNT", "RTC_ALARM", "RTC_PREN", "RTC_STAT", "RTC_ICTL", "RTC_ISTAT", "RTC_SWCNT", "RTC_ALARM", "RTC_PREN",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -138,7 +139,8 @@ bfin_rtc_io_read_buffer (struct hw *me, void *dest,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_rtc_ports[] = { static const struct hw_port_descriptor bfin_rtc_ports[] =
{
{ "rtc", 0, 0, output_port, }, { "rtc", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

39
sim/bfin/dv-bfin_sic.c
View file

@ -70,24 +70,28 @@ struct bfin_sic
#define mmr_offset(mmr) (offsetof(struct bfin_sic, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_sic, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const bf52x_mmr_names[] = { static const char * const bf52x_mmr_names[] =
{
"SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IAR0", "SIC_IAR1", "SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IAR0", "SIC_IAR1",
"SIC_IAR2", "SIC_IAR3", "SIC_ISR0", "SIC_IWR0", "SIC_IAR2", "SIC_IAR3", "SIC_ISR0", "SIC_IWR0",
[mmr_idx (bf52x.imask1)] = "SIC_IMASK1", "SIC_IAR4", "SIC_IAR5", [mmr_idx (bf52x.imask1)] = "SIC_IMASK1", "SIC_IAR4", "SIC_IAR5",
"SIC_IAR6", "SIC_IAR7", "SIC_ISR1", "SIC_IWR1", "SIC_IAR6", "SIC_IAR7", "SIC_ISR1", "SIC_IWR1",
}; };
static const char * const bf537_mmr_names[] = { static const char * const bf537_mmr_names[] =
{
"SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK", "SIC_IAR0", "SIC_IAR1", "SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK", "SIC_IAR0", "SIC_IAR1",
"SIC_IAR2", "SIC_IAR3", "SIC_ISR", "SIC_IWR", "SIC_IAR2", "SIC_IAR3", "SIC_ISR", "SIC_IWR",
}; };
static const char * const bf54x_mmr_names[] = { static const char * const bf54x_mmr_names[] =
{
"SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IMASK1", "SIC_IMASK2", "SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IMASK1", "SIC_IMASK2",
"SIC_ISR0", "SIC_ISR1", "SIC_ISR2", "SIC_IWR0", "SIC_IWR1", "SIC_IWR2", "SIC_ISR0", "SIC_ISR1", "SIC_ISR2", "SIC_IWR0", "SIC_IWR1", "SIC_IWR2",
"SIC_IAR0", "SIC_IAR1", "SIC_IAR2", "SIC_IAR3", "SIC_IAR0", "SIC_IAR1", "SIC_IAR2", "SIC_IAR3",
"SIC_IAR4", "SIC_IAR5", "SIC_IAR6", "SIC_IAR7", "SIC_IAR4", "SIC_IAR5", "SIC_IAR6", "SIC_IAR7",
"SIC_IAR8", "SIC_IAR9", "SIC_IAR10", "SIC_IAR11", "SIC_IAR8", "SIC_IAR9", "SIC_IAR10", "SIC_IAR11",
}; };
static const char * const bf561_mmr_names[] = { static const char * const bf561_mmr_names[] =
{
"SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IMASK1", "SWRST", "SYSCR", "SIC_RVECT", "SIC_IMASK0", "SIC_IMASK1",
"SIC_IAR0", "SIC_IAR1", "SIC_IAR2", "SIC_IAR3", "SIC_IAR0", "SIC_IAR1", "SIC_IAR2", "SIC_IAR3",
"SIC_IAR4", "SIC_IAR5", "SIC_IAR6", "SIC_IAR7", "SIC_IAR4", "SIC_IAR5", "SIC_IAR6", "SIC_IAR7",
@ -557,7 +561,8 @@ bfin_sic_561_io_read_buffer (struct hw *me, void *dest, int space,
{ "ivg14", IVG14, 0, output_port, }, \ { "ivg14", IVG14, 0, output_port, }, \
{ "ivg15", IVG15, 0, output_port, }, { "ivg15", IVG15, 0, output_port, },
static const struct hw_port_descriptor bfin_sic_50x_ports[] = { static const struct hw_port_descriptor bfin_sic_50x_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -620,7 +625,8 @@ static const struct hw_port_descriptor bfin_sic_50x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const struct hw_port_descriptor bfin_sic_51x_ports[] = { static const struct hw_port_descriptor bfin_sic_51x_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -683,7 +689,8 @@ static const struct hw_port_descriptor bfin_sic_51x_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const struct hw_port_descriptor bfin_sic_52x_ports[] = { static const struct hw_port_descriptor bfin_sic_52x_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -769,7 +776,8 @@ bfin_sic_52x_port_event (struct hw *me, int my_port, struct hw *source,
bfin_sic_52x_forward_interrupts (me, sic); bfin_sic_52x_forward_interrupts (me, sic);
} }
static const struct hw_port_descriptor bfin_sic_533_ports[] = { static const struct hw_port_descriptor bfin_sic_533_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
{ "dma_stat", 1, 0, input_port, }, { "dma_stat", 1, 0, input_port, },
@ -816,7 +824,8 @@ bfin_sic_533_port_event (struct hw *me, int my_port, struct hw *source,
bfin_sic_537_forward_interrupts (me, sic); bfin_sic_537_forward_interrupts (me, sic);
} }
static const struct hw_port_descriptor bfin_sic_537_ports[] = { static const struct hw_port_descriptor bfin_sic_537_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
{ "dma_stat", 10, 0, input_port, }, { "dma_stat", 10, 0, input_port, },
@ -886,7 +895,8 @@ bfin_sic_537_port_event (struct hw *me, int my_port, struct hw *source,
bfin_sic_537_forward_interrupts (me, sic); bfin_sic_537_forward_interrupts (me, sic);
} }
static const struct hw_port_descriptor bfin_sic_538_ports[] = { static const struct hw_port_descriptor bfin_sic_538_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -944,7 +954,8 @@ static const struct hw_port_descriptor bfin_sic_538_ports[] = {
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };
static const struct hw_port_descriptor bfin_sic_54x_ports[] = { static const struct hw_port_descriptor bfin_sic_54x_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -1076,7 +1087,8 @@ bfin_sic_54x_port_event (struct hw *me, int my_port, struct hw *source,
bfin_sic_54x_forward_interrupts (me, sic); bfin_sic_54x_forward_interrupts (me, sic);
} }
static const struct hw_port_descriptor bfin_sic_561_ports[] = { static const struct hw_port_descriptor bfin_sic_561_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
/* SIC0 */ /* SIC0 */
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
@ -1172,7 +1184,8 @@ bfin_sic_561_port_event (struct hw *me, int my_port, struct hw *source,
bfin_sic_561_forward_interrupts (me, sic); bfin_sic_561_forward_interrupts (me, sic);
} }
static const struct hw_port_descriptor bfin_sic_59x_ports[] = { static const struct hw_port_descriptor bfin_sic_59x_ports[] =
{
BFIN_SIC_TO_CEC_PORTS BFIN_SIC_TO_CEC_PORTS
{ "pll", 0, 0, input_port, }, { "pll", 0, 0, input_port, },
{ "dma_stat", 1, 0, input_port, }, { "dma_stat", 1, 0, input_port, },

6
sim/bfin/dv-bfin_spi.c
View file

@ -49,7 +49,8 @@ struct bfin_spi
#define mmr_base() offsetof(struct bfin_spi, ctl) #define mmr_base() offsetof(struct bfin_spi, ctl)
#define mmr_offset(mmr) (offsetof(struct bfin_spi, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_spi, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"SPI_CTL", "SPI_FLG", "SPI_STAT", "SPI_TDBR", "SPI_CTL", "SPI_FLG", "SPI_STAT", "SPI_TDBR",
"SPI_RDBR", "SPI_BAUD", "SPI_SHADOW", "SPI_RDBR", "SPI_BAUD", "SPI_SHADOW",
}; };
@ -168,7 +169,8 @@ bfin_spi_dma_write_buffer (struct hw *me, const void *source,
return 0; return 0;
} }
static const struct hw_port_descriptor bfin_spi_ports[] = { static const struct hw_port_descriptor bfin_spi_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

3
sim/bfin/dv-bfin_trace.c
View file

@ -56,7 +56,8 @@ struct bfin_trace
#define mmr_base() offsetof(struct bfin_trace, tbufctl) #define mmr_base() offsetof(struct bfin_trace, tbufctl)
#define mmr_offset(mmr) (offsetof(struct bfin_trace, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_trace, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"TBUFCTL", "TBUFSTAT", [mmr_offset (tbuf) / 4] = "TBUF", "TBUFCTL", "TBUFSTAT", [mmr_offset (tbuf) / 4] = "TBUF",
}; };
#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>") #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")

6
sim/bfin/dv-bfin_twi.c
View file

@ -62,7 +62,8 @@ struct bfin_twi
#define mmr_offset(mmr) (offsetof(struct bfin_twi, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_twi, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"TWI_CLKDIV", "TWI_CONTROL", "TWI_SLAVE_CTL", "TWI_SLAVE_STAT", "TWI_CLKDIV", "TWI_CONTROL", "TWI_SLAVE_CTL", "TWI_SLAVE_STAT",
"TWI_SLAVE_ADDR", "TWI_MASTER_CTL", "TWI_MASTER_STAT", "TWI_MASTER_ADDR", "TWI_SLAVE_ADDR", "TWI_MASTER_CTL", "TWI_MASTER_STAT", "TWI_MASTER_ADDR",
"TWI_INT_STAT", "TWI_INT_MASK", "TWI_FIFO_CTL", "TWI_FIFO_STAT", "TWI_INT_STAT", "TWI_INT_MASK", "TWI_FIFO_CTL", "TWI_FIFO_STAT",
@ -173,7 +174,8 @@ bfin_twi_io_read_buffer (struct hw *me, void *dest, int space,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_twi_ports[] = { static const struct hw_port_descriptor bfin_twi_ports[] =
{
{ "stat", 0, 0, output_port, }, { "stat", 0, 0, output_port, },
{ NULL, 0, 0, 0, }, { NULL, 0, 0, 0, },
}; };

6
sim/bfin/dv-bfin_uart.c
View file

@ -60,7 +60,8 @@ struct bfin_uart
#define mmr_base() offsetof(struct bfin_uart, dll) #define mmr_base() offsetof(struct bfin_uart, dll)
#define mmr_offset(mmr) (offsetof(struct bfin_uart, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_uart, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"UART_RBR/UART_THR", "UART_IER", "UART_IIR", "UART_LCR", "UART_MCR", "UART_RBR/UART_THR", "UART_IER", "UART_IIR", "UART_LCR", "UART_MCR",
"UART_LSR", "UART_MSR", "UART_SCR", "<INV>", "UART_GCTL", "UART_LSR", "UART_MSR", "UART_SCR", "<INV>", "UART_GCTL",
}; };
@ -374,7 +375,8 @@ bfin_uart_dma_write_buffer (struct hw *me, const void *source,
return ret; return ret;
} }
static const struct hw_port_descriptor bfin_uart_ports[] = { static const struct hw_port_descriptor bfin_uart_ports[] =
{
{ "tx", DV_PORT_TX, 0, output_port, }, { "tx", DV_PORT_TX, 0, output_port, },
{ "rx", DV_PORT_RX, 0, output_port, }, { "rx", DV_PORT_RX, 0, output_port, },
{ "stat", DV_PORT_STAT, 0, output_port, }, { "stat", DV_PORT_STAT, 0, output_port, },

6
sim/bfin/dv-bfin_uart2.c
View file

@ -59,7 +59,8 @@ struct bfin_uart
#define mmr_base() offsetof(struct bfin_uart, dll) #define mmr_base() offsetof(struct bfin_uart, dll)
#define mmr_offset(mmr) (offsetof(struct bfin_uart, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_uart, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"UART_DLL", "UART_DLH", "UART_GCTL", "UART_LCR", "UART_MCR", "UART_LSR", "UART_DLL", "UART_DLH", "UART_GCTL", "UART_LCR", "UART_MCR", "UART_LSR",
"UART_MSR", "UART_SCR", "UART_IER_SET", "UART_IER_CLEAR", "UART_THR", "UART_MSR", "UART_SCR", "UART_IER_SET", "UART_IER_CLEAR", "UART_THR",
"UART_RBR", "UART_RBR",
@ -196,7 +197,8 @@ bfin_uart_dma_write_buffer (struct hw *me, const void *source,
return ret; return ret;
} }
static const struct hw_port_descriptor bfin_uart_ports[] = { static const struct hw_port_descriptor bfin_uart_ports[] =
{
{ "tx", DV_PORT_TX, 0, output_port, }, { "tx", DV_PORT_TX, 0, output_port, },
{ "rx", DV_PORT_RX, 0, output_port, }, { "rx", DV_PORT_RX, 0, output_port, },
{ "stat", DV_PORT_STAT, 0, output_port, }, { "stat", DV_PORT_STAT, 0, output_port, },

6
sim/bfin/dv-bfin_wdog.c
View file

@ -38,7 +38,8 @@ struct bfin_wdog
#define mmr_base() offsetof(struct bfin_wdog, ctl) #define mmr_base() offsetof(struct bfin_wdog, ctl)
#define mmr_offset(mmr) (offsetof(struct bfin_wdog, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_wdog, mmr) - mmr_base())
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
"WDOG_CTL", "WDOG_CNT", "WDOG_STAT", "WDOG_CTL", "WDOG_CNT", "WDOG_STAT",
}; };
#define mmr_name(off) mmr_names[(off) / 4] #define mmr_name(off) mmr_names[(off) / 4]
@ -133,7 +134,8 @@ bfin_wdog_io_read_buffer (struct hw *me, void *dest,
return nr_bytes; return nr_bytes;
} }
static const struct hw_port_descriptor bfin_wdog_ports[] = { static const struct hw_port_descriptor bfin_wdog_ports[] =
{
{ "reset", WDEV_RESET, 0, output_port, }, { "reset", WDEV_RESET, 0, output_port, },
{ "nmi", WDEV_NMI, 0, output_port, }, { "nmi", WDEV_NMI, 0, output_port, },
{ "gpi", WDEV_GPI, 0, output_port, }, { "gpi", WDEV_GPI, 0, output_port, },

3
sim/bfin/dv-bfin_wp.c
View file

@ -54,7 +54,8 @@ struct bfin_wp
#define mmr_offset(mmr) (offsetof(struct bfin_wp, mmr) - mmr_base()) #define mmr_offset(mmr) (offsetof(struct bfin_wp, mmr) - mmr_base())
#define mmr_idx(mmr) (mmr_offset (mmr) / 4) #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
static const char * const mmr_names[] = { static const char * const mmr_names[] =
{
[mmr_idx (iactl)] = "WPIACTL", [mmr_idx (iactl)] = "WPIACTL",
[mmr_idx (ia)] = "WPIA0", "WPIA1", "WPIA2", "WPIA3", "WPIA4", "WPIA5", [mmr_idx (ia)] = "WPIA0", "WPIA1", "WPIA2", "WPIA3", "WPIA4", "WPIA5",
[mmr_idx (iacnt)] = "WPIACNT0", "WPIACNT1", "WPIACNT2", [mmr_idx (iacnt)] = "WPIACNT0", "WPIACNT1", "WPIACNT2",

3
sim/bfin/dv-eth_phy.c
View file

@ -41,7 +41,8 @@ struct eth_phy
#define reg_offset(reg) (offsetof(struct eth_phy, reg) - reg_base()) #define reg_offset(reg) (offsetof(struct eth_phy, reg) - reg_base())
#define reg_idx(reg) (reg_offset (reg) / 4) #define reg_idx(reg) (reg_offset (reg) / 4)
static const char * const reg_names[] = { static const char * const reg_names[] =
{
[MII_BMCR ] = "MII_BMCR", [MII_BMCR ] = "MII_BMCR",
[MII_BMSR ] = "MII_BMSR", [MII_BMSR ] = "MII_BMSR",
[MII_PHYSID1 ] = "MII_PHYSID1", [MII_PHYSID1 ] = "MII_PHYSID1",

18
sim/bfin/gui.c
View file

@ -46,7 +46,8 @@ static struct {
void (*UpdateRect) (SDL_Surface *screen, Sint32 x, Sint32 y, Uint32 w, Uint32 h); void (*UpdateRect) (SDL_Surface *screen, Sint32 x, Sint32 y, Uint32 w, Uint32 h);
} sdl; } sdl;
static const char * const sdl_syms[] = { static const char * const sdl_syms[] =
{
"SDL_Init", "SDL_Init",
"SDL_Quit", "SDL_Quit",
"SDL_SetVideoMode", "SDL_SetVideoMode",
@ -222,19 +223,24 @@ bfin_gui_update (void *state, const void *source, unsigned nr_bytes)
_FORMAT(((((rcnt) + (gcnt) + (bcnt) + (acnt)) + 7) / 8) * 8, \ _FORMAT(((((rcnt) + (gcnt) + (bcnt) + (acnt)) + 7) / 8) * 8, \
rcnt, gcnt, bcnt, acnt, rsh, gsh, bsh, ash) rcnt, gcnt, bcnt, acnt, rsh, gsh, bsh, ash)
static const SDL_PixelFormat sdl_rgb_565 = { static const SDL_PixelFormat sdl_rgb_565 =
{
FORMAT (5, 6, 5, 0, 11, 5, 0, 0) FORMAT (5, 6, 5, 0, 11, 5, 0, 0)
}; };
static const SDL_PixelFormat sdl_bgr_565 = { static const SDL_PixelFormat sdl_bgr_565 =
{
FORMAT (5, 6, 5, 0, 0, 5, 11, 0) FORMAT (5, 6, 5, 0, 0, 5, 11, 0)
}; };
static const SDL_PixelFormat sdl_rgb_888 = { static const SDL_PixelFormat sdl_rgb_888 =
{
FORMAT (8, 8, 8, 0, 16, 8, 0, 0) FORMAT (8, 8, 8, 0, 16, 8, 0, 0)
}; };
static const SDL_PixelFormat sdl_bgr_888 = { static const SDL_PixelFormat sdl_bgr_888 =
{
FORMAT (8, 8, 8, 0, 0, 8, 16, 0) FORMAT (8, 8, 8, 0, 0, 8, 16, 0)
}; };
static const SDL_PixelFormat sdl_rgba_8888 = { static const SDL_PixelFormat sdl_rgba_8888 =
{
FORMAT (8, 8, 8, 8, 24, 16, 8, 0) FORMAT (8, 8, 8, 8, 24, 16, 8, 0)
}; };

3
sim/bfin/linux-fixed-code.h
View file

@ -1,5 +1,6 @@
/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */ /* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */
static const unsigned char bfin_linux_fixed_code[] = { static const unsigned char bfin_linux_fixed_code[] =
{
0x28, 0xe1, 0xad, 0x00, 0x28, 0xe1, 0xad, 0x00,
0xa0, 0x00, 0xa0, 0x00,
0x00, 0x20, 0x00, 0x20,

12
sim/bfin/linux-targ-map.h
View file

@ -39,7 +39,8 @@ exit 0
*/ */
#endif #endif
static CB_TARGET_DEFS_MAP cb_linux_syscall_map[] = { static CB_TARGET_DEFS_MAP cb_linux_syscall_map[] =
{
#ifdef CB_SYS_restart_syscall #ifdef CB_SYS_restart_syscall
# define TARGET_LINUX_SYS_restart_syscall 0 # define TARGET_LINUX_SYS_restart_syscall 0
{ CB_SYS_restart_syscall, TARGET_LINUX_SYS_restart_syscall }, { CB_SYS_restart_syscall, TARGET_LINUX_SYS_restart_syscall },
@ -1283,7 +1284,8 @@ static CB_TARGET_DEFS_MAP cb_linux_syscall_map[] = {
{ -1, -1 } { -1, -1 }
}; };
static CB_TARGET_DEFS_MAP cb_linux_errno_map[] = { static CB_TARGET_DEFS_MAP cb_linux_errno_map[] =
{
#ifdef EPERM #ifdef EPERM
# define TARGET_LINUX_EPERM 1 # define TARGET_LINUX_EPERM 1
{ EPERM, TARGET_LINUX_EPERM }, { EPERM, TARGET_LINUX_EPERM },
@ -1787,7 +1789,8 @@ static CB_TARGET_DEFS_MAP cb_linux_errno_map[] = {
{ 0, 0 } { 0, 0 }
}; };
static CB_TARGET_DEFS_MAP cb_linux_open_map[] = { static CB_TARGET_DEFS_MAP cb_linux_open_map[] =
{
#ifdef O_ACCMODE #ifdef O_ACCMODE
# define TARGET_LINUX_O_ACCMODE 0003 # define TARGET_LINUX_O_ACCMODE 0003
{ O_ACCMODE, TARGET_LINUX_O_ACCMODE }, { O_ACCMODE, TARGET_LINUX_O_ACCMODE },
@ -1839,7 +1842,8 @@ static CB_TARGET_DEFS_MAP cb_linux_open_map[] = {
{ -1, -1 } { -1, -1 }
}; };
static CB_TARGET_DEFS_MAP cb_linux_signal_map[] = { static CB_TARGET_DEFS_MAP cb_linux_signal_map[] =
{
#ifdef SIGHUP #ifdef SIGHUP
# define TARGET_LINUX_SIGHUP 1 # define TARGET_LINUX_SIGHUP 1
{ SIGHUP, TARGET_LINUX_SIGHUP }, { SIGHUP, TARGET_LINUX_SIGHUP },

132
sim/bfin/machs.c
View file

@ -94,7 +94,8 @@ static const struct bfin_dmac_layout bf000_dmac[] = {};
#define bf50x_chipid 0x2800 #define bf50x_chipid 0x2800
#define bf504_chipid bf50x_chipid #define bf504_chipid bf50x_chipid
#define bf506_chipid bf50x_chipid #define bf506_chipid bf50x_chipid
static const struct bfin_memory_layout bf50x_mem[] = { static const struct bfin_memory_layout bf50x_mem[] =
{
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */ LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@ -110,7 +111,8 @@ static const struct bfin_memory_layout bf50x_mem[] = {
}; };
#define bf504_mem bf50x_mem #define bf504_mem bf50x_mem
#define bf506_mem bf50x_mem #define bf506_mem bf50x_mem
static const struct bfin_dev_layout bf50x_dev[] = { static const struct bfin_dev_layout bf50x_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"), DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"), DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@ -130,7 +132,8 @@ static const struct bfin_dev_layout bf50x_dev[] = {
}; };
#define bf504_dev bf50x_dev #define bf504_dev bf50x_dev
#define bf506_dev bf50x_dev #define bf506_dev bf50x_dev
static const struct bfin_dmac_layout bf50x_dmac[] = { static const struct bfin_dmac_layout bf50x_dmac[] =
{
{ BFIN_MMR_DMAC0_BASE, 12, }, { BFIN_MMR_DMAC0_BASE, 12, },
}; };
#define bf504_dmac bf50x_dmac #define bf504_dmac bf50x_dmac
@ -141,7 +144,8 @@ static const struct bfin_dmac_layout bf50x_dmac[] = {
#define bf514_chipid bf51x_chipid #define bf514_chipid bf51x_chipid
#define bf516_chipid bf51x_chipid #define bf516_chipid bf51x_chipid
#define bf518_chipid bf51x_chipid #define bf518_chipid bf51x_chipid
static const struct bfin_memory_layout bf51x_mem[] = { static const struct bfin_memory_layout bf51x_mem[] =
{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -162,7 +166,8 @@ static const struct bfin_memory_layout bf51x_mem[] = {
#define bf514_mem bf51x_mem #define bf514_mem bf51x_mem
#define bf516_mem bf51x_mem #define bf516_mem bf51x_mem
#define bf518_mem bf51x_mem #define bf518_mem bf51x_mem
static const struct bfin_dev_layout bf512_dev[] = { static const struct bfin_dev_layout bf512_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -184,7 +189,8 @@ static const struct bfin_dev_layout bf512_dev[] = {
DEVICE (0xFFC03600, BFIN_MMR_OTP_SIZE, "bfin_otp"), DEVICE (0xFFC03600, BFIN_MMR_OTP_SIZE, "bfin_otp"),
}; };
#define bf514_dev bf512_dev #define bf514_dev bf512_dev
static const struct bfin_dev_layout bf516_dev[] = { static const struct bfin_dev_layout bf516_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -219,7 +225,8 @@ static const struct bfin_dev_layout bf516_dev[] = {
#define bf525_chipid bf523_chipid #define bf525_chipid bf523_chipid
#define bf526_chipid bf522_chipid #define bf526_chipid bf522_chipid
#define bf527_chipid bf523_chipid #define bf527_chipid bf523_chipid
static const struct bfin_memory_layout bf52x_mem[] = { static const struct bfin_memory_layout bf52x_mem[] =
{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -242,7 +249,8 @@ static const struct bfin_memory_layout bf52x_mem[] = {
#define bf525_mem bf52x_mem #define bf525_mem bf52x_mem
#define bf526_mem bf52x_mem #define bf526_mem bf52x_mem
#define bf527_mem bf52x_mem #define bf527_mem bf52x_mem
static const struct bfin_dev_layout bf522_dev[] = { static const struct bfin_dev_layout bf522_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -266,7 +274,8 @@ static const struct bfin_dev_layout bf522_dev[] = {
#define bf523_dev bf522_dev #define bf523_dev bf522_dev
#define bf524_dev bf522_dev #define bf524_dev bf522_dev
#define bf525_dev bf522_dev #define bf525_dev bf522_dev
static const struct bfin_dev_layout bf526_dev[] = { static const struct bfin_dev_layout bf526_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -300,7 +309,8 @@ static const struct bfin_dev_layout bf526_dev[] = {
#define bf531_chipid 0x27a5 #define bf531_chipid 0x27a5
#define bf532_chipid bf531_chipid #define bf532_chipid bf531_chipid
#define bf533_chipid bf531_chipid #define bf533_chipid bf531_chipid
static const struct bfin_memory_layout bf531_mem[] = { static const struct bfin_memory_layout bf531_mem[] =
{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -309,7 +319,8 @@ static const struct bfin_memory_layout bf531_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */ LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_memory_layout bf532_mem[] = { static const struct bfin_memory_layout bf532_mem[] =
{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -320,7 +331,8 @@ static const struct bfin_memory_layout bf532_mem[] = {
LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */ LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_memory_layout bf533_mem[] = { static const struct bfin_memory_layout bf533_mem[] =
{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -334,7 +346,8 @@ static const struct bfin_memory_layout bf533_mem[] = {
LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */ LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_dev_layout bf533_dev[] = { static const struct bfin_dev_layout bf533_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -348,7 +361,8 @@ static const struct bfin_dev_layout bf533_dev[] = {
}; };
#define bf531_dev bf533_dev #define bf531_dev bf533_dev
#define bf532_dev bf533_dev #define bf532_dev bf533_dev
static const struct bfin_dmac_layout bf533_dmac[] = { static const struct bfin_dmac_layout bf533_dmac[] =
{
{ BFIN_MMR_DMAC0_BASE, 8, }, { BFIN_MMR_DMAC0_BASE, 8, },
}; };
#define bf531_dmac bf533_dmac #define bf531_dmac bf533_dmac
@ -357,7 +371,8 @@ static const struct bfin_dmac_layout bf533_dmac[] = {
#define bf534_chipid 0x27c6 #define bf534_chipid 0x27c6
#define bf536_chipid 0x27c8 #define bf536_chipid 0x27c8
#define bf537_chipid bf536_chipid #define bf537_chipid bf536_chipid
static const struct bfin_memory_layout bf534_mem[] = { static const struct bfin_memory_layout bf534_mem[] =
{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -373,7 +388,8 @@ static const struct bfin_memory_layout bf534_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */ LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_memory_layout bf536_mem[] = { static const struct bfin_memory_layout bf536_mem[] =
{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -387,7 +403,8 @@ static const struct bfin_memory_layout bf536_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */ LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_memory_layout bf537_mem[] = { static const struct bfin_memory_layout bf537_mem[] =
{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */ LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@ -403,7 +420,8 @@ static const struct bfin_memory_layout bf537_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */ LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_dev_layout bf534_dev[] = { static const struct bfin_dev_layout bf534_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -422,7 +440,8 @@ static const struct bfin_dev_layout bf534_dev[] = {
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"), DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"), DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
}; };
static const struct bfin_dev_layout bf537_dev[] = { static const struct bfin_dev_layout bf537_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -450,7 +469,8 @@ static const struct bfin_dev_layout bf537_dev[] = {
#define bf538_chipid 0x27c4 #define bf538_chipid 0x27c4
#define bf539_chipid bf538_chipid #define bf539_chipid bf538_chipid
static const struct bfin_memory_layout bf538_mem[] = { static const struct bfin_memory_layout bf538_mem[] =
{
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */ LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@ -467,7 +487,8 @@ static const struct bfin_memory_layout bf538_mem[] = {
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
#define bf539_mem bf538_mem #define bf539_mem bf538_mem
static const struct bfin_dev_layout bf538_dev[] = { static const struct bfin_dev_layout bf538_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@ -486,7 +507,8 @@ static const struct bfin_dev_layout bf538_dev[] = {
_DEVICE (0xFFC02400, BFIN_MMR_SPI_SIZE, "bfin_spi@2", 1), _DEVICE (0xFFC02400, BFIN_MMR_SPI_SIZE, "bfin_spi@2", 1),
}; };
#define bf539_dev bf538_dev #define bf539_dev bf538_dev
static const struct bfin_dmac_layout bf538_dmac[] = { static const struct bfin_dmac_layout bf538_dmac[] =
{
{ BFIN_MMR_DMAC0_BASE, 8, }, { BFIN_MMR_DMAC0_BASE, 8, },
{ BFIN_MMR_DMAC1_BASE, 12, }, { BFIN_MMR_DMAC1_BASE, 12, },
}; };
@ -498,7 +520,8 @@ static const struct bfin_dmac_layout bf538_dmac[] = {
#define bf547_chipid bf54x_chipid #define bf547_chipid bf54x_chipid
#define bf548_chipid bf54x_chipid #define bf548_chipid bf54x_chipid
#define bf549_chipid bf54x_chipid #define bf549_chipid bf54x_chipid
static const struct bfin_memory_layout bf54x_mem[] = { static const struct bfin_memory_layout bf54x_mem[] =
{
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub XXX: not on BF542/4 */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub XXX: not on BF542/4 */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */ LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
LAYOUT (0xFFC01400, 0x200, read_write), /* PORT/GPIO stub */ LAYOUT (0xFFC01400, 0x200, read_write), /* PORT/GPIO stub */
@ -521,7 +544,8 @@ static const struct bfin_memory_layout bf54x_mem[] = {
#define bf547_mem bf54x_mem #define bf547_mem bf54x_mem
#define bf548_mem bf54x_mem #define bf548_mem bf54x_mem
#define bf549_mem bf54x_mem #define bf549_mem bf54x_mem
static const struct bfin_dev_layout bf542_dev[] = { static const struct bfin_dev_layout bf542_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"), DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@ -546,7 +570,8 @@ static const struct bfin_dev_layout bf542_dev[] = {
DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"), DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"),
DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"), DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"),
}; };
static const struct bfin_dev_layout bf544_dev[] = { static const struct bfin_dev_layout bf544_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"), DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@ -576,7 +601,8 @@ static const struct bfin_dev_layout bf544_dev[] = {
DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"), DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"),
DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"), DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"),
}; };
static const struct bfin_dev_layout bf547_dev[] = { static const struct bfin_dev_layout bf547_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"), DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"), DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@ -608,7 +634,8 @@ static const struct bfin_dev_layout bf547_dev[] = {
}; };
#define bf548_dev bf547_dev #define bf548_dev bf547_dev
#define bf549_dev bf547_dev #define bf549_dev bf547_dev
static const struct bfin_dmac_layout bf54x_dmac[] = { static const struct bfin_dmac_layout bf54x_dmac[] =
{
{ BFIN_MMR_DMAC0_BASE, 12, }, { BFIN_MMR_DMAC0_BASE, 12, },
{ BFIN_MMR_DMAC1_BASE, 12, }, { BFIN_MMR_DMAC1_BASE, 12, },
}; };
@ -620,7 +647,8 @@ static const struct bfin_dmac_layout bf54x_dmac[] = {
/* This is only Core A of course ... */ /* This is only Core A of course ... */
#define bf561_chipid 0x27bb #define bf561_chipid 0x27bb
static const struct bfin_memory_layout bf561_mem[] = { static const struct bfin_memory_layout bf561_mem[] =
{
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */ LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@ -634,7 +662,8 @@ static const struct bfin_memory_layout bf561_mem[] = {
LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */ LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */ LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
}; };
static const struct bfin_dev_layout bf561_dev[] = { static const struct bfin_dev_layout bf561_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"), DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@ -656,14 +685,16 @@ static const struct bfin_dev_layout bf561_dev[] = {
DEVICE (0xFFC01620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@10"), DEVICE (0xFFC01620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@10"),
DEVICE (0xFFC01630, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@11"), DEVICE (0xFFC01630, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@11"),
}; };
static const struct bfin_dmac_layout bf561_dmac[] = { static const struct bfin_dmac_layout bf561_dmac[] =
{
{ BFIN_MMR_DMAC0_BASE, 12, }, { BFIN_MMR_DMAC0_BASE, 12, },
{ BFIN_MMR_DMAC1_BASE, 12, }, { BFIN_MMR_DMAC1_BASE, 12, },
/* XXX: IMDMA: { 0xFFC01800, 4, }, */ /* XXX: IMDMA: { 0xFFC01800, 4, }, */
}; };
#define bf592_chipid 0x20cb #define bf592_chipid 0x20cb
static const struct bfin_memory_layout bf592_mem[] = { static const struct bfin_memory_layout bf592_mem[] =
{
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */ LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */ LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */ LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@ -672,7 +703,8 @@ static const struct bfin_memory_layout bf592_mem[] = {
LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */ LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */
LAYOUT (0xFFA04000, 0x4000, read_write_exec), /* Inst B [1] */ LAYOUT (0xFFA04000, 0x4000, read_write_exec), /* Inst B [1] */
}; };
static const struct bfin_dev_layout bf592_dev[] = { static const struct bfin_dev_layout bf592_dev[] =
{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"), DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"), DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"), DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@ -683,7 +715,8 @@ static const struct bfin_dev_layout bf592_dev[] = {
DEVICE (0xFFC01300, BFIN_MMR_SPI_SIZE, "bfin_spi@1"), DEVICE (0xFFC01300, BFIN_MMR_SPI_SIZE, "bfin_spi@1"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"), DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
}; };
static const struct bfin_dmac_layout bf592_dmac[] = { static const struct bfin_dmac_layout bf592_dmac[] =
{
/* XXX: there are only 9 channels, but mdma code below assumes that they /* XXX: there are only 9 channels, but mdma code below assumes that they
start right after the dma channels ... */ start right after the dma channels ... */
{ BFIN_MMR_DMAC0_BASE, 12, }, { BFIN_MMR_DMAC0_BASE, 12, },
@ -704,7 +737,8 @@ static const struct bfin_model_data bfin_model_data[] =
#define CORE_DEVICE(dev, DEV) \ #define CORE_DEVICE(dev, DEV) \
DEVICE (BFIN_COREMMR_##DEV##_BASE, BFIN_COREMMR_##DEV##_SIZE, "bfin_"#dev) DEVICE (BFIN_COREMMR_##DEV##_BASE, BFIN_COREMMR_##DEV##_SIZE, "bfin_"#dev)
static const struct bfin_dev_layout bfin_core_dev[] = { static const struct bfin_dev_layout bfin_core_dev[] =
{
CORE_DEVICE (cec, CEC), CORE_DEVICE (cec, CEC),
CORE_DEVICE (ctimer, CTIMER), CORE_DEVICE (ctimer, CTIMER),
CORE_DEVICE (evt, EVT), CORE_DEVICE (evt, EVT),
@ -844,28 +878,33 @@ struct bfrom {
sirev, bfrom_bf##rom##_0_##sirev, } sirev, bfrom_bf##rom##_0_##sirev, }
#define BFROM(rom, sirev, alias_len) BFROMA (0xef000000, rom, sirev, alias_len) #define BFROM(rom, sirev, alias_len) BFROMA (0xef000000, rom, sirev, alias_len)
#define BFROM_STUB { 0, 0, 0, 0, NULL, } #define BFROM_STUB { 0, 0, 0, 0, NULL, }
static const struct bfrom bf50x_roms[] = { static const struct bfrom bf50x_roms[] =
{
BFROM (50x, 0, 0x1000000), BFROM (50x, 0, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf51x_roms[] = { static const struct bfrom bf51x_roms[] =
{
BFROM (51x, 2, 0x1000000), BFROM (51x, 2, 0x1000000),
BFROM (51x, 1, 0x1000000), BFROM (51x, 1, 0x1000000),
BFROM (51x, 0, 0x1000000), BFROM (51x, 0, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf526_roms[] = { static const struct bfrom bf526_roms[] =
{
BFROM (526, 1, 0x1000000), BFROM (526, 1, 0x1000000),
BFROM (526, 0, 0x1000000), BFROM (526, 0, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf527_roms[] = { static const struct bfrom bf527_roms[] =
{
BFROM (527, 2, 0x1000000), BFROM (527, 2, 0x1000000),
BFROM (527, 1, 0x1000000), BFROM (527, 1, 0x1000000),
BFROM (527, 0, 0x1000000), BFROM (527, 0, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf533_roms[] = { static const struct bfrom bf533_roms[] =
{
BFROM (533, 6, 0x1000000), BFROM (533, 6, 0x1000000),
BFROM (533, 5, 0x1000000), BFROM (533, 5, 0x1000000),
BFROM (533, 4, 0x1000000), BFROM (533, 4, 0x1000000),
@ -874,14 +913,16 @@ static const struct bfrom bf533_roms[] = {
BFROM (533, 1, 0x1000000), BFROM (533, 1, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf537_roms[] = { static const struct bfrom bf537_roms[] =
{
BFROM (537, 3, 0x100000), BFROM (537, 3, 0x100000),
BFROM (537, 2, 0x100000), BFROM (537, 2, 0x100000),
BFROM (537, 1, 0x100000), BFROM (537, 1, 0x100000),
BFROM (537, 0, 0x100000), BFROM (537, 0, 0x100000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf538_roms[] = { static const struct bfrom bf538_roms[] =
{
BFROM (538, 5, 0x1000000), BFROM (538, 5, 0x1000000),
BFROM (538, 4, 0x1000000), BFROM (538, 4, 0x1000000),
BFROM (538, 3, 0x1000000), BFROM (538, 3, 0x1000000),
@ -890,7 +931,8 @@ static const struct bfrom bf538_roms[] = {
BFROM (538, 0, 0x1000000), BFROM (538, 0, 0x1000000),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf54x_roms[] = { static const struct bfrom bf54x_roms[] =
{
BFROM (54x, 2, 0), BFROM (54x, 2, 0),
BFROM (54x, 1, 0), BFROM (54x, 1, 0),
BFROM (54x, 0, 0), BFROM (54x, 0, 0),
@ -899,12 +941,14 @@ static const struct bfrom bf54x_roms[] = {
BFROMA (0xffa14000, 54x_l1, 0, 0), BFROMA (0xffa14000, 54x_l1, 0, 0),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf561_roms[] = { static const struct bfrom bf561_roms[] =
{
/* XXX: No idea what the actual wrap limit is here. */ /* XXX: No idea what the actual wrap limit is here. */
BFROM (561, 5, 0), BFROM (561, 5, 0),
BFROM_STUB, BFROM_STUB,
}; };
static const struct bfrom bf59x_roms[] = { static const struct bfrom bf59x_roms[] =
{
BFROM (59x, 1, 0x1000000), BFROM (59x, 1, 0x1000000),
BFROM (59x, 0, 0x1000000), BFROM (59x, 0, 0x1000000),
BFROMA (0xffa10000, 59x_l1, 1, 0), BFROMA (0xffa10000, 59x_l1, 1, 0),