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aarch64: Add support for Armv8.9-A and Armv9.4-A Architectures.

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This patch adds AArch64 support for Armv8.9-A architecture (-march=armv8.9-a)
and Armv9.4-A architecture (-march=armv9.4-a).
This commit is contained in:
srinath 2023-11-02 12:40:29 +00:00
parent bf77f42f67
commit 8cee11cacc
4 changed files with 14 additions and 3 deletions
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2
gas/NEWS
View file

@ -1,5 +1,7 @@
-*- text -*-
* Add support for 'armv8.9-a' and 'armv9.4-a' for -march in AArch64 GAS.
* Add support for Intel USER_MSR instructions.
* Add support for Intel AVX10.1.

2
gas/config/tc-aarch64.c
View file

@ -10241,11 +10241,13 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
{"armv8.6-a", AARCH64_ARCH_FEATURES (V8_6A)},
{"armv8.7-a", AARCH64_ARCH_FEATURES (V8_7A)},
{"armv8.8-a", AARCH64_ARCH_FEATURES (V8_8A)},
{"armv8.9-a", AARCH64_ARCH_FEATURES (V8_9A)},
{"armv8-r", AARCH64_ARCH_FEATURES (V8R)},
{"armv9-a", AARCH64_ARCH_FEATURES (V9A)},
{"armv9.1-a", AARCH64_ARCH_FEATURES (V9_1A)},
{"armv9.2-a", AARCH64_ARCH_FEATURES (V9_2A)},
{"armv9.3-a", AARCH64_ARCH_FEATURES (V9_3A)},
{"armv9.4-a", AARCH64_ARCH_FEATURES (V9_4A)},
{NULL, AARCH64_NO_FEATURES}
};

4
gas/doc/c-aarch64.texi
View file

@ -114,8 +114,8 @@ instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a},
@code{armv8-r}, @code{armv9-a}, @code{armv9.1-a}, @code{armv9.2-a},
and @code{armv9.3-a}.
@code{armv8.9-a}, @code{armv8-r}, @code{armv9-a}, @code{armv9.1-a},
@code{armv9.2-a}, @code{armv9.3-a} and @code{armv9.4-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are

9
include/opcode/aarch64.h
View file

@ -157,11 +157,12 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_V8_8A,
/* Common Short Sequence Compression instructions. */
AARCH64_FEATURE_CSSC,
/* Armv8.9-A processors. */
AARCH64_FEATURE_V8_9A,
/* SME2. */
AARCH64_FEATURE_SME2,
DUMMY1,
DUMMY2,
DUMMY3,
AARCH64_NUM_FEATURES
};
@ -216,6 +217,7 @@ enum aarch64_feature_bit {
#define AARCH64_ARCH_V8_8A_FEATURES(X) (AARCH64_FEATBIT (X, V8_8A) \
| AARCH64_FEATBIT (X, MOPS) \
| AARCH64_FEATBIT (X, HBC))
#define AARCH64_ARCH_V8_9A_FEATURES(X) (AARCH64_FEATBIT (X, V8_9A))
#define AARCH64_ARCH_V9A_FEATURES(X) (AARCH64_FEATBIT (X, V9A) \
| AARCH64_FEATBIT (X, F16) \
@ -224,6 +226,7 @@ enum aarch64_feature_bit {
#define AARCH64_ARCH_V9_1A_FEATURES(X) AARCH64_ARCH_V8_6A_FEATURES (X)
#define AARCH64_ARCH_V9_2A_FEATURES(X) AARCH64_ARCH_V8_7A_FEATURES (X)
#define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X)
#define AARCH64_ARCH_V9_4A_FEATURES(X) AARCH64_ARCH_V8_9A_FEATURES (X)
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \
@ -244,6 +247,8 @@ enum aarch64_feature_bit {
| AARCH64_ARCH_V8_7A_FEATURES (X))
#define AARCH64_ARCH_V8_8A(X) (AARCH64_ARCH_V8_7A (X) \
| AARCH64_ARCH_V8_8A_FEATURES (X))
#define AARCH64_ARCH_V8_9A(X) (AARCH64_ARCH_V8_8A (X) \
| AARCH64_ARCH_V8_9A_FEATURES (X))
#define AARCH64_ARCH_V8R(X) ((AARCH64_ARCH_V8_4A (X) \
| AARCH64_FEATBIT (X, V8R)) \
& ~AARCH64_FEATBIT (X, V8A) \
@ -257,6 +262,8 @@ enum aarch64_feature_bit {
| AARCH64_ARCH_V9_2A_FEATURES (X))
#define AARCH64_ARCH_V9_3A(X) (AARCH64_ARCH_V9_2A (X) \
| AARCH64_ARCH_V9_3A_FEATURES (X))
#define AARCH64_ARCH_V9_4A(X) (AARCH64_ARCH_V9_3A (X) \
| AARCH64_ARCH_V9_4A_FEATURES (X))
#define AARCH64_ARCH_NONE(X) 0