s390: Avoid reloc overflows on undefined weak symbols
Replace relative long addressing instructions of weak symbols, which will definitely resolve to zero, with either a load address of 0, a NOP, or a trapping insn. This prevents the PC32DBL relocation from overflowing in case the binary will be loaded at 4GB or more. bfd/ChangeLog: * bfd/elf64-s390.c (elf_s390_relocate_section): Replace instructions using undefined weak symbols with relative addressing to avoid relocation overflows. ld/ChangeLog: * ld/testsuite/ld-s390/s390.exp: * ld/testsuite/ld-s390/8GB.ld: New test. * ld/testsuite/ld-s390/weakundef-1.dd: New test. * ld/testsuite/ld-s390/weakundef-1.s: New test.
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@ -2475,6 +2475,60 @@ elf_s390_relocate_section (bfd *output_bfd,
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+ h->plt.offset);
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goto do_relocation;
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}
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/* Replace relative long addressing instructions of weak
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symbols, which will definitely resolve to zero, with
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either a load address of 0, a NOP, or a trapping insn.
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This prevents the PC32DBL relocation from overflowing in
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case the binary will be loaded at 4GB or more. */
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if (h != NULL
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&& h->root.type == bfd_link_hash_undefweak
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&& !h->root.linker_def
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&& (bfd_link_executable (info)
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|| ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
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&& r_type == R_390_PC32DBL)
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{
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void *insn_start = contents + rel->r_offset - 2;
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uint16_t op = bfd_get_16 (input_bfd, insn_start) & 0xff0f;
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uint8_t reg = bfd_get_8 (input_bfd, insn_start + 1) & 0xf0;
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/* NOTE: The order of the if's is important! */
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/* Replace load address relative long (larl) with load
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address (lay) */
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if (op == 0xc000)
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{
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/* larl rX,<weak sym> -> lay rX,0(0) */
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bfd_put_16 (output_bfd, 0xe300 | reg, insn_start);
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bfd_put_32 (output_bfd, 0x71, insn_start + 2);
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continue;
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}
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/* Replace prefetch data relative long (pfdrl) with a NOP */
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else if (op == 0xc602)
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{
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/* Emit a 6-byte NOP: jgnop . */
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bfd_put_16 (output_bfd, 0xc004, insn_start);
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bfd_put_32 (output_bfd, 0x0, insn_start + 2);
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continue;
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}
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/* Replace the following instructions with a trap:
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- branch relative and save long (brasl)
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- load (logical) relative long (lrl, lgrl, lgfrl, llgfrl)
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- load (logical) halfword relative long (lhrl, lghrl, llhrl, llghrl)
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- store relative long (strl, stgrl)
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- store halfword relative long (sthrl)
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- execute relative long (exrl)
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- compare (logical) relative long (crl, clrl, cgrl, clgrl, cgfrl, clgfrl)
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- compare (logical) halfword relative long (chrl, cghrl, clhrl, clghrl)
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- branch relative on count high (brcth) */
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else if (op == 0xc005 || (op & 0xff00) == 0xc400
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|| (op & 0xff00) == 0xc600 || op == 0xcc06)
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{
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/* Emit a 6-byte trap: jg .+2 */
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bfd_put_16 (output_bfd, 0xc0f4, insn_start);
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bfd_put_32 (output_bfd, 0x1, insn_start + 2);
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continue;
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}
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}
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/* Fall through. */
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case R_390_8:
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1
ld/testsuite/ld-s390/8GB.ld
Normal file
1
ld/testsuite/ld-s390/8GB.ld
Normal file
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@ -0,0 +1 @@
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SECTIONS { . = 0x200000000; }
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@ -85,6 +85,9 @@ set s390xtests {
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"-m64" {pltoffset-1.s}
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{{objdump "-dzrj.text --stop-address=16" pltoffset-1.dd}}
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"pltoffset-1"}
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{"WEAKUNDEF1: overflow test"
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"-m elf64_s390 -dT 8GB.ld --no-error-rwx-segments" "" "-m64" {weakundef-1.s}
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{{objdump "-dzrj.text" weakundef-1.dd}} "weakundef-1"}
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}
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if [istarget "s390-*-*"] {
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15
ld/testsuite/ld-s390/weakundef-1.dd
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15
ld/testsuite/ld-s390/weakundef-1.dd
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@ -0,0 +1,15 @@
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tmpdir/weakundef-1: file format elf64-s390
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Disassembly of section .text:
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.* <foo>:
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.*: c0 10 00 00 00 1e [ ]*larl %r1,20000003c <d>
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.*: c0 10 00 00 00 1f [ ]*larl %r1,200000044 <wd>
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.*: e3 10 00 00 00 71 [ ]*lay %r1,0
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 f4 00 00 00 01 [ ]*jg .*
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.*: c0 04 00 00 00 00 [ ]*jgnop .*
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18
ld/testsuite/ld-s390/weakundef-1.s
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18
ld/testsuite/ld-s390/weakundef-1.s
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@ -0,0 +1,18 @@
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.text
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.globl foo
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foo:
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larl %r1,d
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larl %r1,wd
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larl %r1,wu
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brasl %r1,wu
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crl %r1,wu
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lrl %r1,wu
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strl %r1,wu
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exrl %r1,wu
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brcth %r1,wu
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pfdrl %r1,wu
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.weak wd
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.weak wu
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.data
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d: .quad 0x123
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wd: .quad 0x123
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