Add -Wnodiscard option so that warning about discarded instructions
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
This commit is contained in:
Andrew Cagney
parent
8d2e72a1c8
commit
8782bfcfc4
4 changed files with 1638 additions and 1011 deletions
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@ -1,7 +1,40 @@
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Wed Oct 8 13:10:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* gen.c (insn_list_insert): Missing \n in warning.
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* ld-insn.c (load_insn_table): Only notify of discarded
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instrctions when warn.discard enabled.
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* igen.h: Add option.warn.discard, default enabled.
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* igen.c (main): Add -Wnodiscard option.
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* ld-insn.c (record_type): For old record type, check the number
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of fields is correct.
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(load_insn_table): Allow insn assembler and insn model records to
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appear in any order.
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(parse_insn_model_record): Rename from parse_insn_model_records.
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Parse only one record.
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(parse_insn_mnemonic_record): Rename from
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parse_insn_mnemonic_records. Parse only one record.
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Tue Sep 23 15:52:06 1997 Felix Lee <flee@yin.cygnus.com>
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* gen-itable.c (gen_itable_h): [nr_itable_* + 1] to avoid
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illegal zero-sized array.
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(itable_print_set): likewise, avoid empty initializers.
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Mon Sep 22 18:49:07 1997 Felix Lee <flee@cygnus.com>
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* configure.in: i386-windows is a cross, so don't expect
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libiberty to be there.
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* configure: updated.
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Fri Sep 19 10:36:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* igen.c (print_function_name): Put the format name after the
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function / instruction name, not before.
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(print_itrace): Better format trace code.
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Tue Sep 16 11:01:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
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@ -491,8 +491,9 @@ print_itrace (lf *file,
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lf_indent_suppress (file);
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lf_printf (file, "#if defined (WITH_TRACE)\n");
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lf_printf (file, "/* trace the instructions execution if enabled */\n");
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lf_printf (file, "if (TRACE_%s_P (CPU)) {\n", phase);
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lf_indent (file, +2);
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lf_printf (file, "if (TRACE_%s_P (CPU))\n", phase);
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lf_printf (file, " {\n");
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lf_indent (file, +4);
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if (insn->mnemonics != NULL)
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{
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insn_mnemonic_entry *assembler = insn->mnemonics;
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@ -541,8 +542,8 @@ print_itrace (lf *file,
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lf_printf (file, "itable[MY_INDEX].name);\n");
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lf_indent (file, -indent);
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}
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lf_indent (file, -2);
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lf_printf (file, "}\n");
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lf_indent (file, -4);
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lf_printf (file, " }\n");
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lf_indent_suppress (file);
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lf_printf (file, "#endif\n");
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}
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@ -989,6 +990,8 @@ main (int argc,
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printf ("\n");
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printf (" -Werror\n");
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printf ("\t Make warnings errors\n");
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printf (" -Wnodiscard\n");
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printf ("\t Suppress warnings about discarded instructions\n");
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printf ("\n");
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printf (" -G [!]<gen-option>\n");
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printf ("\t Any of the following options:\n");
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@ -1186,6 +1189,10 @@ main (int argc,
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{
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if (strcmp (optarg, "error") == 0)
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options.warning = error;
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else if (strcmp (optarg, "nodiscard") == 0)
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options.warn.discard = 0;
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else if (strcmp (optarg, "discard") == 0)
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options.warn.discard = 1;
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else
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error (NULL, "Unknown -W argument `%s'\n", optarg);
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break;
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269
sim/igen/igen.h
269
sim/igen/igen.h
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@ -18,127 +18,180 @@
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*/
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/* What does the instruction look like - bit ordering, size, widths or offesets */
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extern int hi_bit_nr;
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extern int insn_bit_size;
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extern int insn_specifying_widths;
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/* what should global names be prefixed with? */
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extern const char *global_name_prefix;
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extern const char *global_uname_prefix;
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/* generation options: */
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enum {
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generate_with_direct_access = 0x1,
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generate_with_icache = 0x2,
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generate_with_semantic_icache = 0x4,
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generate_with_insn_in_icache = 0x8,
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generate_with_semantic_returning_modified_nia_only = 0x010,
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generate_with_semantic_conditional_issue = 0x020,
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generate_with_idecode_slot_verification = 0x040,
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generate_with_semantic_delayed_branch = 0x080,
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generate_with_semantic_zero_r0 = 0x100
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};
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/* code-generation options: */
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typedef enum {
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/* Transfer control to an instructions semantic code using the the
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standard call/return mechanism */
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generate_calls = 0x1000,
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generate_calls,
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/* Transfer control to an instructions semantic code using
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(computed) goto's instead of the more conventional call/return
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mechanism */
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generate_jumps = 0x2000,
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generate_jumps,
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} igen_code;
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extern int code;
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extern int icache_size;
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/* Instruction expansion?
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Should the semantic code for each instruction, when the oportunity
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arrises, be expanded according to the variable opcode files that
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the instruction decode process renders constant */
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extern int generate_expanded_instructions;
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/* SMP?
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Should the generated code include SMP support (>0) and if so, for
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how many processors? */
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extern int generate_smp;
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/* Misc junk */
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/* Function header definitions */
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/* Cache functions: */
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extern int print_icache_function_formal
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(lf *file);
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extern int print_icache_function_actual
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(lf *file);
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extern int print_icache_function_type
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(lf *file);
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extern int print_semantic_function_formal
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(lf *file);
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extern int print_semantic_function_actual
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(lf *file);
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extern int print_semantic_function_type
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(lf *file);
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extern void print_my_defines
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(lf *file,
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insn_bits *expanded_bits,
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table_entry *file_entry);
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extern void print_itrace
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(lf *file,
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table_entry *file_entry,
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int idecode);
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typedef enum {
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function_name_prefix_semantics,
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function_name_prefix_idecode,
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function_name_prefix_itable,
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function_name_prefix_icache,
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function_name_prefix_none
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} lf_function_name_prefixes;
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nia_is_cia_plus_one,
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nia_is_void,
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nia_is_invalid,
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} igen_nia;
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extern int print_function_name
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(lf *file,
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const char *basename,
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insn_bits *expanded_bits,
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lf_function_name_prefixes prefix);
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typedef struct _igen_gen_options igen_gen_options;
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struct _igen_gen_options {
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int direct_access;
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int semantic_icache;
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int insn_in_icache;
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int conditional_issue;
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int slot_verification;
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int delayed_branch;
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/* If zeroing a register, which one? */
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int zero_reg;
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int zero_reg_nr;
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/* should multiple simulators be generated? */
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int multi_sim;
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/* should the simulator support multi word instructions and if so,
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what is the max nr of words. */
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int multi_word;
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/* SMP? Should the generated code include SMP support (>0) and if
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so, for how many processors? */
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int smp;
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/* how should the next instruction address be computed? */
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igen_nia nia;
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/* nr of instructions in the decoded instruction cache */
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int icache;
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int icache_size;
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/* see above */
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igen_code code;
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};
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typedef struct _igen_trace_options igen_trace_options;
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struct _igen_trace_options {
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int rule_selection;
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int rule_rejection;
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int entries;
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int combine;
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};
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typedef struct _igen_prefix_name {
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char *name;
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char *uname;
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} igen_prefix_name;
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typedef struct _igen_prefix_options {
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igen_prefix_name global;
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igen_prefix_name engine;
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igen_prefix_name icache;
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igen_prefix_name idecode;
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igen_prefix_name itable;
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igen_prefix_name semantics;
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igen_prefix_name support;
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} igen_prefix_options;
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typedef struct _igen_decode_options igen_decode_options ;
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struct _igen_decode_options {
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/* Combine tables? Should the generator make a second pass through
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each generated table looking for any sub-entries that contain the
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same instructions. Those entries being merged into a single
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table */
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int combine;
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/* Instruction expansion? Should the semantic code for each
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instruction, when the oportunity arrises, be expanded according
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to the variable opcode files that the instruction decode process
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renders constant */
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int duplicate;
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/* Treat reserved fields as constant (zero) instead of ignoring
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their value when determining decode tables */
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int zero_reserved;
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/* Convert any padded switch rules into goto_switch */
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int switch_as_goto;
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/* Force all tables to be generated with this lookup mechanism */
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char *overriding_gen;
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};
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typedef struct _igen_warn_options igen_warn_options;
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struct _igen_warn_options {
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int discard;
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};
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typedef struct _igen_options igen_options;
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struct _igen_options {
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/* What does the instruction look like - bit ordering, size, widths or
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offesets */
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int hi_bit_nr;
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int insn_bit_size;
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int insn_specifying_widths;
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/* what should global names be prefixed with? */
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igen_prefix_options prefix;
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/* See above for options and flags */
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igen_gen_options gen;
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/* See above for trace options */
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igen_trace_options trace;
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/* See above for decode options */
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igen_decode_options decode;
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/* Filter set to be used on the flag field of the instruction table */
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filter *flags_filter;
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/* See above for warn options */
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igen_warn_options warn;
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/* Be more picky about the input */
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error_func (*warning);
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/* Model (processor) set - like flags_filter. Used to select the
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specific ISA within a processor family. */
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filter *model_filter;
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/* Format name set */
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filter *format_name_filter;
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};
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extern igen_options options;
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/* default options - hopefully backward compatible */ \
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#define INIT_OPTIONS(OPTIONS) \
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do { \
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memset (&(OPTIONS), 0, sizeof (OPTIONS)); \
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memset (&(OPTIONS).warn, -1, sizeof ((OPTIONS).warn)); \
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(OPTIONS).hi_bit_nr = 0; \
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(OPTIONS).insn_bit_size = default_insn_bit_size; \
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(OPTIONS).insn_specifying_widths = 0; \
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(OPTIONS).prefix.global.name = ""; \
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(OPTIONS).prefix.global.uname = ""; \
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(OPTIONS).prefix.engine = (OPTIONS).prefix.global; \
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(OPTIONS).prefix.icache = (OPTIONS).prefix.global; \
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(OPTIONS).prefix.idecode = (OPTIONS).prefix.global; \
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(OPTIONS).prefix.itable = (OPTIONS).prefix.global; \
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(OPTIONS).prefix.semantics = (OPTIONS).prefix.global; \
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(OPTIONS).prefix.support = (OPTIONS).prefix.global; \
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(OPTIONS).gen.code = generate_calls; \
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(OPTIONS).gen.icache_size = 1024; \
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(OPTIONS).warning = warning; \
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} while (0)
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2332
sim/igen/ld-insn.c
2332
sim/igen/ld-insn.c
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