backout m32rx stuff, not ready to be checked in
This commit is contained in:
Doug Evans
parent
3bdf92bdc8
commit
853713a768
8 changed files with 1097 additions and 1530 deletions
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@ -56,10 +56,13 @@ static void insert_insn_normal
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static CGEN_INLINE void
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insert_normal (value, attrs, start, length, shift, total_length, buffer)
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long value;
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long value;
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unsigned int attrs;
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int start, length, shift, total_length;
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char *buffer;
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int start;
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int length;
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int shift;
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int total_length;
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char * buffer;
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{
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bfd_vma x;
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@ -70,7 +73,7 @@ insert_normal (value, attrs, start, length, shift, total_length, buffer)
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switch (total_length)
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{
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case 8:
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x = *(unsigned char *) buffer;
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x = * (unsigned char *) buffer;
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break;
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case 16:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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@ -99,7 +102,7 @@ insert_normal (value, attrs, start, length, shift, total_length, buffer)
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switch (total_length)
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{
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case 8:
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*buffer = value;
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* buffer = value;
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break;
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case 16:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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@ -120,6 +123,404 @@ insert_normal (value, attrs, start, length, shift, total_length, buffer)
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}
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/* -- assembler routines inserted here */
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/* -- asm.c */
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/* Handle shigh(), high(). */
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static const char *
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parse_h_hi16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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unsigned long min, max;
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unsigned long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "high(", 5) == 0)
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{
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*strp += 5;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_ULO,
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&result_type, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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*valuep >>= 16;
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return errmsg;
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}
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else if (strncmp (*strp, "shigh(", 6) == 0)
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{
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*strp += 6;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_SLO,
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&result_type, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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*valuep = (*valuep >> 16) + ((*valuep) & 0x8000 ? 1 : 0);
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return errmsg;
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}
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return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep);
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}
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/* Handle low() in a signed context. Also handle sda().
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_h_slo16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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long min, max;
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long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16,
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&result_type, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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if (strncmp (*strp, "sda(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_SDA16, NULL, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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return cgen_parse_signed_integer (strp, opindex, min, max, valuep);
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}
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/* Handle low() in an unsigned context.
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_h_ulo16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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unsigned long min, max;
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unsigned long *valuep;
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16,
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&result_type, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep);
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}
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/* -- */
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/* Main entry point for operand parsing.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers.
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*/
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CGEN_INLINE const char *
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m32r_cgen_parse_operand (opindex, strp, fields)
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int opindex;
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const char ** strp;
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CGEN_FIELDS * fields;
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{
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const char * errmsg;
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switch (opindex)
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{
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case M32R_OPERAND_SR :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
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break;
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case M32R_OPERAND_DR :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
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break;
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case M32R_OPERAND_SRC1 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
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break;
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case M32R_OPERAND_SRC2 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
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break;
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case M32R_OPERAND_SCR :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r2);
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break;
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case M32R_OPERAND_DCR :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r1);
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break;
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case M32R_OPERAND_SIMM8 :
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errmsg = cgen_parse_signed_integer (strp, 7, -128, 127, &fields->f_simm8);
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break;
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case M32R_OPERAND_SIMM16 :
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errmsg = cgen_parse_signed_integer (strp, 8, -32768, 32767, &fields->f_simm16);
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break;
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case M32R_OPERAND_UIMM4 :
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errmsg = cgen_parse_unsigned_integer (strp, 9, 0, 15, &fields->f_uimm4);
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break;
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case M32R_OPERAND_UIMM5 :
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errmsg = cgen_parse_unsigned_integer (strp, 10, 0, 31, &fields->f_uimm5);
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break;
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case M32R_OPERAND_UIMM16 :
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errmsg = cgen_parse_unsigned_integer (strp, 11, 0, 65535, &fields->f_uimm16);
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break;
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case M32R_OPERAND_HI16 :
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errmsg = parse_h_hi16 (strp, 12, 0, 65535, &fields->f_hi16);
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break;
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case M32R_OPERAND_SLO16 :
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errmsg = parse_h_slo16 (strp, 13, -32768, 32767, &fields->f_simm16);
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break;
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case M32R_OPERAND_ULO16 :
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errmsg = parse_h_ulo16 (strp, 14, 0, 65535, &fields->f_uimm16);
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break;
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case M32R_OPERAND_UIMM24 :
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errmsg = cgen_parse_address (strp, 15, 0, NULL, & fields->f_uimm24);
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break;
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case M32R_OPERAND_DISP8 :
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errmsg = cgen_parse_address (strp, 16, 0, NULL, & fields->f_disp8);
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break;
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case M32R_OPERAND_DISP16 :
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errmsg = cgen_parse_address (strp, 17, 0, NULL, & fields->f_disp16);
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break;
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case M32R_OPERAND_DISP24 :
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errmsg = cgen_parse_address (strp, 18, 0, NULL, & fields->f_disp24);
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while parsing.\n", opindex);
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abort ();
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}
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return errmsg;
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}
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/* Main entry point for operand insertion.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers. It's also needed by GAS to insert operands that couldn't be
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resolved during parsing.
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*/
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CGEN_INLINE void
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m32r_cgen_insert_operand (opindex, fields, buffer)
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int opindex;
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CGEN_FIELDS * fields;
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cgen_insn_t * buffer;
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{
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switch (opindex)
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{
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case M32R_OPERAND_SR :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_DR :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SRC1 :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SRC2 :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SCR :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_DCR :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SIMM8 :
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insert_normal (fields->f_simm8, 0, 8, 8, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SIMM16 :
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insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_UIMM4 :
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insert_normal (fields->f_uimm4, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_UIMM5 :
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insert_normal (fields->f_uimm5, 0|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_UIMM16 :
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insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_HI16 :
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insert_normal (fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_SLO16 :
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insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_ULO16 :
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insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_UIMM24 :
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insert_normal (fields->f_uimm24, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_DISP8 :
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insert_normal (fields->f_disp8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_DISP16 :
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insert_normal (fields->f_disp16, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case M32R_OPERAND_DISP24 :
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insert_normal (fields->f_disp24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while building insn.\n",
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opindex);
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abort ();
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}
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}
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/* Main entry point for operand validation.
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This function is called from GAS when it has fully resolved an operand
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that couldn't be resolved during parsing.
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The result is NULL for success or an error message (which may be
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computed into a static buffer).
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*/
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CGEN_INLINE const char *
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m32r_cgen_validate_operand (opindex, fields)
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int opindex;
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const CGEN_FIELDS * fields;
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{
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const char * errmsg = NULL;
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switch (opindex)
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{
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case M32R_OPERAND_SR :
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/* nothing to do */
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break;
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case M32R_OPERAND_DR :
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/* nothing to do */
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break;
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case M32R_OPERAND_SRC1 :
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/* nothing to do */
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break;
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case M32R_OPERAND_SRC2 :
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/* nothing to do */
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break;
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case M32R_OPERAND_SCR :
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/* nothing to do */
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break;
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case M32R_OPERAND_DCR :
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/* nothing to do */
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break;
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case M32R_OPERAND_SIMM8 :
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errmsg = cgen_validate_signed_integer (fields->f_simm8, -128, 127);
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break;
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case M32R_OPERAND_SIMM16 :
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errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767);
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break;
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case M32R_OPERAND_UIMM4 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm4, 0, 15);
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break;
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case M32R_OPERAND_UIMM5 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm5, 0, 31);
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break;
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case M32R_OPERAND_UIMM16 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535);
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break;
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case M32R_OPERAND_HI16 :
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errmsg = cgen_validate_unsigned_integer (fields->f_hi16, 0, 65535);
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break;
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case M32R_OPERAND_SLO16 :
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errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767);
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break;
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case M32R_OPERAND_ULO16 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535);
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break;
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case M32R_OPERAND_UIMM24 :
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/* nothing to do */
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break;
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case M32R_OPERAND_DISP8 :
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/* nothing to do */
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break;
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case M32R_OPERAND_DISP16 :
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/* nothing to do */
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break;
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case M32R_OPERAND_DISP24 :
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/* nothing to do */
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while validating operand.\n",
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opindex);
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abort ();
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}
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return errmsg;
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}
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cgen_parse_fn * m32r_cgen_parse_handlers[] =
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{ 0, /* default */
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parse_insn_normal,
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};
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cgen_insert_fn * m32r_cgen_insert_handlers[] =
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{ 0, /* default */
|
||||
insert_insn_normal,
|
||||
};
|
||||
|
||||
void
|
||||
m32r_cgen_init_asm (mach, endian)
|
||||
int mach;
|
||||
enum cgen_endian endian;
|
||||
{
|
||||
m32r_cgen_init_tables (mach);
|
||||
cgen_set_cpu (& m32r_cgen_opcode_data, mach, endian);
|
||||
cgen_asm_init ();
|
||||
}
|
||||
|
||||
|
||||
/* Default insn parser.
|
||||
|
||||
|
|
@ -137,25 +538,25 @@ insert_normal (value, attrs, start, length, shift, total_length, buffer)
|
|||
|
||||
static const char *
|
||||
parse_insn_normal (insn, strp, fields)
|
||||
const CGEN_INSN *insn;
|
||||
const char **strp;
|
||||
CGEN_FIELDS *fields;
|
||||
const CGEN_INSN * insn;
|
||||
const char ** strp;
|
||||
CGEN_FIELDS * fields;
|
||||
{
|
||||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||||
const char *str = *strp;
|
||||
const char *errmsg;
|
||||
const char *p;
|
||||
const unsigned char *syn;
|
||||
const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
|
||||
const char * str = *strp;
|
||||
const char * errmsg;
|
||||
const char * p;
|
||||
const unsigned char * syn;
|
||||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||||
int past_opcode_p;
|
||||
int past_opcode_p;
|
||||
#endif
|
||||
|
||||
/* For now we assume the mnemonic is first (there are no leading operands).
|
||||
We can parse it without needing to set up operand parsing. */
|
||||
p = CGEN_INSN_MNEMONIC (insn);
|
||||
while (*p && *p == *str)
|
||||
++p, ++str;
|
||||
if (*p || (*str && !isspace (*str)))
|
||||
while (* p && * p == * str)
|
||||
++ p, ++ str;
|
||||
if (* p || (* str && !isspace (* str)))
|
||||
return "unrecognized instruction";
|
||||
|
||||
CGEN_INIT_PARSE ();
|
||||
|
|
@ -167,24 +568,27 @@ parse_insn_normal (insn, strp, fields)
|
|||
/* We don't check for (*str != '\0') here because we want to parse
|
||||
any trailing fake arguments in the syntax string. */
|
||||
syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
|
||||
|
||||
/* Mnemonics come first for now, ensure valid string. */
|
||||
if (! CGEN_SYNTAX_MNEMONIC_P (*syn))
|
||||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||||
abort ();
|
||||
|
||||
++syn;
|
||||
while (*syn != 0)
|
||||
|
||||
while (* syn != 0)
|
||||
{
|
||||
/* Non operand chars must match exactly. */
|
||||
/* FIXME: Need to better handle whitespace. */
|
||||
if (CGEN_SYNTAX_CHAR_P (*syn))
|
||||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||||
{
|
||||
if (*str == CGEN_SYNTAX_CHAR (*syn))
|
||||
if (*str == CGEN_SYNTAX_CHAR (* syn))
|
||||
{
|
||||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||||
if (*syn == ' ')
|
||||
if (* syn == ' ')
|
||||
past_opcode_p = 1;
|
||||
#endif
|
||||
++syn;
|
||||
++str;
|
||||
++ syn;
|
||||
++ str;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -202,20 +606,20 @@ parse_insn_normal (insn, strp, fields)
|
|||
return errmsg;
|
||||
|
||||
/* Done with this operand, continue with next one. */
|
||||
++syn;
|
||||
++ syn;
|
||||
}
|
||||
|
||||
/* If we're at the end of the syntax string, we're done. */
|
||||
if (*syn == '\0')
|
||||
if (* syn == '\0')
|
||||
{
|
||||
/* FIXME: For the moment we assume a valid `str' can only contain
|
||||
blanks now. IE: We needn't try again with a longer version of
|
||||
the insn and it is assumed that longer versions of insns appear
|
||||
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
|
||||
while (isspace (*str))
|
||||
++str;
|
||||
while (isspace (* str))
|
||||
++ str;
|
||||
|
||||
if (*str != '\0')
|
||||
if (* str != '\0')
|
||||
return "junk at end of line"; /* FIXME: would like to include `str' */
|
||||
|
||||
return NULL;
|
||||
|
|
@ -230,13 +634,13 @@ parse_insn_normal (insn, strp, fields)
|
|||
|
||||
static void
|
||||
insert_insn_normal (insn, fields, buffer)
|
||||
const CGEN_INSN *insn;
|
||||
CGEN_FIELDS *fields;
|
||||
cgen_insn_t *buffer;
|
||||
const CGEN_INSN * insn;
|
||||
CGEN_FIELDS * fields;
|
||||
cgen_insn_t * buffer;
|
||||
{
|
||||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||||
bfd_vma value;
|
||||
const unsigned char *syn;
|
||||
const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
|
||||
bfd_vma value;
|
||||
const unsigned char * syn;
|
||||
|
||||
CGEN_INIT_INSERT ();
|
||||
value = CGEN_INSN_VALUE (insn);
|
||||
|
|
@ -251,7 +655,7 @@ insert_insn_normal (insn, fields, buffer)
|
|||
switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields)))
|
||||
{
|
||||
case 8:
|
||||
*buffer = value;
|
||||
* buffer = value;
|
||||
break;
|
||||
case 16:
|
||||
if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
|
||||
|
|
@ -273,9 +677,9 @@ insert_insn_normal (insn, fields, buffer)
|
|||
/* ??? Rather than scanning the syntax string again, we could store
|
||||
in `fields' a null terminated list of the fields that are present. */
|
||||
|
||||
for (syn = CGEN_SYNTAX_STRING (syntax); *syn != '\0'; ++syn)
|
||||
for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
|
||||
{
|
||||
if (CGEN_SYNTAX_CHAR_P (*syn))
|
||||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||||
continue;
|
||||
|
||||
m32r_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, buffer);
|
||||
|
|
@ -292,17 +696,17 @@ insert_insn_normal (insn, fields, buffer)
|
|||
|
||||
const CGEN_INSN *
|
||||
m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
||||
const char *str;
|
||||
CGEN_FIELDS *fields;
|
||||
cgen_insn_t *buf;
|
||||
char **errmsg;
|
||||
const char * str;
|
||||
CGEN_FIELDS * fields;
|
||||
cgen_insn_t * buf;
|
||||
char ** errmsg;
|
||||
{
|
||||
const char *start;
|
||||
CGEN_INSN_LIST *ilist;
|
||||
const char * start;
|
||||
CGEN_INSN_LIST * ilist;
|
||||
|
||||
/* Skip leading white space. */
|
||||
while (isspace (*str))
|
||||
++str;
|
||||
while (isspace (* str))
|
||||
++ str;
|
||||
|
||||
/* The instructions are stored in hashed lists.
|
||||
Get the first in the list. */
|
||||
|
|
@ -343,9 +747,9 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
|||
inline functions but of course that would only work for gcc. Since
|
||||
we're machine generating some code we could do that here too. Maybe
|
||||
later. */
|
||||
if (! (*CGEN_PARSE_FN (insn)) (insn, &str, fields))
|
||||
if (! CGEN_PARSE_FN (insn) (insn, & str, fields))
|
||||
{
|
||||
(*CGEN_INSERT_FN (insn)) (insn, fields, buf);
|
||||
CGEN_INSERT_FN (insn) (insn, fields, buf);
|
||||
/* It is up to the caller to actually output the insn and any
|
||||
queued relocs. */
|
||||
return insn;
|
||||
|
|
@ -376,12 +780,12 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
|||
|
||||
void
|
||||
m32r_cgen_asm_hash_keywords (opvals)
|
||||
CGEN_KEYWORD *opvals;
|
||||
CGEN_KEYWORD * opvals;
|
||||
{
|
||||
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
|
||||
const CGEN_KEYWORD_ENTRY *ke;
|
||||
const CGEN_KEYWORD_ENTRY * ke;
|
||||
|
||||
while ((ke = cgen_keyword_search_next (&search)) != NULL)
|
||||
while ((ke = cgen_keyword_search_next (& search)) != NULL)
|
||||
{
|
||||
#if 0 /* Unnecessary, should be done in the search routine. */
|
||||
if (! m32r_cgen_opval_supported (ke))
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue