bfd/
* elf32-spu.c (spu_elf_special_sections): Add "._ea". (spu_elf_relocate_section): Handle relocations against symbols defined in ._ea specially. binutils/ * embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol, and if present, put image in ".data.speelf". Put program handle in ".data.spehandle". ld/emulparams/ * elf32_spu.sh (OTHER_SECTIONS): Add "._ea". * elf32ppc.sh: If building with spu support, put ".data.spehandle" sections at the start of ".data" and provide a symbol to locate the directory of embedded spe programs. ld/testsuite/ * ld-spu/ear.s: Align various sections. * ld-spu/embed.rd: Update.
This commit is contained in:
parent
8c0848b509
commit
8374f9d4b5
10 changed files with 86 additions and 25 deletions
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@ -1,3 +1,9 @@
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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* elf32-spu.c (spu_elf_special_sections): Add "._ea".
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(spu_elf_relocate_section): Handle relocations against symbols
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defined in ._ea specially.
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2008-05-03 Daniel Jacobowitz <dan@codesourcery.com>
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2008-05-03 Daniel Jacobowitz <dan@codesourcery.com>
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* elf32-arm.c (elf32_arm_symbian_link_hash_table_create): Use
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* elf32-arm.c (elf32_arm_symbian_link_hash_table_create): Use
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@ -91,6 +91,7 @@ static reloc_howto_type elf_howto_table[] = {
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};
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};
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static struct bfd_elf_special_section const spu_elf_special_sections[] = {
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static struct bfd_elf_special_section const spu_elf_special_sections[] = {
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{ "._ea", 4, 0, SHT_PROGBITS, SHF_WRITE },
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{ ".toe", 4, 0, SHT_NOBITS, SHF_ALLOC },
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{ ".toe", 4, 0, SHT_NOBITS, SHF_ALLOC },
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{ NULL, 0, 0, 0, 0 }
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{ NULL, 0, 0, 0, 0 }
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};
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};
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@ -3887,8 +3888,10 @@ spu_elf_relocate_section (bfd *output_bfd,
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struct elf_link_hash_entry **sym_hashes;
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struct elf_link_hash_entry **sym_hashes;
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Elf_Internal_Rela *rel, *relend;
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Elf_Internal_Rela *rel, *relend;
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struct spu_link_hash_table *htab;
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struct spu_link_hash_table *htab;
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asection *ea = bfd_get_section_by_name (output_bfd, "._ea");
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int ret = TRUE;
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int ret = TRUE;
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bfd_boolean emit_these_relocs = FALSE;
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bfd_boolean emit_these_relocs = FALSE;
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bfd_boolean is_ea;
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bfd_boolean stubs;
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bfd_boolean stubs;
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htab = spu_hash_table (info);
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htab = spu_hash_table (info);
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@ -3903,7 +3906,7 @@ spu_elf_relocate_section (bfd *output_bfd,
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{
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{
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int r_type;
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int r_type;
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reloc_howto_type *howto;
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reloc_howto_type *howto;
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unsigned long r_symndx;
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unsigned int r_symndx;
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Elf_Internal_Sym *sym;
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Elf_Internal_Sym *sym;
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asection *sec;
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asection *sec;
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struct elf_link_hash_entry *h;
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struct elf_link_hash_entry *h;
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@ -3916,12 +3919,6 @@ spu_elf_relocate_section (bfd *output_bfd,
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r_symndx = ELF32_R_SYM (rel->r_info);
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r_symndx = ELF32_R_SYM (rel->r_info);
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r_type = ELF32_R_TYPE (rel->r_info);
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r_type = ELF32_R_TYPE (rel->r_info);
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if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64)
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{
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emit_these_relocs = TRUE;
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continue;
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}
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howto = elf_howto_table + r_type;
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howto = elf_howto_table + r_type;
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unresolved_reloc = FALSE;
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unresolved_reloc = FALSE;
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warned = FALSE;
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warned = FALSE;
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@ -3958,6 +3955,31 @@ spu_elf_relocate_section (bfd *output_bfd,
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if (info->relocatable)
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if (info->relocatable)
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continue;
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continue;
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is_ea = (ea != NULL
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&& sec != NULL
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&& sec->output_section == ea);
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if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64)
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{
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if (is_ea)
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{
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/* ._ea is a special section that isn't allocated in SPU
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memory, but rather occupies space in PPU memory as
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part of an embedded ELF image. If this reloc is
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against a symbol defined in ._ea, then transform the
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reloc into an equivalent one without a symbol
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relative to the start of the ELF image. */
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rel->r_addend += (relocation
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- ea->vma
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+ elf_section_data (ea)->this_hdr.sh_offset);
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rel->r_info = ELF32_R_INFO (0, r_type);
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}
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emit_these_relocs = TRUE;
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continue;
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}
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if (is_ea)
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unresolved_reloc = TRUE;
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if (unresolved_reloc)
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if (unresolved_reloc)
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{
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{
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(*_bfd_error_handler)
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(*_bfd_error_handler)
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@ -4059,7 +4081,6 @@ spu_elf_relocate_section (bfd *output_bfd,
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if (ret
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if (ret
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&& emit_these_relocs
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&& emit_these_relocs
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&& !info->relocatable
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&& !info->emitrelocations)
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&& !info->emitrelocations)
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{
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{
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Elf_Internal_Rela *wrel;
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Elf_Internal_Rela *wrel;
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@ -1,3 +1,9 @@
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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* embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol,
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and if present, put image in ".data.speelf". Put program handle
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in ".data.spehandle".
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2008-05-01 Nick Clifton <nickc@redhat.com>
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2008-05-01 Nick Clifton <nickc@redhat.com>
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* readelf.c (print_symbol): Add code to display non-printing
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* readelf.c (print_symbol): Add code to display non-printing
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#! /bin/sh
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#! /bin/sh
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# Embed an SPU ELF executable into a PowerPC object file.
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# Embed an SPU ELF executable into a PowerPC object file.
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#
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#
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# Copyright 2006, 2007 Free Software Foundation, Inc.
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# Copyright 2006, 2007, 2008 Free Software Foundation, Inc.
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#
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#
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# This file is part of GNU Binutils.
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# This file is part of GNU Binutils.
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#
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#
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# sections.
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# sections.
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# Find all _EAR_ symbols in .toe using readelf, sort by address, and
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# Find all _EAR_ symbols in .toe using readelf, sort by address, and
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# write the address of the corresponding PowerPC symbol in a table
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# write the address of the corresponding PowerPC symbol in a table
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# built in .data.spetoe. For _EAE_ symbols not in .toe, create
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# built in .data.spetoe. For _EAR_ symbols not in .toe, create
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# .reloc commands to relocate their location directly.
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# .reloc commands to relocate their location directly.
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# 3. Look for R_SPU_PPU32 and R_SPU_PPU64 relocations in the SPU ELF image
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# 3. Look for R_SPU_PPU32 and R_SPU_PPU64 relocations in the SPU ELF image
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# and create .reloc commands for them.
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# and create .reloc commands for them.
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print "#else"; \
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print "#else"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + (substr($3, 10) == "64" ? 4 : 0)", R_PPC_ADDR32, " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + (substr($3, 10) == "64" ? 4 : 0)", R_PPC_ADDR32, " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \
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print "#endif"; \
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print "#endif"; \
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if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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} \
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} \
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$3 ~ /unrecognized:/ { \
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$3 ~ /unrecognized:/ { \
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print "#else"; \
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print "#else"; \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + ($4 == "f" ? 4 : 0)", R_PPC_ADDR32, " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \
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print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + ($4 == "f" ? 4 : 0)", R_PPC_ADDR32, " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \
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print "#endif"; \
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print "#endif"; \
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if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
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} \
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} \
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'`
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'`
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#if defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__))
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#ifdef HAS_EA
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.section .data.speelf,"aw",@progbits
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#elif defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__))
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.section .data.rel.ro.speelf,"a",@progbits
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.section .data.rel.ro.speelf,"a",@progbits
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#else
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#else
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.section .rodata.speelf,"a",@progbits
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.section .rodata.speelf,"a",@progbits
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__speelf__:
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__speelf__:
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.incbin "${INFILE}"
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.incbin "${INFILE}"
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.section .data,"aw",@progbits
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.section .data.spehandle,"aw",@progbits
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.globl ${SYMBOL}
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.globl ${SYMBOL}
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.type ${SYMBOL}, @object
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.type ${SYMBOL}, @object
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# fill in a struct spe_program_handle
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# fill in a struct spe_program_handle
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@ -1,3 +1,10 @@
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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* elf32_spu.sh (OTHER_SECTIONS): Add "._ea".
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* elf32ppc.sh: If building with spu support, put ".data.spehandle"
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sections at the start of ".data" and provide a symbol to locate
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the directory of embedded spe programs.
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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* ldexp.c (exp_print_token): Add ABSOLUTE, MIN_K, ASSERT_K. Correct
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* ldexp.c (exp_print_token): Add ABSOLUTE, MIN_K, ASSERT_K. Correct
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@ -17,4 +17,5 @@ EMBEDDED=true
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MAXPAGESIZE=0x80
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MAXPAGESIZE=0x80
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DATA_ADDR="ALIGN(${MAXPAGESIZE})"
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DATA_ADDR="ALIGN(${MAXPAGESIZE})"
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OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0"
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OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0"
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OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }"
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OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }
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._ea 0 : { KEEP(*(._ea)) }"
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@ -14,3 +14,11 @@ PLT=".plt ${RELOCATING-0} : SPECIAL { *(.plt) }"
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GOTPLT="${PLT}"
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GOTPLT="${PLT}"
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OTHER_TEXT_SECTIONS="*(.glink)"
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OTHER_TEXT_SECTIONS="*(.glink)"
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EXTRA_EM_FILE=ppc32elf
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EXTRA_EM_FILE=ppc32elf
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if grep -q 'ld_elf32_spu_emulation' ldemul-list.h; then
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# crt1.o defines data_start and __data_start. Keep them first.
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# Next put all the .data.spehandle sections, with a trailing zero word.
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DATA_START_SYMBOLS="${RELOCATING+*crt1.o(.data .data.* .gnu.linkonce.d.*)
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PROVIDE (__spe_handle = .);
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*(.data.spehandle)
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. += 4 * (DEFINED (__spe_handle) || . != 0);}"
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fi
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@ -1,3 +1,8 @@
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2008-05-08 Alan Modra <amodra@bigpond.net.au>
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* ld-spu/ear.s: Align various sections.
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* ld-spu/embed.rd: Update.
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2008-05-05 Alan Modra <amodra@bigpond.net.au>
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2008-05-05 Alan Modra <amodra@bigpond.net.au>
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PR 6473
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PR 6473
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@ -5,6 +5,7 @@ _start:
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#test old-style toe _EAR_ syms
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#test old-style toe _EAR_ syms
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.section .toe,"a",@nobits
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.section .toe,"a",@nobits
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.p2align 4
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_EAR_:
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_EAR_:
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.space 16
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.space 16
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_EAR_bar:
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_EAR_bar:
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@ -12,6 +13,7 @@ _EAR_bar:
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#test new-style _EAR_ syms
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#test new-style _EAR_ syms
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.data
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.data
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.p2align 4
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_EAR_main:
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_EAR_main:
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.space 16
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.space 16
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@ -21,5 +23,6 @@ _EAR_foo:
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.space 16
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.space 16
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.section .data.blah,"aw",@progbits
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.section .data.blah,"aw",@progbits
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.p2align 4
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_EAR_blah:
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_EAR_blah:
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.space 16
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.space 16
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@ -1,16 +1,16 @@
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Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries:
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Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries:
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Offset Info Type Sym\. Value Symbol's Name \+ Addend
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Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
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00000184 00000601 R_PPC_ADDR32 00000000 main \+ 0
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0+184 .* R_PPC_ADDR32 +0+0 +main \+ 0
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000001a4 00000901 R_PPC_ADDR32 00000000 foo \+ 0
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0+1a4 .* R_PPC_ADDR32 +0+0 +foo \+ 0
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000001b4 00000701 R_PPC_ADDR32 00000000 blah \+ 0
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0+1b4 .* R_PPC_ADDR32 +0+0 +blah \+ 0
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Relocation section '\.rela\.data' at .* contains 2 entries:
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Offset Info Type Sym\. Value Symbol's Name \+ Addend
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00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0
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00000008 00000401 R_PPC_ADDR32 00000000 \.data\.spetoe \+ 0
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Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries:
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Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries:
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Offset Info Type Sym\. Value Symbol's Name \+ Addend
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Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
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00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0
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0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0
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00000014 00000a01 R_PPC_ADDR32 00000000 bar \+ 0
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0+014 .* R_PPC_ADDR32 +0+0 +bar \+ 0
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Relocation section '\.rela\.data\.spehandle' at .* contains 2 entries:
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Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
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0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0
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0+008 .* R_PPC_ADDR32 +0+0 +\.data\.spetoe \+ 0
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Loading…
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Reference in a new issue