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RISC-V: Fallback for instructions longer than 64b

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We don't support instructions longer than 64-bits yet.  Still, we can
modify validate_riscv_insn function to prevent unexpected behavior by
limiting the "length" of an instruction to 64-bit (or less).

gas/ChangeLog:

	* config/tc-riscv.c (validate_riscv_insn): Fix function
	description comment based on current spec.  Limit instruction
	length up to 64-bit for now.  Make sure that required_bits does
	not corrupt even if unsigned long long is longer than 64-bit.
This commit is contained in:
Tsukasa OI 2022-10-06 04:18:52 +00:00
parent 3190ebcbbf
commit 83029f7ff5
1 changed files with 8 additions and 5 deletions
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13
gas/config/tc-riscv.c
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@ -1194,7 +1194,8 @@ arg_lookup (char **s, const char *const *array, size_t size, unsigned *regnop)
/* For consistency checking, verify that all bits are specified either
by the match/mask part of the instruction definition, or by the
operand list. The `length` could be 0, 4 or 8, 0 for auto detection. */
operand list. The `length` could be the actual instruction length or
0 for auto-detection. */
static bool
validate_riscv_insn (const struct riscv_opcode *opc, int length)
@ -1205,11 +1206,13 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
insn_t required_bits;
if (length == 0)
insn_width = 8 * riscv_insn_length (opc->match);
else
insn_width = 8 * length;
length = riscv_insn_length (opc->match);
/* We don't support instructions longer than 64-bits yet. */
if (length > 8)
length = 8;
insn_width = 8 * length;
required_bits = ~0ULL >> (64 - insn_width);
required_bits = ((insn_t)~0ULL) >> (64 - insn_width);
if ((used_bits & opc->match) != (opc->match & required_bits))
{