binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options. gas/ChangeLog * config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size) to operand->insert. (md_assemble): Likewise. gas/testsuite/ChangeLog * gas/ppc/booke.d: Modify reloc and target matches for powerpc64. include/opcode/ChangeLog * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param. opcodes/ChangeLog * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC. (insert_bat, extract_bat, insert_bba, extract_bba, insert_bd, extract_bd, insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo, insert_bo, extract_bo, insert_boe, extract_boe, insert_ds, extract_ds, insert_de, extract_de, insert_des, extract_des, insert_li, extract_li, insert_mbe, extract_mbe, insert_mb6, extract_mb6, insert_nb, extract_nb, insert_nsi, extract_nsi, insert_ral, insert_ram, insert_ras, insert_rbs, extract_rbs, insert_sh6, extract_sh6, insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param. (extract_bd, extract_bdm, extract_bdp, extract_ds, extract_des, extract_li, extract_nsi): Implement sign extension without conditional. (insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints. (extract_bdm, extract_bdp): Correct 32 bit validation. (AT1_MASK, AT2_MASK): Define. (BBOAT_MASK): Define. (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define. (BOFM64, BOFP64, BOTM64, BOTP64): Define. (BODNZM64, BODNZP64, BODZM64, BODZP64): Define. (PPCCOM32, PPCCOM64): Define. (powerpc_opcodes): Modify existing 32 bit insns with branch hints and add new patterns to implement 64 bit branches with hints. Move booke instructions so they match before ppc64. * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for 64 bit default targets, and parse "32" and "64" in options. Formatting fixes. (print_insn_powerpc): Pass dialect to operand->extract.
This commit is contained in:
parent
025eb37b39
commit
802a735ed9
11 changed files with 895 additions and 556 deletions
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@ -1,3 +1,7 @@
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2001-11-15 Alan Modra <amodra@bigpond.net.au>
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* doc/binutils.texi (objdump): Document ppc -M options.
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2001-11-14 Andreas Jaeger <aj@suse.de>
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2001-11-14 Andreas Jaeger <aj@suse.de>
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* doc/binutils.texi (objdump): Fix description to use x86-64.
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* doc/binutils.texi (objdump): Fix description to use x86-64.
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@ -1582,6 +1582,10 @@ option string. Lastly, @option{suffix}, when in AT&T mode,
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instructs the dissassembler to print a mnemonic suffix even when the
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instructs the dissassembler to print a mnemonic suffix even when the
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suffix could be inferred by the operands.
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suffix could be inferred by the operands.
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For PPC, @option{booke}, @option{booke32} and @option{booke64} select
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disassembly of BookE instructions. @option{32} and @option{64} select
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PowerPC and PowerPC64 disassembly, respectively.
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@item -p
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@item -p
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@itemx --private-headers
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@itemx --private-headers
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Print information that is specific to the object file format. The exact
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Print information that is specific to the object file format. The exact
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@ -1,3 +1,9 @@
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2001-11-15 Alan Modra <amodra@bigpond.net.au>
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* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
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to operand->insert.
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(md_assemble): Likewise.
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2001-11-12 Nick Clifton <nickc@cambridge.redhat.com>
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2001-11-12 Nick Clifton <nickc@cambridge.redhat.com>
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* frags.c (frag_grow): Use frag_make_room() to grow the
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* frags.c (frag_grow): Use frag_make_room() to grow the
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@ -1304,7 +1304,7 @@ ppc_insert_operand (insn, operand, val, file, line)
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const char *errmsg;
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const char *errmsg;
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errmsg = NULL;
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errmsg = NULL;
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insn = (*operand->insert) (insn, (long) val, &errmsg);
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insn = (*operand->insert) (insn, (long) val, ppc_cpu | ppc_size, &errmsg);
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if (errmsg != (const char *) NULL)
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if (errmsg != (const char *) NULL)
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as_bad_where (file, line, errmsg);
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as_bad_where (file, line, errmsg);
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}
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}
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@ -1942,7 +1942,7 @@ md_assemble (str)
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from the input. */
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from the input. */
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if ((operand->flags & PPC_OPERAND_FAKE) != 0)
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if ((operand->flags & PPC_OPERAND_FAKE) != 0)
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{
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{
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insn = (*operand->insert) (insn, 0L, &errmsg);
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insn = (*operand->insert) (insn, 0L, ppc_cpu | ppc_size, &errmsg);
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if (errmsg != (const char *) NULL)
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if (errmsg != (const char *) NULL)
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as_bad (errmsg);
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as_bad (errmsg);
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continue;
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continue;
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@ -1955,7 +1955,7 @@ md_assemble (str)
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{
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{
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if (operand->insert)
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if (operand->insert)
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{
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{
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insn = (*operand->insert) (insn, 0L, &errmsg);
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insn = (*operand->insert) (insn, 0L, ppc_cpu | ppc_size, &errmsg);
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if (errmsg != (const char *) NULL)
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if (errmsg != (const char *) NULL)
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as_bad (errmsg);
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as_bad (errmsg);
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}
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}
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@ -1,3 +1,7 @@
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2001-11-15 Alan Modra <amodra@bigpond.net.au>
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* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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* gas/tic54x/sections.[sd]: Check for named, initialized sections
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* gas/tic54x/sections.[sd]: Check for named, initialized sections
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@ -2,7 +2,7 @@
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#objdump: -Dr -Mbooke
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#objdump: -Dr -Mbooke
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#name: BookE tests
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#name: BookE tests
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.*: +file format elf32-powerpc
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.*: +file format elf(32)?(64)?-powerpc
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Disassembly of section \.text:
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Disassembly of section \.text:
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@ -10,9 +10,9 @@ Disassembly of section \.text:
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0: 24 25 00 30 bce 1,4\*cr1\+gt,30 <branch_target_1>
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0: 24 25 00 30 bce 1,4\*cr1\+gt,30 <branch_target_1>
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4: 24 46 00 3d bcel 2,4\*cr1\+eq,40 <branch_target_2>
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4: 24 46 00 3d bcel 2,4\*cr1\+eq,40 <branch_target_2>
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8: 24 67 00 02 bcea 3,4\*cr1\+so,0 <start>
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8: 24 67 00 02 bcea 3,4\*cr1\+so,0 <start>
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8: R_PPC_ADDR14 branch_target_3
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8: R_PPC(64)?_ADDR14 branch_target_3
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c: 24 88 00 03 bcela 4,4\*cr2,0 <start>
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c: 24 88 00 03 bcela 4,4\*cr2,0 <start>
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c: R_PPC_ADDR14 branch_target_4
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c: R_PPC(64)?_ADDR14 branch_target_4
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10: 4c a9 00 22 bclre 5,4\*cr2\+gt
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10: 4c a9 00 22 bclre 5,4\*cr2\+gt
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14: 4c aa 00 23 bclrel 5,4\*cr2\+eq
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14: 4c aa 00 23 bclrel 5,4\*cr2\+eq
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18: 4d 0b 04 22 bcctre 8,4\*cr2\+so
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18: 4d 0b 04 22 bcctre 8,4\*cr2\+so
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20: 58 00 00 74 be 94 <branch_target_5>
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20: 58 00 00 74 be 94 <branch_target_5>
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24: 58 00 00 89 bel ac <branch_target_6>
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24: 58 00 00 89 bel ac <branch_target_6>
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28: 58 00 00 02 bea 0 <start>
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28: 58 00 00 02 bea 0 <start>
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28: R_PPC_ADDR24 branch_target_7
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28: R_PPC(64)?_ADDR24 branch_target_7
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2c: 58 00 00 03 bela 0 <start>
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2c: 58 00 00 03 bela 0 <start>
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2c: R_PPC_ADDR24 branch_target_8
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2c: R_PPC(64)?_ADDR24 branch_target_8
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0+0000030 <branch_target_1>:
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0+0000030 <branch_target_1>:
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30: e9 09 00 80 lbze r8,8\(r9\)
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30: e9 09 00 80 lbze r8,8\(r9\)
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@ -1,3 +1,7 @@
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2001-11-15 Alan Modra <amodra@bigpond.net.au>
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* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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* tic54x.h: Revise opcode layout; don't really need a separate
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* tic54x.h: Revise opcode layout; don't really need a separate
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operand value is legal, *ERRMSG will be unchanged (most operands
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operand value is legal, *ERRMSG will be unchanged (most operands
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can accept any value). */
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can accept any value). */
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unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
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unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
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int dialect,
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const char **errmsg));
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const char **errmsg));
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/* Extraction function. This is used by the disassembler. To
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/* Extraction function. This is used by the disassembler. To
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non-zero if this operand type can not actually be extracted from
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non-zero if this operand type can not actually be extracted from
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this operand (i.e., the instruction does not match). If the
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this operand (i.e., the instruction does not match). If the
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operand is valid, *INVALID will not be changed. */
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operand is valid, *INVALID will not be changed. */
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long (*extract) PARAMS ((unsigned long instruction, int *invalid));
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long (*extract) PARAMS ((unsigned long instruction, int dialect,
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int *invalid));
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/* One bit syntax flags. */
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/* One bit syntax flags. */
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unsigned long flags;
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unsigned long flags;
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2001-11-15 Alan Modra <amodra@bigpond.net.au>
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* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
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(insert_bat, extract_bat, insert_bba, extract_bba,
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insert_bd, extract_bd, insert_bdm, extract_bdm,
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insert_bdp, extract_bdp, valid_bo,
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insert_bo, extract_bo, insert_boe, extract_boe,
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insert_ds, extract_ds, insert_de, extract_de,
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insert_des, extract_des, insert_li, extract_li,
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insert_mbe, extract_mbe, insert_mb6, extract_mb6,
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insert_nb, extract_nb, insert_nsi, extract_nsi,
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insert_ral, insert_ram, insert_ras,
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insert_rbs, extract_rbs, insert_sh6, extract_sh6,
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insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
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(extract_bd, extract_bdm, extract_bdp,
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extract_ds, extract_des,
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extract_li, extract_nsi): Implement sign extension without conditional.
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(insert_bdm, extract_bdm,
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insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
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(extract_bdm, extract_bdp): Correct 32 bit validation.
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(AT1_MASK, AT2_MASK): Define.
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(BBOAT_MASK): Define.
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(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
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(BOFM64, BOFP64, BOTM64, BOTP64): Define.
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(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
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(PPCCOM32, PPCCOM64): Define.
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(powerpc_opcodes): Modify existing 32 bit insns with branch hints
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and add new patterns to implement 64 bit branches with hints. Move
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booke instructions so they match before ppc64.
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* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
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64 bit default targets, and parse "32" and "64" in options.
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Formatting fixes.
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(print_insn_powerpc): Pass dialect to operand->extract.
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2001-11-14 Dave Brolley <brolley@redhat.com>
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2001-11-14 Dave Brolley <brolley@redhat.com>
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* cgen-dis.c (count_decodable_bits): New function.
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* cgen-dis.c (count_decodable_bits): New function.
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{
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{
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int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
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int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
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if (info->disassembler_options &&
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if (BFD_DEFAULT_TARGET_SIZE == 64)
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(strcmp(info->disassembler_options, "booke") == 0 ||
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dialect |= PPC_OPCODE_64;
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strcmp(info->disassembler_options, "booke32") == 0 ||
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strcmp(info->disassembler_options, "booke64") == 0))
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if (info->disassembler_options
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&& (strcmp (info->disassembler_options, "booke") == 0
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|| strcmp (info->disassembler_options, "booke32") == 0
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|| strcmp (info->disassembler_options, "booke64") == 0))
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dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
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dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
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else
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else
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dialect |= PPC_OPCODE_403 | PPC_OPCODE_601;
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dialect |= PPC_OPCODE_403 | PPC_OPCODE_601;
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if (info->disassembler_options)
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{
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if (strstr (info->disassembler_options, "32") != NULL)
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dialect &= ~PPC_OPCODE_64;
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else if (strstr (info->disassembler_options, "64") != NULL)
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dialect |= PPC_OPCODE_64;
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}
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return dialect;
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return dialect;
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}
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}
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{
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{
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operand = powerpc_operands + *opindex;
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operand = powerpc_operands + *opindex;
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if (operand->extract)
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if (operand->extract)
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(*operand->extract) (insn, &invalid);
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(*operand->extract) (insn, dialect, &invalid);
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}
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}
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if (invalid)
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if (invalid)
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continue;
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continue;
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/* Extract the value from the instruction. */
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/* Extract the value from the instruction. */
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if (operand->extract)
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if (operand->extract)
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value = (*operand->extract) (insn, (int *) NULL);
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value = (*operand->extract) (insn, dialect, (int *) NULL);
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else
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else
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{
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{
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value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
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value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
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1350
opcodes/ppc-opc.c
1350
opcodes/ppc-opc.c
File diff suppressed because it is too large
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