x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
AVX gather insns correctly allow the element size to be specified rather than the full vector size. Make AVX512 ones match.
This commit is contained in:
Jan Beulich
Jan Beulich
parent
7a8655d2bb
commit
6ff00b5e12
13 changed files with 698 additions and 589 deletions
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@ -1,3 +1,14 @@
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2018-07-31 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/sg.s, testsuite/gas/i386/sg.l: New.
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* testsuite/gas/i386/i386.exp: Run new test.
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* testsuite/gas/i386/avx512f.s, testsuite/gas/i386/avx512f_vl.s,
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testsuite/gas/i386/avx512pf.s,
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testsuite/gas/i386/x86-64-avx512f.s,
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testsuite/gas/i386/x86-64-avx512f_vl.s,
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testsuite/gas/i386/x86-64-avx512pf.s: Drop unnessecary operand
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size specifiers from scatter/gather insns in Intel mode.
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2018-07-31 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (is_any_vex_encoding): New.
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@ -11108,25 +11108,25 @@ _start:
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vfnmsub231ss xmm6{k7}, xmm5, DWORD PTR [edx-512] # AVX512F Disp8
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vfnmsub231ss xmm6{k7}, xmm5, DWORD PTR [edx-516] # AVX512F
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vgatherdpd zmm6{k1}, ZMMWORD PTR [ebp+ymm7*8-123] # AVX512F
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vgatherdpd zmm6{k1}, ZMMWORD PTR [ebp+ymm7*8-123] # AVX512F
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vgatherdpd zmm6{k1}, ZMMWORD PTR [eax+ymm7+256] # AVX512F
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vgatherdpd zmm6{k1}, ZMMWORD PTR [ecx+ymm7*4+1024] # AVX512F
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vgatherdpd zmm6{k1}, [ebp+ymm7*8-123] # AVX512F
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vgatherdpd zmm6{k1}, [ebp+ymm7*8-123] # AVX512F
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vgatherdpd zmm6{k1}, [eax+ymm7+256] # AVX512F
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vgatherdpd zmm6{k1}, [ecx+ymm7*4+1024] # AVX512F
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vgatherdps zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherdps zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherdps zmm6{k1}, ZMMWORD PTR [eax+zmm7+256] # AVX512F
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vgatherdps zmm6{k1}, ZMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vgatherdps zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherdps zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherdps zmm6{k1}, [eax+zmm7+256] # AVX512F
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vgatherdps zmm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vgatherqpd zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherqpd zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherqpd zmm6{k1}, ZMMWORD PTR [eax+zmm7+256] # AVX512F
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vgatherqpd zmm6{k1}, ZMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vgatherqpd zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherqpd zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherqpd zmm6{k1}, [eax+zmm7+256] # AVX512F
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vgatherqpd zmm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vgatherqps ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherqps ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vgatherqps ymm6{k1}, YMMWORD PTR [eax+zmm7+256] # AVX512F
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vgatherqps ymm6{k1}, YMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vgatherqps ymm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherqps ymm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vgatherqps ymm6{k1}, [eax+zmm7+256] # AVX512F
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vgatherqps ymm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vgetexppd zmm6, zmm5 # AVX512F
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vgetexppd zmm6{k7}, zmm5 # AVX512F
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@ -12400,25 +12400,25 @@ _start:
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vpexpandq zmm6{k7}, zmm5 # AVX512F
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vpexpandq zmm6{k7}{z}, zmm5 # AVX512F
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vpgatherdd zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherdd zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherdd zmm6{k1}, ZMMWORD PTR [eax+zmm7+256] # AVX512F
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vpgatherdd zmm6{k1}, ZMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vpgatherdd zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherdd zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherdd zmm6{k1}, [eax+zmm7+256] # AVX512F
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vpgatherdd zmm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vpgatherdq zmm6{k1}, ZMMWORD PTR [ebp+ymm7*8-123] # AVX512F
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vpgatherdq zmm6{k1}, ZMMWORD PTR [ebp+ymm7*8-123] # AVX512F
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vpgatherdq zmm6{k1}, ZMMWORD PTR [eax+ymm7+256] # AVX512F
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vpgatherdq zmm6{k1}, ZMMWORD PTR [ecx+ymm7*4+1024] # AVX512F
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vpgatherdq zmm6{k1}, [ebp+ymm7*8-123] # AVX512F
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vpgatherdq zmm6{k1}, [ebp+ymm7*8-123] # AVX512F
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vpgatherdq zmm6{k1}, [eax+ymm7+256] # AVX512F
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vpgatherdq zmm6{k1}, [ecx+ymm7*4+1024] # AVX512F
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vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherqd ymm6{k1}, YMMWORD PTR [eax+zmm7+256] # AVX512F
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vpgatherqd ymm6{k1}, YMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vpgatherqd ymm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherqd ymm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherqd ymm6{k1}, [eax+zmm7+256] # AVX512F
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vpgatherqd ymm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vpgatherqq zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherqq zmm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] # AVX512F
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vpgatherqq zmm6{k1}, ZMMWORD PTR [eax+zmm7+256] # AVX512F
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vpgatherqq zmm6{k1}, ZMMWORD PTR [ecx+zmm7*4+1024] # AVX512F
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vpgatherqq zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherqq zmm6{k1}, [ebp+zmm7*8-123] # AVX512F
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vpgatherqq zmm6{k1}, [eax+zmm7+256] # AVX512F
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vpgatherqq zmm6{k1}, [ecx+zmm7*4+1024] # AVX512F
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vpmaxsd zmm6, zmm5, zmm4 # AVX512F
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vpmaxsd zmm6{k7}, zmm5, zmm4 # AVX512F
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@ -12705,25 +12705,25 @@ _start:
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vporq zmm6, zmm5, [edx-1024]{1to8} # AVX512F Disp8
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vporq zmm6, zmm5, [edx-1032]{1to8} # AVX512F
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vpscatterdd ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdd ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdd ZMMWORD PTR [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vpscatterdd ZMMWORD PTR [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vpscatterdd [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdd [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdd [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vpscatterdd [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vpscatterdq ZMMWORD PTR [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdq ZMMWORD PTR [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdq ZMMWORD PTR [eax+ymm7+256]{k1}, zmm6 # AVX512F
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vpscatterdq ZMMWORD PTR [ecx+ymm7*4+1024]{k1}, zmm6 # AVX512F
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vpscatterdq [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdq [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterdq [eax+ymm7+256]{k1}, zmm6 # AVX512F
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vpscatterdq [ecx+ymm7*4+1024]{k1}, zmm6 # AVX512F
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vpscatterqd YMMWORD PTR [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vpscatterqd YMMWORD PTR [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vpscatterqd YMMWORD PTR [eax+zmm7+256]{k1}, ymm6 # AVX512F
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vpscatterqd YMMWORD PTR [ecx+zmm7*4+1024]{k1}, ymm6 # AVX512F
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vpscatterqd [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vpscatterqd [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vpscatterqd [eax+zmm7+256]{k1}, ymm6 # AVX512F
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vpscatterqd [ecx+zmm7*4+1024]{k1}, ymm6 # AVX512F
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vpscatterqq ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterqq ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterqq ZMMWORD PTR [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vpscatterqq ZMMWORD PTR [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vpscatterqq [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterqq [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vpscatterqq [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vpscatterqq [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vpshufd zmm6, zmm5, 0xab # AVX512F
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vpshufd zmm6{k7}, zmm5, 0xab # AVX512F
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@ -13161,25 +13161,25 @@ _start:
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vrsqrt14ss xmm6{k7}, xmm5, DWORD PTR [edx-512] # AVX512F Disp8
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vrsqrt14ss xmm6{k7}, xmm5, DWORD PTR [edx-516] # AVX512F
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vscatterdpd ZMMWORD PTR [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdpd ZMMWORD PTR [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdpd ZMMWORD PTR [eax+ymm7+256]{k1}, zmm6 # AVX512F
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vscatterdpd ZMMWORD PTR [ecx+ymm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterdpd [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdpd [ebp+ymm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdpd [eax+ymm7+256]{k1}, zmm6 # AVX512F
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vscatterdpd [ecx+ymm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterdps ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdps ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdps ZMMWORD PTR [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vscatterdps ZMMWORD PTR [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterdps [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdps [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterdps [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vscatterdps [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterqpd ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterqpd ZMMWORD PTR [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterqpd ZMMWORD PTR [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vscatterqpd ZMMWORD PTR [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterqpd [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterqpd [ebp+zmm7*8-123]{k1}, zmm6 # AVX512F
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vscatterqpd [eax+zmm7+256]{k1}, zmm6 # AVX512F
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vscatterqpd [ecx+zmm7*4+1024]{k1}, zmm6 # AVX512F
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vscatterqps YMMWORD PTR [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vscatterqps YMMWORD PTR [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vscatterqps YMMWORD PTR [eax+zmm7+256]{k1}, ymm6 # AVX512F
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vscatterqps YMMWORD PTR [ecx+zmm7*4+1024]{k1}, ymm6 # AVX512F
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vscatterqps [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vscatterqps [ebp+zmm7*8-123]{k1}, ymm6 # AVX512F
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vscatterqps [eax+zmm7+256]{k1}, ymm6 # AVX512F
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vscatterqps [ecx+zmm7*4+1024]{k1}, ymm6 # AVX512F
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vshufpd zmm6, zmm5, zmm4, 0xab # AVX512F
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vshufpd zmm6{k7}, zmm5, zmm4, 0xab # AVX512F
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@ -7321,30 +7321,30 @@ _start:
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vfnmsub231ps ymm6{k7}, ymm5, [edx+512]{1to8} # AVX512{F,VL}
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vfnmsub231ps ymm6{k7}, ymm5, [edx-512]{1to8} # AVX512{F,VL} Disp8
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vfnmsub231ps ymm6{k7}, ymm5, [edx-516]{1to8} # AVX512{F,VL}
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vgatherdpd xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdpd xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
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vgatherdpd xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, YMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, YMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, YMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdps xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdps xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
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vgatherdps xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdps ymm6{k1}, YMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
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vgatherdps ymm6{k1}, YMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
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vgatherdps ymm6{k1}, YMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherqpd ymm6{k1}, YMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
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vgatherqpd ymm6{k1}, YMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
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vgatherqpd ymm6{k1}, YMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
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vgatherqps xmm6{k1}, QWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherqps xmm6{k1}, QWORD PTR [eax+xmm7+256] # AVX512{F,VL}
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vgatherqps xmm6{k1}, QWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherqps xmm6{k1}, XMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
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vgatherqps xmm6{k1}, XMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
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vgatherqps xmm6{k1}, XMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
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vgatherdpd xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdpd xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
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vgatherdpd xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
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vgatherdpd ymm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdps xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherdps xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
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vgatherdps xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherdps ymm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
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vgatherdps ymm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
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vgatherdps ymm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
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vgatherqpd xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
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vgatherqpd ymm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
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vgatherqpd ymm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
|
||||
vgatherqpd ymm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
|
||||
vgatherqps xmm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vgetexppd xmm6{k7}, xmm5 # AVX512{F,VL}
|
||||
vgetexppd xmm6{k7}{z}, xmm5 # AVX512{F,VL}
|
||||
vgetexppd xmm6{k7}, XMMWORD PTR [ecx] # AVX512{F,VL}
|
||||
|
|
@ -8519,30 +8519,30 @@ _start:
|
|||
vpexpandq xmm6{k7}{z}, xmm5 # AVX512{F,VL}
|
||||
vpexpandq ymm6{k7}, ymm5 # AVX512{F,VL}
|
||||
vpexpandq ymm6{k7}{z}, ymm5 # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, YMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, YMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, YMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, YMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, YMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, YMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, QWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, QWORD PTR [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, QWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, XMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, XMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, XMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, XMMWORD PTR [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, XMMWORD PTR [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, XMMWORD PTR [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, YMMWORD PTR [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, YMMWORD PTR [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, YMMWORD PTR [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdd xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherdd ymm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdq xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherdq ymm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, [ebp+xmm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, [eax+xmm7+256] # AVX512{F,VL}
|
||||
vpgatherqq xmm6{k1}, [ecx+xmm7*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, [ebp+ymm7*8-123] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, [eax+ymm7+256] # AVX512{F,VL}
|
||||
vpgatherqq ymm6{k1}, [ecx+ymm7*4+1024] # AVX512{F,VL}
|
||||
vpmaxsd xmm6{k7}, xmm5, xmm4 # AVX512{F,VL}
|
||||
vpmaxsd xmm6{k7}{z}, xmm5, xmm4 # AVX512{F,VL}
|
||||
vpmaxsd xmm6{k7}, xmm5, XMMWORD PTR [ecx] # AVX512{F,VL}
|
||||
|
|
@ -9041,30 +9041,30 @@ _start:
|
|||
vporq ymm6{k7}, ymm5, [edx+1024]{1to4} # AVX512{F,VL}
|
||||
vporq ymm6{k7}, ymm5, [edx-1024]{1to4} # AVX512{F,VL} Disp8
|
||||
vporq ymm6{k7}, ymm5, [edx-1032]{1to4} # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [ebp+xmm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [eax+xmm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [ecx+xmm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [ebp+ymm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [eax+ymm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [ecx+ymm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdd [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdd [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdd [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdd [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterdq [ebp+xmm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq [eax+xmm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterdq [ecx+xmm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqd [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd [ebp+ymm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd [eax+ymm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqd [ecx+ymm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vpscatterqq [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqq [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpscatterqq [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vpshufd xmm6{k7}, xmm5, 0xab # AVX512{F,VL}
|
||||
vpshufd xmm6{k7}{z}, xmm5, 0xab # AVX512{F,VL}
|
||||
vpshufd xmm6{k7}, xmm5, 123 # AVX512{F,VL}
|
||||
|
|
@ -9761,30 +9761,30 @@ _start:
|
|||
vrsqrt14ps ymm6{k7}, [edx+512]{1to8} # AVX512{F,VL}
|
||||
vrsqrt14ps ymm6{k7}, [edx-512]{1to8} # AVX512{F,VL} Disp8
|
||||
vrsqrt14ps ymm6{k7}, [edx-516]{1to8} # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [ebp+xmm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [eax+xmm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [ecx+xmm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [ebp+ymm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [eax+ymm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [ecx+ymm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdpd [ebp+xmm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdpd [eax+xmm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdpd [ecx+xmm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterdps [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterdps [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqpd [ebp+ymm7*8-123]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd [eax+ymm7+256]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqpd [ecx+ymm7*4+1024]{k1}, ymm6 # AVX512{F,VL}
|
||||
vscatterqps [ebp+xmm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps [eax+xmm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps [ecx+xmm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps [ebp+ymm7*8-123]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps [eax+ymm7+256]{k1}, xmm6 # AVX512{F,VL}
|
||||
vscatterqps [ecx+ymm7*4+1024]{k1}, xmm6 # AVX512{F,VL}
|
||||
vshufpd xmm6{k7}, xmm5, xmm4, 0xab # AVX512{F,VL}
|
||||
vshufpd xmm6{k7}{z}, xmm5, xmm4, 0xab # AVX512{F,VL}
|
||||
vshufpd xmm6{k7}, xmm5, xmm4, 123 # AVX512{F,VL}
|
||||
|
|
|
|||
|
|
@ -85,83 +85,83 @@ _start:
|
|||
vscatterpf1qps 1024(%ecx,%zmm7,4){%k1} # AVX512PF
|
||||
|
||||
.intel_syntax noprefix
|
||||
vgatherpf0dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [eax+ymm7+256]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd [eax+ymm7+256]{k1} # AVX512PF
|
||||
vgatherpf0dpd [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0dps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0qpd [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf0qps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [eax+ymm7+256]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd [eax+ymm7+256]{k1} # AVX512PF
|
||||
vgatherpf1dpd [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1dps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1qpd [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vgatherpf1qps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [eax+ymm7+256]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd [eax+ymm7+256]{k1} # AVX512PF
|
||||
vscatterpf0dpd [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0dps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0qpd [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf0qps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [eax+ymm7+256]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd [ebp+ymm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd [eax+ymm7+256]{k1} # AVX512PF
|
||||
vscatterpf1dpd [ecx+ymm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1dps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1qpd [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps [ebp+zmm7*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps [eax+zmm7+256]{k1} # AVX512PF
|
||||
vscatterpf1qps [ecx+zmm7*4+1024]{k1} # AVX512PF
|
||||
|
||||
|
|
|
|||
|
|
@ -411,6 +411,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
|
|||
run_dump_test "avx512bitalg-intel"
|
||||
run_dump_test "avx512bitalg_vl"
|
||||
run_dump_test "avx512bitalg_vl-intel"
|
||||
run_list_test "sg"
|
||||
run_dump_test "clzero"
|
||||
run_dump_test "disassem"
|
||||
run_dump_test "mwaitx-bdver4"
|
||||
|
|
|
|||
25
gas/testsuite/gas/i386/sg.l
Normal file
25
gas/testsuite/gas/i386/sg.l
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
.*: Assembler messages:
|
||||
.*:8: Error: operand size .* `vgatherdpd'
|
||||
.*:9: Error: operand size .* `vgatherdpd'
|
||||
.*:10: Error: operand size .* `vscatterdpd'
|
||||
.*:16: Error: operand size .* `vgatherdps'
|
||||
.*:17: Error: operand size .* `vgatherdps'
|
||||
.*:18: Error: operand size .* `vscatterdps'
|
||||
.*:24: Error: operand size .* `vgatherqpd'
|
||||
.*:25: Error: operand size .* `vgatherqpd'
|
||||
.*:26: Error: operand size .* `vscatterqpd'
|
||||
.*:32: Error: operand size .* `vgatherqps'
|
||||
.*:33: Error: operand size .* `vgatherqps'
|
||||
.*:34: Error: operand size .* `vscatterqps'
|
||||
.*:40: Error: operand size .* `vpgatherdd'
|
||||
.*:41: Error: operand size .* `vpgatherdd'
|
||||
.*:42: Error: operand size .* `vpscatterdd'
|
||||
.*:48: Error: operand size .* `vpgatherdq'
|
||||
.*:49: Error: operand size .* `vpgatherdq'
|
||||
.*:50: Error: operand size .* `vpscatterdq'
|
||||
.*:56: Error: operand size .* `vpgatherqd'
|
||||
.*:57: Error: operand size .* `vpgatherqd'
|
||||
.*:58: Error: operand size .* `vpscatterqd'
|
||||
.*:64: Error: operand size .* `vpgatherqq'
|
||||
.*:65: Error: operand size .* `vpgatherqq'
|
||||
.*:66: Error: operand size .* `vpscatterqq'
|
||||
66
gas/testsuite/gas/i386/sg.s
Normal file
66
gas/testsuite/gas/i386/sg.s
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
.text
|
||||
.intel_syntax noprefix
|
||||
sg:
|
||||
vgatherdpd xmm2, qword ptr [eax+xmm1], xmm0
|
||||
vgatherdpd xmm2{k7}, qword ptr [eax+xmm1]
|
||||
vscatterdpd qword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherdpd xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vgatherdpd xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vscatterdpd xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherdps xmm2, dword ptr [eax+xmm1], xmm0
|
||||
vgatherdps xmm2{k7}, dword ptr [eax+xmm1]
|
||||
vscatterdps dword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherdps xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vgatherdps xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vscatterdps xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherqpd xmm2, qword ptr [eax+xmm1], xmm0
|
||||
vgatherqpd xmm2{k7}, qword ptr [eax+xmm1]
|
||||
vscatterqpd qword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherqpd xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vgatherqpd xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vscatterqpd xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherqps xmm2, dword ptr [eax+xmm1], xmm0
|
||||
vgatherqps xmm2{k7}, dword ptr [eax+xmm1]
|
||||
vscatterqps dword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vgatherqps xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vgatherqps xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vscatterqps xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherdd xmm2, dword ptr [eax+xmm1], xmm0
|
||||
vpgatherdd xmm2{k7}, dword ptr [eax+xmm1]
|
||||
vpscatterdd dword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherdd xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vpgatherdd xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vpscatterdd xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherdq xmm2, qword ptr [eax+xmm1], xmm0
|
||||
vpgatherdq xmm2{k7}, qword ptr [eax+xmm1]
|
||||
vpscatterdq qword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherdq xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vpgatherdq xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vpscatterdq xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherqd xmm2, dword ptr [eax+xmm1], xmm0
|
||||
vpgatherqd xmm2{k7}, dword ptr [eax+xmm1]
|
||||
vpscatterqd dword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherqd xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vpgatherqd xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vpscatterqd xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherqq xmm2, qword ptr [eax+xmm1], xmm0
|
||||
vpgatherqq xmm2{k7}, qword ptr [eax+xmm1]
|
||||
vpscatterqq qword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
||||
vpgatherqq xmm2, xmmword ptr [eax+xmm1], xmm0
|
||||
vpgatherqq xmm2{k7}, xmmword ptr [eax+xmm1]
|
||||
vpscatterqq xmmword ptr [eax+xmm1]{k7}, xmm0
|
||||
|
|
@ -11617,26 +11617,26 @@ _start:
|
|||
vfnmsub231ss xmm30{k7}, xmm29, DWORD PTR [rdx-512] # AVX512F Disp8
|
||||
vfnmsub231ss xmm30{k7}, xmm29, DWORD PTR [rdx-516] # AVX512F
|
||||
|
||||
vgatherdpd zmm30{k1}, ZMMWORD PTR [r14+ymm31*8-123] # AVX512F
|
||||
vgatherdpd zmm30{k1}, ZMMWORD PTR [r14+ymm31*8-123] # AVX512F
|
||||
vgatherdpd zmm30{k1}, ZMMWORD PTR [r9+ymm31+256] # AVX512F
|
||||
vgatherdpd zmm30{k1}, ZMMWORD PTR [rcx+ymm31*4+1024] # AVX512F
|
||||
vgatherdpd zmm30{k1}, [r14+ymm31*8-123] # AVX512F
|
||||
vgatherdpd zmm30{k1}, [r14+ymm31*8-123] # AVX512F
|
||||
vgatherdpd zmm30{k1}, [r9+ymm31+256] # AVX512F
|
||||
vgatherdpd zmm30{k1}, [rcx+ymm31*4+1024] # AVX512F
|
||||
|
||||
vgatherdps zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherdps zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherdps zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vgatherdps zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vgatherdps zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherdps zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherdps zmm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vgatherdps zmm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
|
||||
vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqpd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vgatherqpd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vgatherqpd zmm3{k1}, ZMMWORD PTR [r14+zmm19*8+123] # AVX512F
|
||||
vgatherqpd zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqpd zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqpd zmm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vgatherqpd zmm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
vgatherqpd zmm3{k1}, [r14+zmm19*8+123] # AVX512F
|
||||
|
||||
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqps ymm30{k1}, YMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vgatherqps ymm30{k1}, YMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vgatherqps ymm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqps ymm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vgatherqps ymm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vgatherqps ymm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
|
||||
vgetexppd zmm30, zmm29 # AVX512F
|
||||
vgetexppd zmm30{k7}, zmm29 # AVX512F
|
||||
|
|
@ -13020,25 +13020,25 @@ _start:
|
|||
vpexpandq zmm30{k7}, zmm29 # AVX512F
|
||||
vpexpandq zmm30{k7}{z}, zmm29 # AVX512F
|
||||
|
||||
vpgatherdd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherdd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherdd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vpgatherdd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vpgatherdd zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherdd zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherdd zmm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vpgatherdd zmm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
|
||||
vpgatherdq zmm30{k1}, ZMMWORD PTR [r14+ymm31*8-123] # AVX512F
|
||||
vpgatherdq zmm30{k1}, ZMMWORD PTR [r14+ymm31*8-123] # AVX512F
|
||||
vpgatherdq zmm30{k1}, ZMMWORD PTR [r9+ymm31+256] # AVX512F
|
||||
vpgatherdq zmm30{k1}, ZMMWORD PTR [rcx+ymm31*4+1024] # AVX512F
|
||||
vpgatherdq zmm30{k1}, [r14+ymm31*8-123] # AVX512F
|
||||
vpgatherdq zmm30{k1}, [r14+ymm31*8-123] # AVX512F
|
||||
vpgatherdq zmm30{k1}, [r9+ymm31+256] # AVX512F
|
||||
vpgatherdq zmm30{k1}, [rcx+ymm31*4+1024] # AVX512F
|
||||
|
||||
vpgatherqd ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqd ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqd ymm30{k1}, YMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vpgatherqd ymm30{k1}, YMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vpgatherqd ymm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqd ymm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqd ymm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vpgatherqd ymm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
|
||||
vpgatherqq zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqq zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqq zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F
|
||||
vpgatherqq zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F
|
||||
vpgatherqq zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqq zmm30{k1}, [r14+zmm31*8-123] # AVX512F
|
||||
vpgatherqq zmm30{k1}, [r9+zmm31+256] # AVX512F
|
||||
vpgatherqq zmm30{k1}, [rcx+zmm31*4+1024] # AVX512F
|
||||
|
||||
vpmaxsd zmm30, zmm29, zmm28 # AVX512F
|
||||
vpmaxsd zmm30{k7}, zmm29, zmm28 # AVX512F
|
||||
|
|
@ -13325,25 +13325,25 @@ _start:
|
|||
vporq zmm30, zmm29, [rdx-1024]{1to8} # AVX512F Disp8
|
||||
vporq zmm30, zmm29, [rdx-1032]{1to8} # AVX512F
|
||||
|
||||
vpscatterdd ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd ZMMWORD PTR [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd ZMMWORD PTR [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterdd [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vpscatterdq ZMMWORD PTR [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq ZMMWORD PTR [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq ZMMWORD PTR [r9+ymm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq ZMMWORD PTR [rcx+ymm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq [r9+ymm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterdq [rcx+ymm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vpscatterqd YMMWORD PTR [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd YMMWORD PTR [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd YMMWORD PTR [r9+zmm31+256]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd YMMWORD PTR [rcx+zmm31*4+1024]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd [r9+zmm31+256]{k1}, ymm30 # AVX512F
|
||||
vpscatterqd [rcx+zmm31*4+1024]{k1}, ymm30 # AVX512F
|
||||
|
||||
vpscatterqq ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq ZMMWORD PTR [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq ZMMWORD PTR [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vpscatterqq [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vpshufd zmm30, zmm29, 0xab # AVX512F
|
||||
vpshufd zmm30{k7}, zmm29, 0xab # AVX512F
|
||||
|
|
@ -13781,25 +13781,25 @@ _start:
|
|||
vrsqrt14ss xmm30{k7}, xmm29, DWORD PTR [rdx-512] # AVX512F Disp8
|
||||
vrsqrt14ss xmm30{k7}, xmm29, DWORD PTR [rdx-516] # AVX512F
|
||||
|
||||
vscatterdpd ZMMWORD PTR [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd ZMMWORD PTR [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd ZMMWORD PTR [r9+ymm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd ZMMWORD PTR [rcx+ymm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd [r14+ymm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd [r9+ymm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterdpd [rcx+ymm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vscatterdps ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdps ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdps ZMMWORD PTR [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterdps ZMMWORD PTR [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vscatterdps [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdps [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterdps [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterdps [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vscatterqpd ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd ZMMWORD PTR [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd ZMMWORD PTR [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd ZMMWORD PTR [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd [r14+zmm31*8-123]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd [r9+zmm31+256]{k1}, zmm30 # AVX512F
|
||||
vscatterqpd [rcx+zmm31*4+1024]{k1}, zmm30 # AVX512F
|
||||
|
||||
vscatterqps YMMWORD PTR [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vscatterqps YMMWORD PTR [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vscatterqps YMMWORD PTR [r9+zmm31+256]{k1}, ymm30 # AVX512F
|
||||
vscatterqps YMMWORD PTR [rcx+zmm31*4+1024]{k1}, ymm30 # AVX512F
|
||||
vscatterqps [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vscatterqps [r14+zmm31*8-123]{k1}, ymm30 # AVX512F
|
||||
vscatterqps [r9+zmm31+256]{k1}, ymm30 # AVX512F
|
||||
vscatterqps [rcx+zmm31*4+1024]{k1}, ymm30 # AVX512F
|
||||
|
||||
vshufpd zmm30, zmm29, zmm28, 0xab # AVX512F
|
||||
vshufpd zmm30{k7}, zmm29, zmm28, 0xab # AVX512F
|
||||
|
|
|
|||
|
|
@ -8077,30 +8077,30 @@ _start:
|
|||
vfnmsub231ps ymm30, ymm29, [rdx+512]{1to8} # AVX512{F,VL}
|
||||
vfnmsub231ps ymm30, ymm29, [rdx-512]{1to8} # AVX512{F,VL} Disp8
|
||||
vfnmsub231ps ymm30, ymm29, [rdx-516]{1to8} # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, YMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, YMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, YMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, YMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, YMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, YMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, YMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, YMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, YMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, QWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, QWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, QWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, XMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, XMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, XMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdpd xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdpd ymm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherdps xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherdps ymm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherqpd xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherqpd ymm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vgatherqps xmm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vgetexppd xmm30, xmm29 # AVX512{F,VL}
|
||||
vgetexppd xmm30{k7}, xmm29 # AVX512{F,VL}
|
||||
vgetexppd xmm30{k7}{z}, xmm29 # AVX512{F,VL}
|
||||
|
|
@ -9447,30 +9447,30 @@ _start:
|
|||
vpexpandq ymm30, ymm29 # AVX512{F,VL}
|
||||
vpexpandq ymm30{k7}, ymm29 # AVX512{F,VL}
|
||||
vpexpandq ymm30{k7}{z}, ymm29 # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, YMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, YMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, YMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, YMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, YMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, YMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, QWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, QWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, QWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, XMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, XMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, XMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, XMMWORD PTR [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, XMMWORD PTR [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, XMMWORD PTR [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, YMMWORD PTR [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, YMMWORD PTR [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, YMMWORD PTR [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdd xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherdd ymm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdq xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherdq ymm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherqd xmm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, [r14+xmm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, [r9+xmm31+256] # AVX512{F,VL}
|
||||
vpgatherqq xmm30{k1}, [rcx+xmm31*4+1024] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, [r14+ymm31*8-123] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, [r9+ymm31+256] # AVX512{F,VL}
|
||||
vpgatherqq ymm30{k1}, [rcx+ymm31*4+1024] # AVX512{F,VL}
|
||||
vpmaxsd xmm30, xmm29, xmm28 # AVX512{F,VL}
|
||||
vpmaxsd xmm30{k7}, xmm29, xmm28 # AVX512{F,VL}
|
||||
vpmaxsd xmm30{k7}{z}, xmm29, xmm28 # AVX512{F,VL}
|
||||
|
|
@ -10015,38 +10015,38 @@ _start:
|
|||
vporq ymm30, ymm29, [rdx+1024]{1to4} # AVX512{F,VL}
|
||||
vporq ymm30, ymm29, [rdx-1024]{1to4} # AVX512{F,VL} Disp8
|
||||
vporq ymm30, ymm29, [rdx-1032]{1to4} # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd YMMWORD PTR [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [r9+xmm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq YMMWORD PTR [rcx+xmm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd QWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [r9+ymm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd XMMWORD PTR [rcx+ymm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq YMMWORD PTR [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdd [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdd [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterdq [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq [r9+xmm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterdq [rcx+xmm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [r9+ymm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqd [rcx+ymm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vpscatterqq [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpscatterqq [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vpshufd xmm30, xmm29, 0xab # AVX512{F,VL}
|
||||
vpshufd xmm30{k7}, xmm29, 0xab # AVX512{F,VL}
|
||||
vpshufd xmm30{k7}{z}, xmm29, 0xab # AVX512{F,VL}
|
||||
|
|
@ -10801,38 +10801,38 @@ _start:
|
|||
vrsqrt14ps ymm30, [rdx+512]{1to8} # AVX512{F,VL}
|
||||
vrsqrt14ps ymm30, [rdx-512]{1to8} # AVX512{F,VL} Disp8
|
||||
vrsqrt14ps ymm30, [rdx-516]{1to8} # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [r9+xmm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd YMMWORD PTR [rcx+xmm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps YMMWORD PTR [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd XMMWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd YMMWORD PTR [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps QWORD PTR [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [r9+ymm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps XMMWORD PTR [rcx+ymm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdpd [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd [r14+xmm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd [r9+xmm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdpd [rcx+xmm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterdps [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterdps [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqpd [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd [r14+ymm31*8-123]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd [r9+ymm31+256]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqpd [rcx+ymm31*4+1024]{k1}, ymm30 # AVX512{F,VL}
|
||||
vscatterqps [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [r14+xmm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [r9+xmm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [rcx+xmm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [r14+ymm31*8-123]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [r9+ymm31+256]{k1}, xmm30 # AVX512{F,VL}
|
||||
vscatterqps [rcx+ymm31*4+1024]{k1}, xmm30 # AVX512{F,VL}
|
||||
vshufpd xmm30, xmm29, xmm28, 0xab # AVX512{F,VL}
|
||||
vshufpd xmm30{k7}, xmm29, xmm28, 0xab # AVX512{F,VL}
|
||||
vshufpd xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{F,VL}
|
||||
|
|
|
|||
|
|
@ -85,83 +85,83 @@ _start:
|
|||
vscatterpf1qps 1024(%rcx,%zmm31,4){%k1} # AVX512PF
|
||||
|
||||
.intel_syntax noprefix
|
||||
vgatherpf0dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [r9+ymm31+256]{k1} # AVX512PF
|
||||
vgatherpf0dpd ZMMWORD PTR [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dpd [r9+ymm31+256]{k1} # AVX512PF
|
||||
vgatherpf0dpd [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0dps ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0dps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0dps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0qpd ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qpd [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0qpd [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf0qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0qps YMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf0qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf0qps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf0qps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [r9+ymm31+256]{k1} # AVX512PF
|
||||
vgatherpf1dpd ZMMWORD PTR [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dpd [r9+ymm31+256]{k1} # AVX512PF
|
||||
vgatherpf1dpd [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1dps ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1dps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1dps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1qpd ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qpd [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1qpd [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vgatherpf1qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1qps YMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vgatherpf1qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vgatherpf1qps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vgatherpf1qps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [r9+ymm31+256]{k1} # AVX512PF
|
||||
vscatterpf0dpd ZMMWORD PTR [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dpd [r9+ymm31+256]{k1} # AVX512PF
|
||||
vscatterpf0dpd [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0dps ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0dps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0dps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0qpd ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qpd [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0qpd [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf0qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0qps YMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf0qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf0qps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf0qps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [r9+ymm31+256]{k1} # AVX512PF
|
||||
vscatterpf1dpd ZMMWORD PTR [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd [r14+ymm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dpd [r9+ymm31+256]{k1} # AVX512PF
|
||||
vscatterpf1dpd [rcx+ymm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1dps ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1dps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1dps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1qpd ZMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qpd [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1qpd [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
vscatterpf1qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1qps YMMWORD PTR [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
vscatterpf1qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps [r14+zmm31*8-123]{k1} # AVX512PF
|
||||
vscatterpf1qps [r9+zmm31+256]{k1} # AVX512PF
|
||||
vscatterpf1qps [rcx+zmm31*4+1024]{k1} # AVX512PF
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2018-07-31 Jan Beulich <jbeulich@suse.com>
|
||||
|
||||
* i386-opc.tbl: Use element rather than vector size for AVX512*
|
||||
scatter/gather insns.
|
||||
* i386-tbl.h: Re-generate.
|
||||
|
||||
2018-07-31 Jan Beulich <jbeulich@suse.com>
|
||||
|
||||
* i386-gen.c (cpu_flag_init): Drop CpuVREX uses.
|
||||
|
|
|
|||
|
|
@ -3403,17 +3403,17 @@ vcompresspd, 2, 0x668A, None, 1, CpuAVX512F, Modrm|Masking=2|VexOpcode=1|VexW=2|
|
|||
vcompresspd, 2, 0x668A, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=1|VexW=2|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM|RegMem }
|
||||
vpcompressq, 2, 0x668B, None, 1, CpuAVX512F, Modrm|Masking=2|VexOpcode=1|VexW=2|Disp8MemShift=3|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, XMMword|YMMword|ZMMword|Unspecified|BaseIndex }
|
||||
vpcompressq, 2, 0x668B, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=1|VexW=2|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM|RegMem }
|
||||
vpscatterdq, 2, 0x66A0, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vscatterdpd, 2, 0x66A2, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vpscatterdq, 2, 0x66A0, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterdpd, 2, 0x66A2, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
|
||||
vcompressps, 2, 0x668A, None, 1, CpuAVX512F, Modrm|Masking=2|VexOpcode=1|VexW=1|Disp8MemShift=2|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, XMMword|YMMword|ZMMword|Unspecified|BaseIndex }
|
||||
vcompressps, 2, 0x668A, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM|RegMem }
|
||||
vpcompressd, 2, 0x668B, None, 1, CpuAVX512F, Modrm|Masking=2|VexOpcode=1|VexW=1|Disp8MemShift=2|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, XMMword|YMMword|ZMMword|Unspecified|BaseIndex }
|
||||
vpcompressd, 2, 0x668B, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=1|VexW=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM|RegMem }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, ZMMword|Unspecified|BaseIndex }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM, Dword|Unspecified|BaseIndex }
|
||||
|
||||
vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vcvtudq2pd, 2, 0xF37A, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=5|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|Dword|YMMword|Unspecified|BaseIndex, RegZMM }
|
||||
|
|
@ -3675,17 +3675,17 @@ vfnmsub231ss, 4, 0x66BF, None, 1, CpuAVX512F, Modrm|EVex=4|Masking=3|VexOpcode=1
|
|||
vscalefss, 3, 0x662D, None, 1, CpuAVX512F, Modrm|EVex=4|Masking=3|VexOpcode=1|VexVVVV=1|VexW=1|Disp8MemShift=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM }
|
||||
vscalefss, 4, 0x662D, None, 1, CpuAVX512F, Modrm|EVex=4|Masking=3|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|StaticRounding|SAE, { Imm8, RegXMM, RegXMM, RegXMM }
|
||||
|
||||
vgatherdpd, 2, 0x6692, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vpgatherdq, 2, 0x6690, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vgatherdpd, 2, 0x6692, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegZMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegZMM }
|
||||
vpgatherdq, 2, 0x6690, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegZMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegZMM }
|
||||
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegZMM }
|
||||
vmovntdqa, 2, 0x662A, None, 1, CpuAVX512F, Modrm|VexOpcode=1|VexW=1|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|YMMword|ZMMword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex, RegZMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegZMM }
|
||||
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegYMM }
|
||||
|
||||
vgetexppd, 2, 0x6642, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=1|VexW=2|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
vgetexppd, 3, 0x6642, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=3|VexOpcode=1|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, RegZMM, RegZMM }
|
||||
|
|
@ -3953,8 +3953,8 @@ vprord, 3, 0x6672, 0, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=0|VexVVVV=2|VexW=
|
|||
vprolq, 3, 0x6672, 1, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=0|VexVVVV=2|VexW=2|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
vprorq, 3, 0x6672, 0, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=0|VexVVVV=2|VexW=2|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Dword|Unspecified|BaseIndex }
|
||||
|
||||
vpshufd, 3, 0x6670, None, 1, CpuAVX512F, Modrm|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
|
||||
|
|
@ -4041,23 +4041,23 @@ vrsqrt28ss, 4, 0x66CD, None, 1, CpuAVX512ER, Modrm|EVex=4|Masking=3|VexOpcode=1|
|
|||
|
||||
// AVX512PF instructions.
|
||||
|
||||
vgatherpf0dpd, 1, 0x66C6, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf0qpd, 1, 0x66C7, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf1dpd, 1, 0x66C6, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf1qpd, 1, 0x66C7, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf0dpd, 1, 0x66C6, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf0qpd, 1, 0x66C7, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf1dpd, 1, 0x66C6, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf1qpd, 1, 0x66C7, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf0dpd, 1, 0x66C6, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vgatherpf0qpd, 1, 0x66C7, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vgatherpf1dpd, 1, 0x66C6, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vgatherpf1qpd, 1, 0x66C7, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vscatterpf0dpd, 1, 0x66C6, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vscatterpf0qpd, 1, 0x66C7, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vscatterpf1dpd, 1, 0x66C6, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
vscatterpf1qpd, 1, 0x66C7, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex }
|
||||
|
||||
vgatherpf0dps, 1, 0x66C6, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf0qps, 1, 0x66C7, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex }
|
||||
vgatherpf1dps, 1, 0x66C6, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vgatherpf1qps, 1, 0x66C7, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex }
|
||||
vscatterpf0dps, 1, 0x66C6, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf0qps, 1, 0x66C7, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex }
|
||||
vscatterpf1dps, 1, 0x66C6, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { ZMMword|Unspecified|BaseIndex }
|
||||
vscatterpf1qps, 1, 0x66C7, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex }
|
||||
vgatherpf0dps, 1, 0x66C6, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vgatherpf0qps, 1, 0x66C7, 1, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vgatherpf1dps, 1, 0x66C6, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vgatherpf1qps, 1, 0x66C7, 2, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vscatterpf0dps, 1, 0x66C6, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vscatterpf0qps, 1, 0x66C7, 5, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vscatterpf1dps, 1, 0x66C6, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
vscatterpf1qps, 1, 0x66C7, 6, 1, CpuAVX512PF, Modrm|EVex=1|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex }
|
||||
|
||||
// AVX512PF instructions end.
|
||||
|
||||
|
|
@ -4098,35 +4098,35 @@ enclu, 0, 0xf01d7, None, 3, CpuSE1, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_l
|
|||
|
||||
// AVX512VL instructions.
|
||||
|
||||
vgatherdpd, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherdq, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vpscatterdq, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vscatterdpd, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vgatherdpd, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherqpd, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherdq, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherqq, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegYMM }
|
||||
vpscatterdq, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Qword|Unspecified|BaseIndex }
|
||||
vpscatterqq, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Qword|Unspecified|BaseIndex }
|
||||
vscatterdpd, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Qword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Qword|Unspecified|BaseIndex }
|
||||
vscatterqpd, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=2|Disp8MemShift=3|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Qword|Unspecified|BaseIndex }
|
||||
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { YMMword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { XMMword|Unspecified|BaseIndex, RegXMM }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Qword|Unspecified|BaseIndex }
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, YMMword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Qword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, XMMword|Unspecified|BaseIndex }
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherdps, 2, 0x6692, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegYMM }
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vgatherqps, 2, 0x6693, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherdd, 2, 0x6690, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegYMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vpgatherqd, 2, 0x6691, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex, RegXMM }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
vpscatterdd, 2, 0x66A0, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Dword|Unspecified|BaseIndex }
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
vpscatterqd, 2, 0x66A1, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterdps, 2, 0x66A2, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
vscatterqps, 2, 0x66A3, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=3|Masking=2|NoDefMask|VexOpcode=1|VexW=1|Disp8MemShift=2|VecSIB=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Dword|Unspecified|BaseIndex }
|
||||
|
||||
vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|Masking=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, RegXMM|RegYMM }
|
||||
vcvtdq2pd, 2, 0xF3E6, None, 1, CpuAVX512F|CpuAVX512VL, Modrm|EVex=2|Masking=3|VexOpcode=0|VexW=1|Broadcast|Disp8MemShift=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Qword|Unspecified|BaseIndex, RegXMM }
|
||||
|
|
|
|||
|
|
@ -48428,7 +48428,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -48440,12 +48440,12 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0 } },
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 2, 1, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
|
||||
|
|
@ -48502,7 +48502,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -48519,7 +48519,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48536,7 +48536,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -48593,7 +48593,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -48610,7 +48610,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48627,7 +48627,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -48684,7 +48684,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -48701,7 +48701,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48718,7 +48718,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48775,7 +48775,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -48792,7 +48792,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48809,7 +48809,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -48866,7 +48866,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -48878,12 +48878,12 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0 } },
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 2, 1, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
|
||||
|
|
@ -48940,7 +48940,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -48957,7 +48957,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -48974,7 +48974,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -49031,7 +49031,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
|
|
@ -49048,7 +49048,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 1, 0, 0, 2, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
|
|
@ -49065,7 +49065,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 3, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
|
|
@ -62678,7 +62678,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterdq", 2, 0x66A0, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62687,7 +62687,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0 } },
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 2, 1, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
|
|
@ -62695,7 +62695,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterqq", 2, 0x66A1, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62712,7 +62712,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterqq", 2, 0x66A1, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62729,7 +62729,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterqq", 2, 0x66A1, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62746,7 +62746,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterdpd", 2, 0x66A2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62763,7 +62763,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterdpd", 2, 0x66A2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62772,7 +62772,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0 } },
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 1,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
|
||||
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 2, 1, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
|
|
@ -62780,7 +62780,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqpd", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62797,7 +62797,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqpd", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62814,7 +62814,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqpd", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62831,7 +62831,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vcompressps", 2, 0x668A, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62916,7 +62916,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterdd", 2, 0x66A0, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62933,7 +62933,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterdd", 2, 0x66A0, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62950,7 +62950,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterdps", 2, 0x66A2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62967,7 +62967,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterdps", 2, 0x66A2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -62984,7 +62984,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterdps", 2, 0x66A2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -63001,7 +63001,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vcvtudq2pd", 2, 0xF37A, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67257,7 +67257,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterqd", 2, 0x66A1, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67274,7 +67274,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpscatterqd", 2, 0x66A1, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67291,7 +67291,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqps", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67308,7 +67308,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqps", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67325,7 +67325,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterqps", 2, 0x66A3, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -67342,7 +67342,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,
|
||||
0, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vpsraq", 3, 0x66E2, None, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68084,7 +68084,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf0qpd", 1, 0x66C7, 1, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68098,7 +68098,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf1dpd", 1, 0x66C6, 2, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68112,7 +68112,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf1qpd", 1, 0x66C7, 2, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68126,7 +68126,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf0dpd", 1, 0x66C6, 5, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68140,7 +68140,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf0qpd", 1, 0x66C7, 5, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68154,7 +68154,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf1dpd", 1, 0x66C6, 6, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68168,7 +68168,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 2, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf1qpd", 1, 0x66C7, 6, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68182,7 +68182,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 2, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 3, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf0dps", 1, 0x66C6, 1, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68196,7 +68196,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf0qps", 1, 0x66C7, 1, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68210,7 +68210,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf1dps", 1, 0x66C6, 2, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68224,7 +68224,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vgatherpf1qps", 1, 0x66C7, 2, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68238,7 +68238,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf0dps", 1, 0x66C6, 5, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68252,7 +68252,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf0qps", 1, 0x66C7, 5, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68266,7 +68266,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf1dps", 1, 0x66C6, 6, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68280,7 +68280,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "vscatterpf1qps", 1, 0x66C7, 6, 1,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
@ -68294,7 +68294,7 @@ const insn_template i386_optab[] =
|
|||
0, 0, 1, 1, 0, 3, 0, 0, 1, 2, 0, 0, 0, 2, 1, 0, 0, 0, 0, 0,
|
||||
0, 0 },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
0, 0, 0 } } } },
|
||||
{ "prefetchwt1", 1, 0x0F0D, 2, 2,
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue