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Support Intel AMX-FP16

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gas/

	* NEWS: Add support for Intel AMX-FP16 instruction.
	* config/tc-i386.c: Add amx_fp16.
	* doc/c-i386.texi: Document .amx_fp16.
	* testsuite/gas/i386/i386.exp: Add AMX-FP16 tests.
	* testsuite/gas/i386/x86-64-amx-fp16-intel.d: New test.
	* testsuite/gas/i386/x86-64-amx-fp16.d: Likewise.
	* testsuite/gas/i386/x86-64-amx-fp16.s: Likewise.
	* testsuite/gas/i386/x86-64-amx-fp16-bad.d: Likewise.
	* testsuite/gas/i386/x86-64-amx-fp16-bad.s: Likewise.

opcodes/

	* i386-dis.c (MOD_VEX_0F385C_X86_64_P_3_W_0): New.
	(VEX_LEN_0F385C_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_W_0F385C_X86_64_P_3): Likewise.
	(prefix_table): Add VEX_W_0F385C_X86_64_P_3.
	(vex_len_table): Add VEX_LEN_0F385C_X86_64_P_3_W_0_M_0.
	(vex_w_table): Add VEX_W_0F385C_X86_64_P_3.
	(mod_table): Add MOD_VEX_0F385C_X86_64_P_3_W_0.
	* i386-gen.c (cpu_flag_init): Add AMX-FP16_FLAGS.
	(CPU_ANY_AMX_TILE_FLAGS): Add CpuAMX_FP16.
	(cpu_flags): Add CpuAMX-FP16.
	* i386-opc.h (enum): Add CpuAMX-FP16.
	(i386_cpu_flags): Add cpuamx_fp16.
	* i386-opc.tbl: Add Intel AMX-FP16 instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
This commit is contained in:
Cui,Lili 2022-10-21 10:01:12 +08:00
parent 5bba7eaef5
commit 68830fbae9
15 changed files with 4236 additions and 4089 deletions
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2
gas/NEWS
View file

@ -1,5 +1,7 @@
-*- text -*-
* Add support for Intel AMX-FP16 instructions.
* gas now supports --compress-debug-sections=zstd to compress
debug sections with zstd.
* Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}

1
gas/config/tc-i386.c
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@ -1076,6 +1076,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (cldemote, CLDEMOTE, CLDEMOTE, false),
SUBARCH (amx_int8, AMX_INT8, ANY_AMX_INT8, false),
SUBARCH (amx_bf16, AMX_BF16, ANY_AMX_BF16, false),
SUBARCH (amx_fp16, AMX_FP16, AMX_FP16, false),
SUBARCH (amx_tile, AMX_TILE, ANY_AMX_TILE, false),
SUBARCH (movdiri, MOVDIRI, ANY_MOVDIRI, false),
SUBARCH (movdir64b, MOVDIR64B, ANY_MOVDIR64B, false),

3
gas/doc/c-i386.texi
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@ -196,6 +196,7 @@ accept various extension mnemonics. For example,
@code{avx512_fp16},
@code{amx_int8},
@code{amx_bf16},
@code{amx_fp16},
@code{amx_tile},
@code{vmx},
@code{vmfunc},
@ -1489,7 +1490,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
@item @samp{.amx_int8} @tab @samp{.amx_bf16} @tab @samp{.amx_tile}
@item @samp{.amx_int8} @tab @samp{.amx_bf16} @tab @samp{.amx_fp16} @tab @samp{.amx_tile}
@item @samp{.kl} @tab @samp{.widekl} @tab @samp{.uintr} @tab @samp{.hreset}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}

3
gas/testsuite/gas/i386/i386.exp
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@ -1145,6 +1145,9 @@ if [gas_64_check] then {
run_list_test "x86-64-avx512_bf16_vl-inval"
run_dump_test "x86-64-avx-vnni"
run_list_test "x86-64-avx-vnni-inval"
run_dump_test "x86-64-amx-fp16"
run_dump_test "x86-64-amx-fp16-intel"
run_dump_test "x86-64-amx-fp16-bad"
run_dump_test "x86-64-clzero"
run_dump_test "x86-64-mwaitx-bdver4"
run_list_test "x86-64-mwaitx-reg"

19
gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d Normal file
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@ -0,0 +1,19 @@
#as:
#objdump: -drw
#name: x86_64 Illegal AMX-FP16 insns
#source: x86-64-amx-fp16-bad.s
.*: +file format .*
Disassembly of section \.text:
0+ <\.text>:
[ ]*[a-f0-9]+:[ ]*c4 e2 d3 5c[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.*
[ ]*[a-f0-9]+:[ ]*c4 e2 57 5c[ ]*\(bad\)[ ]*
[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.*
[ ]*[a-f0-9]+:[ ]*c4 62 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,\(bad\)
[ ]*[a-f0-9]+:[ ]*c4 c2 53 5c dc[ ]*tdpfp16ps %tmm5,\(bad\),%tmm3
[ ]*[a-f0-9]+:[ ]*c4 e2 33 5c dc[ ]*tdpfp16ps \(bad\),%tmm4,%tmm3
#pass

35
gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s Normal file
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@ -0,0 +1,35 @@
# Check Illegal 64bit AMX-FP16 instructions
.text
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
.byte 0xc4
.byte 0xe2
.byte 0xd3
.byte 0x5c
.byte 0xdc
.fill 0x05, 0x01, 0x90
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
.byte 0xc4
.byte 0xe2
.byte 0x57
.byte 0x5c
.byte 0xdc
.fill 0x05, 0x01, 0x90
#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
.byte 0xc4
.byte 0x62
.byte 0x53
.byte 0x5c
.byte 0xdc
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
.byte 0xc4
.byte 0xc2
.byte 0x53
.byte 0x5c
.byte 0xdc
#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
.byte 0xc4
.byte 0xe2
.byte 0x33
.byte 0x5c
.byte 0xdc

13
gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d Normal file
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@ -0,0 +1,13 @@
#as:
#objdump: -d -Mintel
#name: x86_64 AMX-FP16 insns (Intel disassembly)
#source: x86-64-amx-fp16.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps tmm3,tmm4,tmm5
[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps tmm3,tmm4,tmm5

13
gas/testsuite/gas/i386/x86-64-amx-fp16.d Normal file
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@ -0,0 +1,13 @@
#as:
#objdump: -dw
#name: x86_64 AMX-FP16 insns
#source: x86-64-amx-fp16.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,%tmm3
[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,%tmm3

9
gas/testsuite/gas/i386/x86-64-amx-fp16.s Normal file
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@ -0,0 +1,9 @@
# Check 64bit AMX-FP16 instructions
.allow_index_reg
.text
_start:
tdpfp16ps %tmm5, %tmm4, %tmm3
.intel_syntax noprefix
tdpfp16ps tmm3, tmm4, tmm5

18
opcodes/i386-dis.c
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@ -931,6 +931,7 @@ enum
MOD_VEX_0F384B_X86_64_P_3_W_0,
MOD_VEX_0F385A,
MOD_VEX_0F385C_X86_64_P_1_W_0,
MOD_VEX_0F385C_X86_64_P_3_W_0,
MOD_VEX_0F385E_X86_64_P_0_W_0,
MOD_VEX_0F385E_X86_64_P_1_W_0,
MOD_VEX_0F385E_X86_64_P_2_W_0,
@ -1354,6 +1355,7 @@ enum
VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
VEX_LEN_0F385A_M_0,
VEX_LEN_0F385C_X86_64_P_1_W_0_M_0,
VEX_LEN_0F385C_X86_64_P_3_W_0_M_0,
VEX_LEN_0F385E_X86_64_P_0_W_0_M_0,
VEX_LEN_0F385E_X86_64_P_1_W_0_M_0,
VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
@ -1520,6 +1522,7 @@ enum
VEX_W_0F3859,
VEX_W_0F385A_M_0_L_0,
VEX_W_0F385C_X86_64_P_1,
VEX_W_0F385C_X86_64_P_3,
VEX_W_0F385E_X86_64_P_0,
VEX_W_0F385E_X86_64_P_1,
VEX_W_0F385E_X86_64_P_2,
@ -4007,6 +4010,7 @@ static const struct dis386 prefix_table[][4] = {
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F385C_X86_64_P_1) },
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F385C_X86_64_P_3) },
},
/* PREFIX_VEX_0F385E_X86_64 */
@ -6907,6 +6911,11 @@ static const struct dis386 vex_len_table[][2] = {
{ "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 },
},
/* VEX_LEN_0F385C_X86_64_P_3_W_0_M_0 */
{
{ "tdpfp16ps", { TMM, EXtmm, VexTmm }, 0 },
},
/* VEX_LEN_0F385E_X86_64_P_0_W_0_M_0 */
{
{ "tdpbuud", {TMM, EXtmm, VexTmm }, 0 },
@ -7575,6 +7584,10 @@ static const struct dis386 vex_w_table[][2] = {
/* VEX_W_0F385C_X86_64_P_1 */
{ MOD_TABLE (MOD_VEX_0F385C_X86_64_P_1_W_0) },
},
{
/* VEX_W_0F385C_X86_64_P_3 */
{ MOD_TABLE (MOD_VEX_0F385C_X86_64_P_3_W_0) },
},
{
/* VEX_W_0F385E_X86_64_P_0 */
{ MOD_TABLE (MOD_VEX_0F385E_X86_64_P_0_W_0) },
@ -8371,6 +8384,11 @@ static const struct dis386 mod_table[][2] = {
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
},
{
/* MOD_VEX_0F385C_X86_64_P_3_W_0 */
{ Bad_Opcode },
{ VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_3_W_0_M_0) },
},
{
/* MOD_VEX_0F385E_X86_64_P_0_W_0 */
{ Bad_Opcode },

5
opcodes/i386-gen.c
View file

@ -305,6 +305,8 @@ static initializer cpu_flag_init[] =
"CPU_AMX_TILE_FLAGS|CpuAMX_INT8" },
{ "CPU_AMX_BF16_FLAGS",
"CPU_AMX_TILE_FLAGS|CpuAMX_BF16" },
{ "CPU_AMX_FP16_FLAGS",
"CPU_AMX_TILE_FLAGS|CpuAMX_FP16" },
{ "CPU_AMX_TILE_FLAGS",
"CpuAMX_TILE" },
{ "CPU_MOVDIRI_FLAGS",
@ -412,7 +414,7 @@ static initializer cpu_flag_init[] =
{ "CPU_ANY_AMX_BF16_FLAGS",
"CpuAMX_BF16" },
{ "CPU_ANY_AMX_TILE_FLAGS",
"CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16" },
"CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16|CpuAMX_FP16" },
{ "CPU_ANY_AVX_VNNI_FLAGS",
"CpuAVX_VNNI" },
{ "CPU_ANY_MOVDIRI_FLAGS",
@ -657,6 +659,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuCLDEMOTE),
BITFIELD (CpuAMX_INT8),
BITFIELD (CpuAMX_BF16),
BITFIELD (CpuAMX_FP16),
BITFIELD (CpuAMX_TILE),
BITFIELD (CpuMOVDIRI),
BITFIELD (CpuMOVDIR64B),

475
opcodes/i386-init.h
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File diff suppressed because it is too large Load diff

3
opcodes/i386-opc.h
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@ -226,6 +226,8 @@ enum
CpuAMX_INT8,
/* AMX-BF16 instructions required */
CpuAMX_BF16,
/* AMX-FP16 instructions required */
CpuAMX_FP16,
/* AMX-TILE instructions required */
CpuAMX_TILE,
/* GFNI instructions required */
@ -397,6 +399,7 @@ typedef union i386_cpu_flags
unsigned int cpushstk:1;
unsigned int cpuamx_int8:1;
unsigned int cpuamx_bf16:1;
unsigned int cpuamx_fp16:1;
unsigned int cpuamx_tile:1;
unsigned int cpugfni:1;
unsigned int cpuvaes:1;

1
opcodes/i386-opc.tbl
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@ -3098,6 +3098,7 @@ ldtilecfg, 0x49, None, CpuAMX_TILE|Cpu64, Modrm|Vex128|Space0F38|VexW0|No_bSuf|N
sttilecfg, 0x6649, None, CpuAMX_TILE|Cpu64, Modrm|Vex128|Space0F38|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Unspecified|BaseIndex }
tdpbf16ps, 0xf35c, None, CpuAMX_BF16|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }
tdpfp16ps, 0xf25c, None, CpuAMX_FP16|Cpu64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }
tdpbssd, 0xf25e, None, CpuAMX_INT8|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }
tdpbuud, 0x5e, None, CpuAMX_INT8|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }
tdpbusd, 0x665e, None, CpuAMX_INT8|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }

7725
opcodes/i386-tbl.h
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File diff suppressed because it is too large Load diff