* PKE sim unit testing continuing. The DIRECT and MPG instructions
were hammered in today's runs. Work is beginning in endian-proofing the code. * sky-pke.c (pke1_issue): Issue on correct PKE device. (pke_io_write_buffer, pke_code_mpg, pke_code_unpack): Perform more endian conversions. (pke_code_mpg, pke_code_direct): Add operand alignment assertions. (pke_code_mpg): Correct VU stall checks. Correct VU opcode transfer ordering. (pke_code_direct): Correct typos in DIRECT operand accessing. (pke_code_unpack): Correct conditional sign-extension handling. * sky-gpuif.c (gif_io_read_buffer, gif_io_write_buffer): Correct assertion polarity. (gif_read_tag): Disable faulty DMA-tag testing code.
This commit is contained in:
Frank Ch. Eigler
parent
ca0e29d12b
commit
653c259005
1 changed files with 53 additions and 28 deletions
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@ -118,7 +118,7 @@ pke0_issue(SIM_DESC sd)
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void
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pke1_issue(SIM_DESC sd)
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{
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pke_issue(sd, & pke0_device);
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pke_issue(sd, & pke1_device);
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}
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@ -487,8 +487,9 @@ pke_io_write_buffer(device *me_,
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memcpy((void*) fqw->data, me->fifo_qw_in_progress, sizeof(quadword));
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_READ(me, (me->pke_number == 0 ? DMA_D0_MADR : DMA_D1_MADR),
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& fqw->source_address,
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& fqw->source_address, /* target endian */
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4);
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fqw->source_address = T2H_4(fqw->source_address);
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PKE_MEM_READ(me, (me->pke_number == 0 ? DMA_D0_PKTFLAG : DMA_D1_PKTFLAG),
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& dma_tag_present,
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4);
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@ -1371,6 +1372,10 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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int num = BIT_MASK_GET(pkecode, PKE_OPCODE_NUM_B, PKE_OPCODE_NUM_E);
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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/* assert 64-bit alignment of MPG operand */
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if(me->qw_pc != 3 && me->qw_pc != 1)
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return pke_code_error(me, pkecode);
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/* map zero to max+1 */
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if(num==0) num=0x100;
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@ -1380,6 +1385,12 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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{
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/* perform implied FLUSHE */
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if(pke_check_stall(me, chk_vu))
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{
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/* VU busy */
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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/* retry this instruction next clock */
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}
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else
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{
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/* VU idle */
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int i;
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@ -1395,8 +1406,9 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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{
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address_word vu_addr_base, vu_addr;
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address_word vutrack_addr_base, vutrack_addr;
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unsigned_4 vu_opcode[2];
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unsigned_4 vu_lower_opcode, vu_upper_opcode;
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unsigned_4* operand;
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unsigned_4 source_addr;
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struct fifo_quadword* fq;
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int next_num;
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@ -1408,29 +1420,36 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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/* VU*_MEM0 : instruction memory */
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vu_addr_base = (me->pke_number == 0) ?
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VU0_MEM0_WINDOW_START : VU0_MEM0_WINDOW_START;
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vu_addr = vu_addr_base + (imm + i) *2;
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vu_addr = vu_addr_base + (imm + i) * 8;
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/* XXX: overflow check! */
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/* VU*_MEM0_TRACK : source-addr tracking table */
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vutrack_addr_base = (me->pke_number == 0) ?
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VU0_MEM0_SRCADDR_START : VU1_MEM0_SRCADDR_START;
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vutrack_addr = vu_addr_base + imm + i;
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vutrack_addr = vu_addr_base + (imm + i) * 4;
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/* Fetch operand words */
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fq = pke_pc_fifo(me, num*2 + i, & operand);
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vu_opcode[0] = *operand;
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vu_opcode[1] = *pke_pc_operand(me, num*2 + i + 1);
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/* Fetch operand words; assume they are already little-endian for VU imem */
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fq = pke_pc_fifo(me, i*2 + 1, & operand);
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vu_lower_opcode = *operand;
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vu_upper_opcode = *pke_pc_operand(me, i*2 + 2);
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/* write data into VU memory */
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ASSERT(sizeof(vu_opcode) == 8);
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/* upper (vector) opcode comes in first word */
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_WRITE(me, vu_addr,
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vu_opcode,
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8);
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& vu_upper_opcode,
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4);
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/* lower (scalar) opcode comes in next word */
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PKE_MEM_WRITE(me, vu_addr + 4,
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& vu_lower_opcode,
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4);
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/* write srcaddr into VU srcaddr tracking table */
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/* write tracking address in target byte-order */
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source_addr = H2T_4(fq->source_address);
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_WRITE(me, vutrack_addr,
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& fq->source_address,
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& source_addr,
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4);
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} /* VU xfer loop */
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@ -1441,12 +1460,6 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_IDLE);
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pke_pc_advance(me, 1 + num*2);
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}
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else
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{
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/* VU busy */
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_STALL);
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/* retry this instruction next clock */
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}
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} /* if FIFO full enough */
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else
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{
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@ -1463,12 +1476,15 @@ pke_code_direct(struct pke_device* me, unsigned_4 pkecode)
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/* check that FIFO has a few more words for DIRECT operand */
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unsigned_4* last_direct_word;
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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int num = BIT_MASK_GET(pkecode, PKE_OPCODE_NUM_B, PKE_OPCODE_NUM_E);
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/* assert 128-bit alignment of DIRECT operand */
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if(me->qw_pc != 3)
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return pke_code_error(me, pkecode);
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/* map zero to max+1 */
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if(imm==0) imm=0x10000;
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last_direct_word = pke_pc_operand(me, imm*4); /* num: number of 128-bit words */
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last_direct_word = pke_pc_operand(me, imm*4); /* imm: number of 128-bit words */
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if(last_direct_word != NULL)
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{
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/* VU idle */
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@ -1481,7 +1497,7 @@ pke_code_direct(struct pke_device* me, unsigned_4 pkecode)
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/* transfer GPUIF quadwords, one word per iteration */
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for(i=0; i<imm*4; i++)
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{
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unsigned_4* operand = pke_pc_operand(me, num);
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unsigned_4* operand = pke_pc_operand(me, 1+i);
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/* collect word into quadword */
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fifo_data[i % 4] = *operand;
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@ -1530,7 +1546,7 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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short cl = PKE_REG_MASK_GET(me, CYCLE, CL); /* cycle controls */
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short wl = PKE_REG_MASK_GET(me, CYCLE, WL);
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int r = BIT_MASK_GET(imm, 15, 15); /* indicator bits in imm value */
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int sx = BIT_MASK_GET(imm, 14, 14);
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int usn = BIT_MASK_GET(imm, 14, 14);
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int n, num_operands;
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unsigned_4* last_operand_word = NULL;
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@ -1619,6 +1635,10 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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PKE_MEM_READ(me, vu_addr,
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vu_old_data,
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16);
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/* yank memory out of little-endian order */
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for(i=0; i<4; i++)
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vu_old_data[i] = LE2H_4(vu_old_data[i]);
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/* For cyclic unpack, next operand quadword may come from instruction stream
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or be zero. */
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@ -1667,10 +1687,10 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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operand = pke_pc_operand_bits(me, bitoffset, unitbits, & source_addr);
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/* selectively sign-extend; not for V4_5 1-bit value */
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if(sx && unitbits > 1)
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unpacked_data[i] = SEXT32(operand, unitbits-1);
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else
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if(usn || unitbits == 1)
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unpacked_data[i] = operand;
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else
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unpacked_data[i] = SEXT32(operand, unitbits-1);
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}
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/* consumed a vector from the PKE instruction stream */
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@ -1752,13 +1772,18 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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;
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}
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/* yank memory into little-endian order */
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for(i=0; i<4; i++)
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vu_new_data[i] = H2LE_4(vu_new_data[i]);
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/* write replacement word */
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ASSERT(sizeof(vu_new_data) == 16);
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PKE_MEM_WRITE(me, vu_addr,
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vu_new_data,
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16);
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/* write tracking address */
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/* write tracking address in target byte-order */
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source_addr = H2T_4(source_addr);
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_WRITE(me, vutrack_addr,
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& source_addr,
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