gas/
2004-05-27 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (ar_is_in_integer_unit): Removed. (ar_is_only_in_integer_unit): New. (ar_is_only_in_memory_unit): New. (generate_unwind_image): Silence gcc on 32bit host. (md_assemble): Use ar_is_only_in_integer_unit instead of ar_is_in_integer_unit. Check AR access. gas/testsuite 2004-05-27 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/regs.d: Updated.
This commit is contained in:
H.J. Lu
parent
1fc2533bde
commit
652ca075fb
4 changed files with 93 additions and 46 deletions
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@ -1,3 +1,12 @@
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2004-05-27 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-ia64.c (ar_is_in_integer_unit): Removed.
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(ar_is_only_in_integer_unit): New.
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(ar_is_only_in_memory_unit): New.
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(generate_unwind_image): Silence gcc on 32bit host.
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(md_assemble): Use ar_is_only_in_integer_unit instead of
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ar_is_in_integer_unit. Check AR access.
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2004-05-27 Peter Barada <peter@the-baradas.com>
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* config/tc-m68k.c (md_begin): Sort the opcode table into
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@ -696,7 +696,6 @@ static struct
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typedef void (*vbyte_func) PARAMS ((int, char *, char *));
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/* Forward declarations: */
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static int ar_is_in_integer_unit PARAMS ((int regnum));
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static void set_section PARAMS ((char *name));
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static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
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unsigned int, unsigned int));
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@ -908,19 +907,22 @@ static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
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static void save_prologue_count PARAMS ((unsigned long, unsigned int));
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static void free_saved_prologue_counts PARAMS ((void));
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/* Determine if application register REGNUM resides in the integer
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/* Determine if application register REGNUM resides only in the integer
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unit (as opposed to the memory unit). */
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static int
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ar_is_in_integer_unit (reg)
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int reg;
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ar_is_only_in_integer_unit (int reg)
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{
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reg -= REG_AR;
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return reg >= 64 && reg <= 111;
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}
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return (reg == 64 /* pfs */
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|| reg == 65 /* lc */
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|| reg == 66 /* ec */
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/* ??? ias accepts and puts these in the integer unit. */
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|| (reg >= 112 && reg <= 127));
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/* Determine if application register REGNUM resides only in the memory
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unit (as opposed to the integer unit). */
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static int
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ar_is_only_in_memory_unit (int reg)
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{
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reg -= REG_AR;
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return reg >= 0 && reg <= 47;
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}
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/* Switch to section NAME and create section if necessary. It's
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@ -3447,7 +3449,8 @@ generate_unwind_image (const segT text_seg)
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unwind.info = expr_build_dot ();
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frag_var (rs_machine_dependent, size, size, 0, 0,
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(offsetT) unwind.personality_routine, (char *) list);
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(offsetT) (long) unwind.personality_routine,
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(char *) list);
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/* Add the personality address to the image. */
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if (unwind.personality_routine != 0)
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@ -10021,11 +10024,15 @@ md_assemble (str)
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rop = 1;
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else
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abort ();
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if (CURR_SLOT.opnd[rop].X_op == O_register
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&& ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
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mnemonic = "mov.i";
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if (CURR_SLOT.opnd[rop].X_op == O_register)
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{
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if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
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mnemonic = "mov.i";
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else
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mnemonic = "mov.m";
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}
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else
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mnemonic = "mov.m";
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abort ();
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ia64_free_opcode (idesc);
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idesc = ia64_find_opcode (mnemonic);
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while (idesc != NULL
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@ -10034,6 +10041,33 @@ md_assemble (str)
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idesc = get_next_opcode (idesc);
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}
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}
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else if (strcmp (idesc->name, "mov.i") == 0
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|| strcmp (idesc->name, "mov.m") == 0)
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{
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enum ia64_opnd opnd1, opnd2;
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int rop;
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opnd1 = idesc->operands[0];
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opnd2 = idesc->operands[1];
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if (opnd1 == IA64_OPND_AR3)
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rop = 0;
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else if (opnd2 == IA64_OPND_AR3)
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rop = 1;
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else
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abort ();
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if (CURR_SLOT.opnd[rop].X_op == O_register)
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{
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char unit = 'a';
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if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
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unit = 'i';
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else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
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unit = 'm';
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if (unit != 'a' && unit != idesc->name [4])
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as_bad ("AR %d cannot be accessed by %c-unit",
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(int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
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TOUPPER (unit));
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}
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}
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qp_regno = 0;
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if (md.qp.X_op == O_register)
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@ -1,3 +1,7 @@
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2004-05-27 H.J. Lu <hongjiu.lu@intel.com>
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* gas/ia64/regs.d: Updated.
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2004-05-26 H.J. Lu <hongjiu.lu@intel.com>
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* gas/ia64/ia64.exp: Run invalid-ar.
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@ -2041,53 +2041,53 @@ Disassembly of section \.text:
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2a56: 00 00 00 02 00 20 nop\.m 0x0
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2a5c: 00 10 ca 00 mov\.i r1=ar\.ec;;
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2a60: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2a66: 00 00 00 02 00 20 nop\.m 0x0
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2a6c: 00 80 cb 00 mov\.i r1=ar112;;
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2a66: 10 00 c0 45 08 00 mov\.m r1=ar112
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2a6c: 00 00 04 00 nop\.i 0x0;;
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2a70: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2a76: 00 00 00 02 00 20 nop\.m 0x0
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2a7c: 00 88 cb 00 mov\.i r1=ar113;;
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2a76: 10 00 c4 45 08 00 mov\.m r1=ar113
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2a7c: 00 00 04 00 nop\.i 0x0;;
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2a80: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2a86: 00 00 00 02 00 20 nop\.m 0x0
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2a8c: 00 90 cb 00 mov\.i r1=ar114;;
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2a86: 10 00 c8 45 08 00 mov\.m r1=ar114
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2a8c: 00 00 04 00 nop\.i 0x0;;
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2a90: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2a96: 00 00 00 02 00 20 nop\.m 0x0
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2a9c: 00 98 cb 00 mov\.i r1=ar115;;
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2a96: 10 00 cc 45 08 00 mov\.m r1=ar115
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2a9c: 00 00 04 00 nop\.i 0x0;;
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2aa0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2aa6: 00 00 00 02 00 20 nop\.m 0x0
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2aac: 00 a0 cb 00 mov\.i r1=ar116;;
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2aa6: 10 00 d0 45 08 00 mov\.m r1=ar116
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2aac: 00 00 04 00 nop\.i 0x0;;
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2ab0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2ab6: 00 00 00 02 00 20 nop\.m 0x0
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2abc: 00 a8 cb 00 mov\.i r1=ar117;;
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2ab6: 10 00 d4 45 08 00 mov\.m r1=ar117
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2abc: 00 00 04 00 nop\.i 0x0;;
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2ac0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2ac6: 00 00 00 02 00 20 nop\.m 0x0
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2acc: 00 b0 cb 00 mov\.i r1=ar118;;
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2ac6: 10 00 d8 45 08 00 mov\.m r1=ar118
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2acc: 00 00 04 00 nop\.i 0x0;;
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2ad0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2ad6: 00 00 00 02 00 20 nop\.m 0x0
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2adc: 00 b8 cb 00 mov\.i r1=ar119;;
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2ad6: 10 00 dc 45 08 00 mov\.m r1=ar119
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2adc: 00 00 04 00 nop\.i 0x0;;
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2ae0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2ae6: 00 00 00 02 00 20 nop\.m 0x0
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2aec: 00 c0 cb 00 mov\.i r1=ar120;;
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2ae6: 10 00 e0 45 08 00 mov\.m r1=ar120
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2aec: 00 00 04 00 nop\.i 0x0;;
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2af0: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2af6: 00 00 00 02 00 20 nop\.m 0x0
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2afc: 00 c8 cb 00 mov\.i r1=ar121;;
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2af6: 10 00 e4 45 08 00 mov\.m r1=ar121
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2afc: 00 00 04 00 nop\.i 0x0;;
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2b00: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b06: 00 00 00 02 00 20 nop\.m 0x0
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2b0c: 00 d0 cb 00 mov\.i r1=ar122;;
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2b06: 10 00 e8 45 08 00 mov\.m r1=ar122
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2b0c: 00 00 04 00 nop\.i 0x0;;
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2b10: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b16: 00 00 00 02 00 20 nop\.m 0x0
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2b1c: 00 d8 cb 00 mov\.i r1=ar123;;
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2b16: 10 00 ec 45 08 00 mov\.m r1=ar123
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2b1c: 00 00 04 00 nop\.i 0x0;;
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2b20: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b26: 00 00 00 02 00 20 nop\.m 0x0
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2b2c: 00 e0 cb 00 mov\.i r1=ar124;;
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2b26: 10 00 f0 45 08 00 mov\.m r1=ar124
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2b2c: 00 00 04 00 nop\.i 0x0;;
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2b30: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b36: 00 00 00 02 00 20 nop\.m 0x0
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2b3c: 00 e8 cb 00 mov\.i r1=ar125;;
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2b36: 10 00 f4 45 08 00 mov\.m r1=ar125
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2b3c: 00 00 04 00 nop\.i 0x0;;
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2b40: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b46: 00 00 00 02 00 20 nop\.m 0x0
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2b4c: 00 f0 cb 00 mov\.i r1=ar126;;
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2b46: 10 00 f8 45 08 00 mov\.m r1=ar126
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2b4c: 00 00 04 00 nop\.i 0x0;;
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2b50: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b56: 00 00 00 02 00 20 nop\.m 0x0
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2b5c: 00 f8 cb 00 mov\.i r1=ar127;;
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2b56: 10 00 fc 45 08 00 mov\.m r1=ar127
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2b5c: 00 00 04 00 nop\.i 0x0;;
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2b60: 09 00 00 00 01 00 \[MMI\] nop\.m 0x0
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2b66: 10 00 00 44 08 00 mov\.m r1=ar\.k0
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2b6c: 00 00 04 00 nop\.i 0x0;;
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