Add code to support building mn10300 simulator with the common simulator
framework.
This commit is contained in:
Joyce Janczyn
parent
5abdc30591
commit
6274d39b87
1 changed files with 398 additions and 79 deletions
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@ -1,14 +1,46 @@
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#include <signal.h>
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#if WITH_COMMON
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#include "sim-main.h"
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#else
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#include "mn10300_sim.h"
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#endif
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#include "sysdep.h"
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#include "bfd.h"
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#include "sim-assert.h"
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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#include "bfd.h"
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define INLINE
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#endif
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#endif
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#include "mn10300_sim.h"
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host_callback *mn10300_callback;
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int mn10300_debug;
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static SIM_OPEN_KIND sim_kind;
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static char *myname;
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#if WITH_COMMON
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#else
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static void dispatch PARAMS ((uint32, uint32, int));
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static long hash PARAMS ((long));
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static void init_system PARAMS ((void));
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@ -169,63 +201,6 @@ dispatch (insn, extension, length)
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PC += length;
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}
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/* FIXME These would more efficient to use than load_mem/store_mem,
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but need to be changed to use the memory map. */
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uint8
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get_byte (x)
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uint8 *x;
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{
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return *x;
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}
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uint16
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get_half (x)
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uint8 *x;
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{
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uint8 *a = x;
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return (a[1] << 8) + (a[0]);
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}
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uint32
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get_word (x)
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uint8 *x;
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{
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uint8 *a = x;
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return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
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}
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void
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put_byte (addr, data)
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uint8 *addr;
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uint8 data;
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{
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uint8 *a = addr;
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a[0] = data;
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}
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void
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put_half (addr, data)
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uint8 *addr;
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uint16 data;
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{
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uint8 *a = addr;
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a[0] = data & 0xff;
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a[1] = (data >> 8) & 0xff;
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}
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void
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put_word (addr, data)
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uint8 *addr;
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uint32 data;
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{
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uint8 *a = addr;
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a[0] = data & 0xff;
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a[1] = (data >> 8) & 0xff;
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a[2] = (data >> 16) & 0xff;
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a[3] = (data >> 24) & 0xff;
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}
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void
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sim_size (power)
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int power;
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@ -283,6 +258,7 @@ compare_simops (arg1, arg2)
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return 0;
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}
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SIM_DESC
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sim_open (kind, cb, abfd, argv)
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SIM_OPEN_KIND kind;
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@ -825,11 +801,16 @@ sim_info (sd, verbose)
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}
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SIM_RC
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sim_create_inferior (sd, argv, env)
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sim_create_inferior (sd, abfd, argv, env)
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SIM_DESC sd;
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struct _bfd *abfd;
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char **argv;
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char **env;
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{
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if (abfd != NULL)
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PC = bfd_get_start_address (abfd);
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else
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PC = 0;
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return SIM_RC_OK;
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}
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@ -860,24 +841,6 @@ sim_stop_reason (sd, reason, sigrc)
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*sigrc = State.exception;
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}
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void
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sim_fetch_register (sd, rn, memory)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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{
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put_word (memory, State.regs[rn]);
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}
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void
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sim_store_register (sd, rn, memory)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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{
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State.regs[rn] = get_word (memory);
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}
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int
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sim_read (sd, addr, buffer, size)
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SIM_DESC sd;
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@ -911,11 +874,367 @@ sim_load (sd, prog, abfd, from_tty)
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bfd *prog_bfd;
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prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
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sim_kind == SIM_OPEN_DEBUG);
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sim_kind == SIM_OPEN_DEBUG,
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0, sim_write);
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if (prog_bfd == NULL)
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return SIM_RC_FAIL;
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PC = bfd_get_start_address (prog_bfd);
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if (abfd == NULL)
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bfd_close (prog_bfd);
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return SIM_RC_OK;
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}
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#endif /* not WITH_COMMON */
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#if WITH_COMMON
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/* For compatibility */
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SIM_DESC simulator;
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/* mn10300 interrupt model */
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enum interrupt_type
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{
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int_reset,
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int_nmi,
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int_intov1,
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int_intp10,
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int_intp11,
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int_intp12,
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int_intp13,
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int_intcm4,
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num_int_types
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};
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char *interrupt_names[] = {
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"reset",
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"nmi",
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"intov1",
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"intp10",
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"intp11",
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"intp12",
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"intp13",
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"intcm4",
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NULL
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};
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static void
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do_interrupt (sd, data)
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SIM_DESC sd;
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void *data;
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{
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#if 0
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char **interrupt_name = (char**)data;
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enum interrupt_type inttype;
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inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
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/* For a hardware reset, drop everything and jump to the start
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address */
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if (inttype == int_reset)
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{
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PC = 0;
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PSW = 0x20;
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ECR = 0;
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sim_engine_restart (sd, NULL, NULL, NULL_CIA);
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}
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/* Deliver an NMI when allowed */
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if (inttype == int_nmi)
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{
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if (PSW & PSW_NP)
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{
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/* We're already working on an NMI, so this one must wait
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around until the previous one is done. The processor
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ignores subsequent NMIs, so we don't need to count them.
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Just keep re-scheduling a single NMI until it manages to
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be delivered */
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if (STATE_CPU (sd, 0)->pending_nmi != NULL)
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sim_events_deschedule (sd, STATE_CPU (sd, 0)->pending_nmi);
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STATE_CPU (sd, 0)->pending_nmi =
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sim_events_schedule (sd, 1, do_interrupt, data);
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return;
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}
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else
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{
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/* NMI can be delivered. Do not deschedule pending_nmi as
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that, if still in the event queue, is a second NMI that
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needs to be delivered later. */
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FEPC = PC;
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FEPSW = PSW;
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/* Set the FECC part of the ECR. */
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ECR &= 0x0000ffff;
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ECR |= 0x10;
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PSW |= PSW_NP;
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PSW &= ~PSW_EP;
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PSW |= PSW_ID;
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PC = 0x10;
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sim_engine_restart (sd, NULL, NULL, NULL_CIA);
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}
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}
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/* deliver maskable interrupt when allowed */
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if (inttype > int_nmi && inttype < num_int_types)
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{
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if ((PSW & PSW_NP) || (PSW & PSW_ID))
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{
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/* Can't deliver this interrupt, reschedule it for later */
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sim_events_schedule (sd, 1, do_interrupt, data);
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return;
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}
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else
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{
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/* save context */
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EIPC = PC;
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EIPSW = PSW;
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/* Disable further interrupts. */
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PSW |= PSW_ID;
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/* Indicate that we're doing interrupt not exception processing. */
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PSW &= ~PSW_EP;
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/* Clear the EICC part of the ECR, will set below. */
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ECR &= 0xffff0000;
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switch (inttype)
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{
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case int_intov1:
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PC = 0x80;
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ECR |= 0x80;
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break;
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case int_intp10:
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PC = 0x90;
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ECR |= 0x90;
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break;
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case int_intp11:
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PC = 0xa0;
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ECR |= 0xa0;
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break;
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case int_intp12:
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PC = 0xb0;
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ECR |= 0xb0;
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break;
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case int_intp13:
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PC = 0xc0;
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ECR |= 0xc0;
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break;
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case int_intcm4:
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PC = 0xd0;
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ECR |= 0xd0;
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break;
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default:
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/* Should never be possible. */
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sim_engine_abort (sd, NULL, NULL_CIA,
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"do_interrupt - internal error - bad switch");
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break;
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}
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}
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sim_engine_restart (sd, NULL, NULL, NULL_CIA);
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}
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/* some other interrupt? */
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sim_engine_abort (sd, NULL, NULL_CIA,
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"do_interrupt - internal error - interrupt %d unknown",
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inttype);
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#endif /* 0 */
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}
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/* These default values correspond to expected usage for the chip. */
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SIM_DESC
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sim_open (kind, cb, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *cb;
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struct _bfd *abfd;
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char **argv;
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{
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SIM_DESC sd = sim_state_alloc (kind, cb);
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int mach;
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mn10300_callback = cb;
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SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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/* for compatibility */
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simulator = sd;
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/* FIXME: should be better way of setting up interrupts */
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STATE_WATCHPOINTS (sd)->pc = &(PC);
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STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
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STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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return 0;
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/* Allocate core managed memory */
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/* "Mirror" the ROM addresses below 1MB. */
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sim_do_command (sd, "memory region 0,0x100000");
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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/* check for/establish the a reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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/* establish any remaining configuration options */
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if (sim_config (sd) != SIM_RC_OK)
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{
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sim_module_uninstall (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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/* Uninstall the modules to avoid memory leaks,
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file descriptor leaks, etc. */
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sim_module_uninstall (sd);
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return 0;
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}
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/* set machine specific configuration */
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/* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
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/* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
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return sd;
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}
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void
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sim_close (sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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sim_module_uninstall (sd);
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}
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SIM_RC
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sim_create_inferior (sd, prog_bfd, argv, env)
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SIM_DESC sd;
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struct _bfd *prog_bfd;
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char **argv;
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char **env;
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{
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memset (&State, 0, sizeof (State));
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if (prog_bfd != NULL) {
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PC = bfd_get_start_address (prog_bfd);
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} else {
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PC = 0;
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}
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CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
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return SIM_RC_OK;
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}
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void
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sim_do_command (sd, cmd)
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SIM_DESC sd;
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char *cmd;
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{
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char *mm_cmd = "memory-map";
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char *int_cmd = "interrupt";
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if (sim_args_command (sd, cmd) != SIM_RC_OK)
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{
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if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
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sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
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else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
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sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
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else
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sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
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}
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}
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#endif /* WITH_COMMON */
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/* FIXME These would more efficient to use than load_mem/store_mem,
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but need to be changed to use the memory map. */
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uint8
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get_byte (x)
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uint8 *x;
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{
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return *x;
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}
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uint16
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get_half (x)
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uint8 *x;
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{
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uint8 *a = x;
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return (a[1] << 8) + (a[0]);
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}
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uint32
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get_word (x)
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uint8 *x;
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{
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uint8 *a = x;
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return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
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}
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void
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put_byte (addr, data)
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uint8 *addr;
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uint8 data;
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{
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uint8 *a = addr;
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a[0] = data;
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}
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void
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put_half (addr, data)
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uint8 *addr;
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uint16 data;
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{
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uint8 *a = addr;
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a[0] = data & 0xff;
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a[1] = (data >> 8) & 0xff;
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}
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void
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put_word (addr, data)
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uint8 *addr;
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uint32 data;
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{
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uint8 *a = addr;
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a[0] = data & 0xff;
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a[1] = (data >> 8) & 0xff;
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a[2] = (data >> 16) & 0xff;
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a[3] = (data >> 24) & 0xff;
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}
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int
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sim_fetch_register (sd, rn, memory, length)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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int length;
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{
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put_word (memory, State.regs[rn]);
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return -1;
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}
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int
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sim_store_register (sd, rn, memory, length)
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SIM_DESC sd;
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int rn;
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unsigned char *memory;
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int length;
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{
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State.regs[rn] = get_word (memory);
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return -1;
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}
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