x86: fold SSE2AVX and their base MMX/SSE templates

This way not only the overall (source) table size shrinks by quite a
bit and the risk of related templates going out of sync with one another
gets lowered, but also (dis)similarities between neighboring templates
become easier to spot.

Note that for certain SSE2AVX templates this results in benign attribute
changes:
- LDMXCSR and STMXCSR: NoAVX gets set,
- MOVMSKPS, PMOVMSKB, PEXTR{B,W} (register destination), and PINSR{B,W}
  (register source): IgnoreSize and NoRex64 get set,
- CVT{DQ,PS}2PD, CVTSD2SS, MOVMSKPD, MOVDDUP, PMOV{S,Z}X{BW,WD,DQ}, and
  ROUNDSD: NoRex64 gets set,
- CVTSS2SD, INSERTPS, PEXTRW (memory destination), PINSRW (memory
  source), and PMOV{S,Z}X{BD,WQ,BQ}: IgnoreSize gets set.
Similarly the "normal" (non-SSE2AVX)
- non-64-bit CVTS{I,S}2SD forms get NoRex64 set,
- CMP{EQ,ORD,NEQ,UNORD}{P,S}{S,D} forms get C set,
all again in a benign way.

The remaining differences in the generated table are due to re-ordering
of entries in the course of being folded into templates.
This commit is contained in:
Jan Beulich 2021-03-29 12:05:25 +02:00
parent 73e45eb208
commit 5cdaf10025
4 changed files with 768 additions and 1047 deletions

View file

@ -1,3 +1,10 @@
2021-03-29 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (mmx, sse, sse2, sse3, ssse3, sse41, sse42, aes,
pclmul, gfni): New templates. Use them wherever possible. Move
SSE4.1 pextrw into respective section.
* i386-tbl.h: Re-generate.
2021-03-29 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (output_i386_opcode): Widen type of "opcode". Use

View file

@ -1573,7 +1573,7 @@ parse_template (char *buf, int lineno)
inst->args = NULL;
cur = next_field (buf, ':', &next, end);
inst->name = xstrdup (cur);
inst->name = *cur != '$' ? xstrdup (cur) : "";
for (param = tmpl->params; param; param = param->next)
{

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